2022-02-15 03:12:20 +00:00
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/**
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* Furnace Tracker - multi-system chiptune tracker
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* Copyright (C) 2021-2022 tildearrow and contributors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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2021-05-12 22:19:18 +00:00
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#include "genesis.h"
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#include "../engine.h"
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#include <string.h>
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2021-05-14 08:23:40 +00:00
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#include <math.h>
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2021-05-12 22:19:18 +00:00
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2022-06-08 01:10:55 +00:00
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#define CHIP_FREQBASE fmFreqBase
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#define CHIP_DIVIDER fmDivBase
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2022-06-06 10:09:12 +00:00
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#define IS_REALLY_MUTED(x) (isMuted[x] && (x<5 || !softPCM || (isMuted[5] && isMuted[6])))
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2022-01-28 05:55:51 +00:00
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2022-02-15 06:46:03 +00:00
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const char* DivPlatformGenesis::getEffectName(unsigned char effect) {
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switch (effect) {
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case 0x10:
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return "10xy: Setup LFO (x: enable; y: speed)";
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break;
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case 0x11:
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return "11xx: Set feedback (0 to 7)";
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break;
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case 0x12:
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return "12xx: Set level of operator 1 (0 highest, 7F lowest)";
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break;
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case 0x13:
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return "13xx: Set level of operator 2 (0 highest, 7F lowest)";
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break;
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case 0x14:
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return "14xx: Set level of operator 3 (0 highest, 7F lowest)";
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break;
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case 0x15:
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return "15xx: Set level of operator 4 (0 highest, 7F lowest)";
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break;
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case 0x16:
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return "16xy: Set operator multiplier (x: operator from 1 to 4; y: multiplier)";
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break;
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case 0x17:
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return "17xx: Enable channel 6 DAC";
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break;
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case 0x18:
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return "18xx: Toggle extended channel 3 mode";
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break;
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case 0x19:
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return "19xx: Set attack of all operators (0 to 1F)";
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break;
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case 0x1a:
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return "1Axx: Set attack of operator 1 (0 to 1F)";
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break;
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case 0x1b:
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return "1Bxx: Set attack of operator 2 (0 to 1F)";
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break;
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case 0x1c:
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return "1Cxx: Set attack of operator 3 (0 to 1F)";
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break;
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case 0x1d:
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return "1Dxx: Set attack of operator 4 (0 to 1F)";
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break;
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2022-04-10 07:11:36 +00:00
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case 0x30:
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return "30xx: Toggle hard envelope reset on new notes";
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break;
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2022-05-04 22:39:22 +00:00
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case 0x50:
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return "50xy: Set AM (x: operator from 1 to 4 (0 for all ops); y: AM)";
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break;
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case 0x51:
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return "51xy: Set sustain level (x: operator from 1 to 4 (0 for all ops); y: sustain)";
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break;
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case 0x52:
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return "52xy: Set release (x: operator from 1 to 4 (0 for all ops); y: release)";
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break;
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case 0x53:
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return "53xy: Set detune (x: operator from 1 to 4 (0 for all ops); y: detune where 3 is center)";
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break;
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case 0x54:
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return "54xy: Set envelope scale (x: operator from 1 to 4 (0 for all ops); y: scale from 0 to 3)";
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break;
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case 0x55:
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return "55xy: Set SSG envelope (x: operator from 1 to 4 (0 for all ops); y: 0-7 on, 8 off)";
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break;
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case 0x56:
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return "56xx: Set decay of all operators (0 to 1F)";
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break;
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case 0x57:
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return "57xx: Set decay of operator 1 (0 to 1F)";
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break;
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case 0x58:
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return "58xx: Set decay of operator 2 (0 to 1F)";
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break;
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case 0x59:
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return "59xx: Set decay of operator 3 (0 to 1F)";
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break;
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case 0x5a:
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return "5Axx: Set decay of operator 4 (0 to 1F)";
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break;
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case 0x5b:
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return "5Bxx: Set decay 2 of all operators (0 to 1F)";
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break;
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case 0x5c:
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return "5Cxx: Set decay 2 of operator 1 (0 to 1F)";
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break;
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case 0x5d:
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return "5Dxx: Set decay 2 of operator 2 (0 to 1F)";
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break;
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case 0x5e:
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return "5Exx: Set decay 2 of operator 3 (0 to 1F)";
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break;
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case 0x5f:
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return "5Fxx: Set decay 2 of operator 4 (0 to 1F)";
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break;
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2022-05-27 07:47:44 +00:00
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case 0xdf:
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return "DFxx: Set sample playback direction (0: normal; 1: reverse)";
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break;
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2022-02-15 06:46:03 +00:00
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}
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return NULL;
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}
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2022-05-27 09:02:53 +00:00
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void DivPlatformGenesis::processDAC() {
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if (softPCM) {
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softPCMTimer+=chipClock/576;
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if (softPCMTimer>rate) {
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softPCMTimer-=rate;
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2021-05-13 07:39:26 +00:00
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2022-05-27 09:02:53 +00:00
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int sample=0;
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for (int i=5; i<7; i++) {
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if (chan[i].dacSample!=-1) {
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DivSample* s=parent->getSample(chan[i].dacSample);
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if (!isMuted[i] && s->samples>0) {
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if (parent->song.noOPN2Vol) {
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2022-06-04 06:03:58 +00:00
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chan[i].dacOutput=s->data8[chan[i].dacDirection?(s->samples-chan[i].dacPos-1):chan[i].dacPos];
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2022-05-27 09:02:53 +00:00
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} else {
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2022-06-04 06:03:58 +00:00
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chan[i].dacOutput=(s->data8[chan[i].dacDirection?(s->samples-chan[i].dacPos-1):chan[i].dacPos]*dacVolTable[chan[i].outVol])>>7;
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2022-05-27 09:02:53 +00:00
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}
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2022-06-04 06:03:58 +00:00
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sample+=chan[i].dacOutput;
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} else {
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chan[i].dacOutput=0;
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2022-05-27 09:02:53 +00:00
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}
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chan[i].dacPeriod+=chan[i].dacRate;
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if (chan[i].dacPeriod>=(chipClock/576)) {
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if (s->samples>0) {
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while (chan[i].dacPeriod>=(chipClock/576)) {
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2022-07-22 04:36:42 +00:00
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++chan[i].dacPos;
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if (!chan[i].dacDirection && (s->isLoopable() && chan[i].dacPos>=s->getEndPosition())) {
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chan[i].dacPos=s->loopStart;
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} else if (chan[i].dacPos>=s->samples) {
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chan[i].dacSample=-1;
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chan[i].dacPeriod=0;
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break;
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2022-05-27 09:02:53 +00:00
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}
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chan[i].dacPeriod-=(chipClock/576);
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}
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} else {
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chan[i].dacSample=-1;
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}
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}
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}
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2022-04-25 06:42:26 +00:00
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}
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2022-05-27 09:02:53 +00:00
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//sample>>=1;
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if (sample<-128) sample=-128;
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if (sample>127) sample=127;
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urgentWrite(0x2a,(unsigned char)sample+0x80);
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2022-04-25 06:42:26 +00:00
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}
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2022-05-27 09:02:53 +00:00
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} else {
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if (!chan[5].dacReady) {
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chan[5].dacDelay+=32000;
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if (chan[5].dacDelay>=rate) {
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chan[5].dacDelay-=rate;
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chan[5].dacReady=true;
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}
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}
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if (chan[5].dacMode && chan[5].dacSample!=-1) {
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chan[5].dacPeriod+=chan[5].dacRate;
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if (chan[5].dacPeriod>=rate) {
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DivSample* s=parent->getSample(chan[5].dacSample);
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2022-02-24 08:57:45 +00:00
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if (s->samples>0) {
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2022-01-24 20:47:39 +00:00
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if (!isMuted[5]) {
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2022-05-27 09:02:53 +00:00
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if (chan[5].dacReady && writes.size()<16) {
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int sample;
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if (parent->song.noOPN2Vol) {
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sample=s->data8[chan[5].dacDirection?(s->samples-chan[5].dacPos-1):chan[5].dacPos];
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} else {
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sample=(s->data8[chan[5].dacDirection?(s->samples-chan[5].dacPos-1):chan[5].dacPos]*dacVolTable[chan[5].outVol])>>7;
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}
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urgentWrite(0x2a,(unsigned char)sample+0x80);
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chan[5].dacReady=false;
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2022-03-27 06:47:27 +00:00
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}
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2021-12-19 05:51:10 +00:00
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}
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2022-07-22 04:36:42 +00:00
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chan[5].dacPos++;
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if (!chan[5].dacDirection && (s->isLoopable() && chan[5].dacPos>=s->getEndPosition())) {
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chan[5].dacPos=s->loopStart;
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} else if (chan[5].dacPos>=s->samples) {
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chan[5].dacSample=-1;
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if (parent->song.brokenDACMode) {
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rWrite(0x2b,0);
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2022-01-24 20:47:39 +00:00
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}
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2022-01-20 07:46:28 +00:00
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}
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2022-05-27 09:02:53 +00:00
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while (chan[5].dacPeriod>=rate) chan[5].dacPeriod-=rate;
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2022-01-24 20:47:39 +00:00
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} else {
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2022-05-27 09:02:53 +00:00
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chan[5].dacSample=-1;
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2021-12-06 10:21:42 +00:00
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}
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2021-05-13 07:39:26 +00:00
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}
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}
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2022-05-27 09:02:53 +00:00
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}
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}
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void DivPlatformGenesis::acquire_nuked(short* bufL, short* bufR, size_t start, size_t len) {
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static short o[2];
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static int os[2];
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for (size_t h=start; h<start+len; h++) {
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processDAC();
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2021-12-06 10:21:42 +00:00
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os[0]=0; os[1]=0;
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for (int i=0; i<6; i++) {
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if (!writes.empty() && --delay<0) {
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delay=0;
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QueuedWrite& w=writes.front();
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if (w.addrOrVal) {
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OPN2_Write(&fm,0x1+((w.addr>>8)<<1),w.val);
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//printf("write: %x = %.2x\n",w.addr,w.val);
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lastBusy=0;
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2022-02-22 03:31:27 +00:00
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regPool[w.addr&0x1ff]=w.val;
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2022-03-14 06:38:11 +00:00
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writes.pop_front();
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2021-12-06 10:21:42 +00:00
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} else {
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lastBusy++;
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if (fm.write_busy==0) {
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//printf("busycounter: %d\n",lastBusy);
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OPN2_Write(&fm,0x0+((w.addr>>8)<<1),w.addr);
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w.addrOrVal=true;
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}
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2021-12-06 08:07:29 +00:00
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}
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2021-05-13 07:39:26 +00:00
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}
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2021-12-06 10:21:42 +00:00
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OPN2_Clock(&fm,o); os[0]+=o[0]; os[1]+=o[1];
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//OPN2_Write(&fm,0,0);
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2022-06-03 06:47:31 +00:00
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if (i==5) {
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if (fm.dacen) {
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2022-06-04 06:03:58 +00:00
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if (softPCM) {
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oscBuf[5]->data[oscBuf[5]->needle++]=chan[5].dacOutput<<7;
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oscBuf[6]->data[oscBuf[6]->needle++]=chan[6].dacOutput<<7;
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} else {
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oscBuf[i]->data[oscBuf[i]->needle++]=fm.dacdata<<7;
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}
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2022-06-03 06:47:31 +00:00
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} else {
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oscBuf[i]->data[oscBuf[i]->needle++]=fm.ch_out[i]<<7;
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}
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} else {
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oscBuf[i]->data[oscBuf[i]->needle++]=fm.ch_out[i]<<7;
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}
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2022-05-01 03:59:26 +00:00
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}
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2021-12-06 08:07:29 +00:00
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2022-03-02 23:25:17 +00:00
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os[0]=(os[0]<<5);
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2021-12-08 06:56:40 +00:00
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if (os[0]<-32768) os[0]=-32768;
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if (os[0]>32767) os[0]=32767;
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2022-03-02 23:25:17 +00:00
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os[1]=(os[1]<<5);
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2021-12-08 06:56:40 +00:00
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if (os[1]<-32768) os[1]=-32768;
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if (os[1]>32767) os[1]=32767;
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2021-05-15 21:59:57 +00:00
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2021-12-08 06:56:40 +00:00
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bufL[h]=os[0];
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bufR[h]=os[1];
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2021-05-15 21:59:57 +00:00
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}
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2021-05-12 22:19:18 +00:00
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}
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2022-02-03 04:08:45 +00:00
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void DivPlatformGenesis::acquire_ymfm(short* bufL, short* bufR, size_t start, size_t len) {
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static int os[2];
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2022-05-01 08:12:32 +00:00
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ymfm::ym2612::fm_engine* fme=fm_ymfm->debug_engine();
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2022-02-03 04:08:45 +00:00
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for (size_t h=start; h<start+len; h++) {
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2022-05-27 09:02:53 +00:00
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processDAC();
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2022-02-03 04:08:45 +00:00
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os[0]=0; os[1]=0;
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2022-02-05 09:31:20 +00:00
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if (!writes.empty()) {
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2022-02-03 04:08:45 +00:00
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QueuedWrite& w=writes.front();
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2022-02-05 09:31:20 +00:00
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fm_ymfm->write(0x0+((w.addr>>8)<<1),w.addr);
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fm_ymfm->write(0x1+((w.addr>>8)<<1),w.val);
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2022-02-22 03:31:27 +00:00
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regPool[w.addr&0x1ff]=w.val;
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2022-03-14 06:38:11 +00:00
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writes.pop_front();
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2022-02-05 09:31:20 +00:00
|
|
|
lastBusy=1;
|
2022-02-03 04:08:45 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (ladder) {
|
|
|
|
fm_ymfm->generate(&out_ymfm);
|
|
|
|
} else {
|
|
|
|
((ymfm::ym3438*)fm_ymfm)->generate(&out_ymfm);
|
|
|
|
}
|
|
|
|
os[0]=out_ymfm.data[0];
|
|
|
|
os[1]=out_ymfm.data[1];
|
|
|
|
//OPN2_Write(&fm,0,0);
|
2022-05-01 08:12:32 +00:00
|
|
|
|
|
|
|
for (int i=0; i<6; i++) {
|
2022-06-03 06:47:31 +00:00
|
|
|
if (i==5) {
|
|
|
|
if (fm_ymfm->debug_dac_enable()) {
|
2022-06-04 06:03:58 +00:00
|
|
|
if (softPCM) {
|
|
|
|
oscBuf[5]->data[oscBuf[5]->needle++]=chan[5].dacOutput<<7;
|
|
|
|
oscBuf[6]->data[oscBuf[6]->needle++]=chan[6].dacOutput<<7;
|
|
|
|
} else {
|
|
|
|
oscBuf[i]->data[oscBuf[i]->needle++]=fm_ymfm->debug_dac_data()<<7;
|
|
|
|
}
|
2022-06-03 06:47:31 +00:00
|
|
|
} else {
|
|
|
|
oscBuf[i]->data[oscBuf[i]->needle++]=(fme->debug_channel(i)->debug_output(0)+fme->debug_channel(i)->debug_output(1))<<6;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
oscBuf[i]->data[oscBuf[i]->needle++]=(fme->debug_channel(i)->debug_output(0)+fme->debug_channel(i)->debug_output(1))<<6;
|
|
|
|
}
|
2022-05-01 08:12:32 +00:00
|
|
|
}
|
2022-02-03 04:08:45 +00:00
|
|
|
|
|
|
|
if (os[0]<-32768) os[0]=-32768;
|
|
|
|
if (os[0]>32767) os[0]=32767;
|
|
|
|
|
|
|
|
if (os[1]<-32768) os[1]=-32768;
|
|
|
|
if (os[1]>32767) os[1]=32767;
|
|
|
|
|
|
|
|
bufL[h]=os[0];
|
|
|
|
bufR[h]=os[1];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformGenesis::acquire(short* bufL, short* bufR, size_t start, size_t len) {
|
|
|
|
if (useYMFM) {
|
|
|
|
acquire_ymfm(bufL,bufR,start,len);
|
|
|
|
} else {
|
|
|
|
acquire_nuked(bufL,bufR,start,len);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-04-15 20:01:11 +00:00
|
|
|
void DivPlatformGenesis::tick(bool sysTick) {
|
2022-06-29 05:55:05 +00:00
|
|
|
for (int i=0; i<(softPCM?7:6); i++) {
|
2021-05-18 21:02:49 +00:00
|
|
|
if (i==2 && extMode) continue;
|
2022-01-23 18:19:19 +00:00
|
|
|
chan[i].std.next();
|
2022-01-23 20:55:12 +00:00
|
|
|
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.vol.had) {
|
2022-06-29 05:49:11 +00:00
|
|
|
int inVol=chan[i].std.vol.val;
|
|
|
|
if (chan[i].furnaceDac && inVol>0) {
|
|
|
|
inVol+=63;
|
|
|
|
}
|
|
|
|
chan[i].outVol=VOL_SCALE_LOG(chan[i].vol,MIN(127,inVol),127);
|
|
|
|
if (i<6) for (int j=0; j<4; j++) {
|
2022-01-26 23:03:08 +00:00
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[i]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2022-01-26 23:03:08 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
2022-02-02 08:06:30 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2022-01-26 23:03:08 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.arp.had) {
|
2022-01-23 20:55:12 +00:00
|
|
|
if (!chan[i].inPorta) {
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.arp.mode) {
|
2022-04-22 09:23:52 +00:00
|
|
|
chan[i].baseFreq=NOTE_FNUM_BLOCK(chan[i].std.arp.val,11);
|
2022-01-23 20:55:12 +00:00
|
|
|
} else {
|
2022-04-22 09:23:52 +00:00
|
|
|
chan[i].baseFreq=NOTE_FNUM_BLOCK(chan[i].note+(signed char)chan[i].std.arp.val,11);
|
2022-01-23 20:55:12 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[i].freqChanged=true;
|
|
|
|
} else {
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.arp.mode && chan[i].std.arp.finished) {
|
2022-04-22 09:23:52 +00:00
|
|
|
chan[i].baseFreq=NOTE_FNUM_BLOCK(chan[i].note,11);
|
2022-01-23 20:55:12 +00:00
|
|
|
chan[i].freqChanged=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-04-17 19:15:57 +00:00
|
|
|
if (chan[i].std.panL.had) {
|
|
|
|
chan[i].pan=chan[i].std.panL.val&3;
|
2022-06-29 05:49:11 +00:00
|
|
|
if (i<6) {
|
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(IS_REALLY_MUTED(i)?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
|
|
|
}
|
2022-04-17 19:15:57 +00:00
|
|
|
}
|
|
|
|
|
2022-04-16 06:39:40 +00:00
|
|
|
if (chan[i].std.pitch.had) {
|
2022-04-28 06:31:16 +00:00
|
|
|
if (chan[i].std.pitch.mode) {
|
|
|
|
chan[i].pitch2+=chan[i].std.pitch.val;
|
2022-05-23 03:47:40 +00:00
|
|
|
CLAMP_VAR(chan[i].pitch2,-32768,32767);
|
2022-04-28 06:31:16 +00:00
|
|
|
} else {
|
|
|
|
chan[i].pitch2=chan[i].std.pitch.val;
|
|
|
|
}
|
2022-04-16 06:39:40 +00:00
|
|
|
chan[i].freqChanged=true;
|
|
|
|
}
|
|
|
|
|
2022-06-29 05:49:11 +00:00
|
|
|
if (i>=6) continue;
|
|
|
|
|
2022-04-15 08:16:14 +00:00
|
|
|
if (chan[i].std.phaseReset.had) {
|
2022-05-22 09:30:56 +00:00
|
|
|
if (chan[i].std.phaseReset.val==1 && chan[i].active) {
|
2022-04-15 08:16:14 +00:00
|
|
|
chan[i].keyOn=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.alg.had) {
|
|
|
|
chan[i].state.alg=chan[i].std.alg.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
2022-02-10 03:07:32 +00:00
|
|
|
if (!parent->song.algMacroBehavior) for (int j=0; j<4; j++) {
|
2022-02-09 17:43:27 +00:00
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
|
|
|
if (isMuted[i]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
|
|
|
} else {
|
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
2022-02-09 17:43:27 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2022-01-23 18:19:19 +00:00
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.fb.had) {
|
|
|
|
chan[i].state.fb=chan[i].std.fb.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.fms.had) {
|
|
|
|
chan[i].state.fms=chan[i].std.fms.val;
|
2022-06-04 05:50:53 +00:00
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(IS_REALLY_MUTED(i)?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
2022-01-23 18:19:19 +00:00
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.ams.had) {
|
|
|
|
chan[i].state.ams=chan[i].std.ams.val;
|
2022-06-04 05:50:53 +00:00
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(IS_REALLY_MUTED(i)?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
2022-01-23 18:19:19 +00:00
|
|
|
}
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
|
|
|
DivMacroInt::IntOp& m=chan[i].std.op[j];
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.am.had) {
|
|
|
|
op.am=m.am.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.ar.had) {
|
|
|
|
op.ar=m.ar.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.dr.had) {
|
|
|
|
op.dr=m.dr.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.mult.had) {
|
|
|
|
op.mult=m.mult.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.rr.had) {
|
|
|
|
op.rr=m.rr.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.sl.had) {
|
|
|
|
op.sl=m.sl.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.tl.had) {
|
|
|
|
op.tl=127-m.tl.val;
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[i]) {
|
2022-02-13 02:19:38 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2022-01-23 18:19:19 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
2022-02-02 08:06:30 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2022-01-23 18:19:19 +00:00
|
|
|
}
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.rs.had) {
|
|
|
|
op.rs=m.rs.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.dt.had) {
|
|
|
|
op.dt=m.dt.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.d2r.had) {
|
|
|
|
op.d2r=m.d2r.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.ssg.had) {
|
|
|
|
op.ssgEnv=m.ssg.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
}
|
2022-05-21 04:54:19 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
for (int i=0; i<512; i++) {
|
|
|
|
if (pendingWrites[i]!=oldWrites[i]) {
|
|
|
|
immWrite(i,pendingWrites[i]&0xff);
|
|
|
|
oldWrites[i]=pendingWrites[i];
|
|
|
|
}
|
|
|
|
}
|
2022-01-23 18:19:19 +00:00
|
|
|
|
2022-05-21 04:54:19 +00:00
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
if (i==2 && extMode) continue;
|
2021-05-13 08:18:54 +00:00
|
|
|
if (chan[i].keyOn || chan[i].keyOff) {
|
2022-04-10 07:11:36 +00:00
|
|
|
if (chan[i].hardReset && chan[i].keyOn) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
immWrite(baseAddr+ADDR_SL_RR,0x0f);
|
|
|
|
immWrite(baseAddr+ADDR_TL,0x7f);
|
|
|
|
oldWrites[baseAddr+ADDR_SL_RR]=-1;
|
|
|
|
oldWrites[baseAddr+ADDR_TL]=-1;
|
|
|
|
//rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
}
|
2021-12-21 06:29:07 +00:00
|
|
|
immWrite(0x28,0x00|konOffs[i]);
|
2022-04-10 07:11:36 +00:00
|
|
|
if (chan[i].hardReset && chan[i].keyOn) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
for (int k=0; k<5; k++) {
|
|
|
|
immWrite(baseAddr+ADDR_SL_RR,0x0f);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2021-05-13 08:18:54 +00:00
|
|
|
chan[i].keyOff=false;
|
2021-05-13 08:09:56 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-06-03 19:10:28 +00:00
|
|
|
for (int i=0; i<7; i++) {
|
2021-05-18 21:02:49 +00:00
|
|
|
if (i==2 && extMode) continue;
|
2021-05-14 08:23:40 +00:00
|
|
|
if (chan[i].freqChanged) {
|
2022-05-11 04:17:40 +00:00
|
|
|
if (parent->song.linearPitch==2) {
|
2022-05-20 04:18:18 +00:00
|
|
|
chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,false,2,chan[i].pitch2,chipClock,CHIP_FREQBASE,11);
|
2022-05-11 04:17:40 +00:00
|
|
|
} else {
|
2022-05-20 04:18:18 +00:00
|
|
|
int fNum=parent->calcFreq(chan[i].baseFreq&0x7ff,chan[i].pitch,false,2,chan[i].pitch2,chipClock,CHIP_FREQBASE,11);
|
2022-05-11 04:17:40 +00:00
|
|
|
int block=(chan[i].baseFreq&0xf800)>>11;
|
|
|
|
if (fNum<0) fNum=0;
|
|
|
|
if (fNum>2047) {
|
|
|
|
while (block<7) {
|
|
|
|
fNum>>=1;
|
|
|
|
block++;
|
|
|
|
}
|
|
|
|
if (fNum>2047) fNum=2047;
|
2022-04-25 06:24:42 +00:00
|
|
|
}
|
2022-05-11 04:17:40 +00:00
|
|
|
chan[i].freq=(block<<11)|fNum;
|
2022-04-25 06:24:42 +00:00
|
|
|
}
|
2022-04-24 23:17:05 +00:00
|
|
|
if (chan[i].freq>0x3fff) chan[i].freq=0x3fff;
|
2022-05-27 09:02:53 +00:00
|
|
|
if (i<6) {
|
|
|
|
immWrite(chanOffs[i]+ADDR_FREQH,chan[i].freq>>8);
|
|
|
|
immWrite(chanOffs[i]+ADDR_FREQ,chan[i].freq&0xff);
|
|
|
|
}
|
|
|
|
if (chan[i].furnaceDac && chan[i].dacMode) {
|
2022-02-04 08:29:40 +00:00
|
|
|
double off=1.0;
|
2022-05-27 09:02:53 +00:00
|
|
|
if (chan[i].dacSample>=0 && chan[i].dacSample<parent->song.sampleLen) {
|
|
|
|
DivSample* s=parent->getSample(chan[i].dacSample);
|
2022-02-04 08:29:40 +00:00
|
|
|
if (s->centerRate<1) {
|
|
|
|
off=1.0;
|
|
|
|
} else {
|
2022-04-25 06:24:42 +00:00
|
|
|
off=(double)s->centerRate/8363.0;
|
2022-02-04 08:29:40 +00:00
|
|
|
}
|
|
|
|
}
|
2022-05-20 04:18:18 +00:00
|
|
|
chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,false,2,chan[i].pitch2,1,1);
|
2022-05-27 09:02:53 +00:00
|
|
|
chan[i].dacRate=chan[i].freq*off;
|
|
|
|
if (chan[i].dacRate<1) chan[i].dacRate=1;
|
|
|
|
if (dumpWrites) addWrite(0xffff0001,chan[i].dacRate);
|
2022-01-20 21:09:05 +00:00
|
|
|
}
|
2021-12-11 21:44:02 +00:00
|
|
|
chan[i].freqChanged=false;
|
2021-05-14 08:23:40 +00:00
|
|
|
}
|
|
|
|
if (chan[i].keyOn) {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (i<6) immWrite(0x28,0xf0|konOffs[i]);
|
2021-05-13 08:09:56 +00:00
|
|
|
chan[i].keyOn=false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-12-18 08:25:42 +00:00
|
|
|
void DivPlatformGenesis::muteChannel(int ch, bool mute) {
|
|
|
|
isMuted[ch]=mute;
|
2022-06-04 06:00:29 +00:00
|
|
|
if (ch>6) return;
|
|
|
|
if (ch<6) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[ch]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[ch].state.op[j];
|
|
|
|
if (isMuted[ch]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2022-02-02 08:06:30 +00:00
|
|
|
} else {
|
2022-06-04 06:00:29 +00:00
|
|
|
if (isOutput[chan[ch].state.alg][j]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[ch].outVol&0x7f,127));
|
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2022-02-02 08:06:30 +00:00
|
|
|
}
|
|
|
|
}
|
2022-06-04 06:00:29 +00:00
|
|
|
} else {
|
|
|
|
ch--;
|
2022-02-02 08:06:30 +00:00
|
|
|
}
|
2022-06-04 05:50:53 +00:00
|
|
|
rWrite(chanOffs[ch]+ADDR_LRAF,(IS_REALLY_MUTED(ch)?0:(chan[ch].pan<<6))|(chan[ch].state.fms&7)|((chan[ch].state.ams&3)<<4));
|
2021-12-18 08:25:42 +00:00
|
|
|
}
|
|
|
|
|
2021-05-12 22:19:18 +00:00
|
|
|
int DivPlatformGenesis::dispatch(DivCommand c) {
|
|
|
|
switch (c.cmd) {
|
|
|
|
case DIV_CMD_NOTE_ON: {
|
2022-04-21 07:24:06 +00:00
|
|
|
DivInstrument* ins=parent->getIns(chan[c.chan].ins,DIV_INS_FM);
|
2022-06-03 19:10:28 +00:00
|
|
|
if (c.chan==7 && extMode && softPCM) { // CSM
|
|
|
|
chan[c.chan].macroInit(ins);
|
|
|
|
chan[c.chan].insChanged=false;
|
|
|
|
|
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
|
|
|
chan[c.chan].baseFreq=NOTE_PERIODIC(c.value);
|
|
|
|
chan[c.chan].portaPause=false;
|
|
|
|
chan[c.chan].note=c.value;
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
}
|
|
|
|
chan[c.chan].keyOn=true;
|
|
|
|
chan[c.chan].active=true;
|
|
|
|
break;
|
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=5) {
|
2022-01-20 21:40:18 +00:00
|
|
|
if (ins->type==DIV_INS_AMIGA) {
|
2022-05-27 09:02:53 +00:00
|
|
|
chan[c.chan].dacMode=1;
|
2022-01-20 21:40:18 +00:00
|
|
|
rWrite(0x2b,1<<7);
|
|
|
|
} else if (chan[c.chan].furnaceDac) {
|
2022-05-27 09:02:53 +00:00
|
|
|
chan[c.chan].dacMode=0;
|
2022-01-20 21:40:18 +00:00
|
|
|
rWrite(0x2b,0<<7);
|
|
|
|
}
|
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=5 && chan[c.chan].dacMode) {
|
2021-12-21 06:29:07 +00:00
|
|
|
if (skipRegisterWrites) break;
|
2022-01-20 21:09:05 +00:00
|
|
|
if (ins->type==DIV_INS_AMIGA) { // Furnace mode
|
2022-05-27 09:02:53 +00:00
|
|
|
chan[c.chan].dacSample=ins->amiga.getSample(c.value);
|
|
|
|
if (chan[c.chan].dacSample<0 || chan[c.chan].dacSample>=parent->song.sampleLen) {
|
|
|
|
chan[c.chan].dacSample=-1;
|
2022-01-24 06:01:08 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0002,0);
|
2022-01-20 21:09:05 +00:00
|
|
|
break;
|
2022-01-24 06:01:08 +00:00
|
|
|
} else {
|
2022-03-12 03:11:33 +00:00
|
|
|
rWrite(0x2b,1<<7);
|
2022-05-27 09:02:53 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0000,chan[c.chan].dacSample);
|
2022-01-20 21:09:05 +00:00
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
chan[c.chan].dacPos=0;
|
|
|
|
chan[c.chan].dacPeriod=0;
|
2022-04-15 06:26:44 +00:00
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
2022-04-25 06:24:42 +00:00
|
|
|
chan[c.chan].baseFreq=parent->calcBaseFreq(1,1,c.value,false);
|
2022-06-29 05:49:11 +00:00
|
|
|
chan[c.chan].portaPause=false;
|
|
|
|
chan[c.chan].note=c.value;
|
2022-04-15 06:26:44 +00:00
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
}
|
2022-01-20 21:09:05 +00:00
|
|
|
chan[c.chan].furnaceDac=true;
|
2022-06-29 05:49:11 +00:00
|
|
|
|
|
|
|
chan[c.chan].macroInit(ins);
|
|
|
|
if (!chan[c.chan].std.vol.will) {
|
|
|
|
chan[c.chan].outVol=chan[c.chan].vol;
|
|
|
|
}
|
|
|
|
|
|
|
|
// ???
|
|
|
|
//chan[c.chan].keyOn=true;
|
|
|
|
chan[c.chan].active=true;
|
2022-01-20 21:09:05 +00:00
|
|
|
} else { // compatible mode
|
2022-02-03 20:43:41 +00:00
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
|
|
|
chan[c.chan].note=c.value;
|
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
chan[c.chan].dacSample=12*chan[c.chan].sampleBank+chan[c.chan].note%12;
|
|
|
|
if (chan[c.chan].dacSample>=parent->song.sampleLen) {
|
|
|
|
chan[c.chan].dacSample=-1;
|
2022-01-24 06:01:08 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0002,0);
|
2022-01-20 21:09:05 +00:00
|
|
|
break;
|
2022-01-24 06:01:08 +00:00
|
|
|
} else {
|
2022-03-12 03:11:33 +00:00
|
|
|
rWrite(0x2b,1<<7);
|
2022-05-27 09:02:53 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0000,chan[c.chan].dacSample);
|
2022-01-20 21:09:05 +00:00
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
chan[c.chan].dacPos=0;
|
|
|
|
chan[c.chan].dacPeriod=0;
|
|
|
|
chan[c.chan].dacRate=MAX(1,parent->getSample(chan[c.chan].dacSample)->rate);
|
|
|
|
if (dumpWrites) addWrite(0xffff0001,parent->getSample(chan[c.chan].dacSample)->rate);
|
2022-01-20 21:09:05 +00:00
|
|
|
chan[c.chan].furnaceDac=false;
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
|
|
|
break;
|
2022-01-22 22:43:57 +00:00
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-01-22 22:43:57 +00:00
|
|
|
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
chan[c.chan].state=ins->fm;
|
|
|
|
}
|
2022-01-26 23:03:08 +00:00
|
|
|
|
2022-04-28 06:31:16 +00:00
|
|
|
chan[c.chan].macroInit(ins);
|
2022-04-10 05:01:55 +00:00
|
|
|
if (!chan[c.chan].std.vol.will) {
|
2022-01-26 23:03:08 +00:00
|
|
|
chan[c.chan].outVol=chan[c.chan].vol;
|
|
|
|
}
|
2021-05-17 08:06:45 +00:00
|
|
|
|
2021-05-16 08:03:23 +00:00
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[c.chan]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2021-05-16 08:03:23 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[c.chan].state.alg][i]) {
|
|
|
|
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
2022-02-02 08:06:30 +00:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2021-05-17 08:06:45 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (chan[c.chan].insChanged) {
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
}
|
2021-05-17 08:06:45 +00:00
|
|
|
if (chan[c.chan].insChanged) {
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
2022-06-04 05:50:53 +00:00
|
|
|
rWrite(chanOffs[c.chan]+ADDR_LRAF,(IS_REALLY_MUTED(c.chan)?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
|
2021-05-17 08:06:45 +00:00
|
|
|
}
|
|
|
|
chan[c.chan].insChanged=false;
|
|
|
|
|
2022-01-19 05:01:34 +00:00
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
2022-04-22 09:23:52 +00:00
|
|
|
chan[c.chan].baseFreq=NOTE_FNUM_BLOCK(c.value,11);
|
2022-03-30 04:58:50 +00:00
|
|
|
chan[c.chan].portaPause=false;
|
2022-01-23 20:55:12 +00:00
|
|
|
chan[c.chan].note=c.value;
|
2022-01-19 05:01:34 +00:00
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
}
|
2021-05-13 08:09:56 +00:00
|
|
|
chan[c.chan].keyOn=true;
|
2021-05-12 22:19:18 +00:00
|
|
|
chan[c.chan].active=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_NOTE_OFF:
|
2022-06-03 19:10:28 +00:00
|
|
|
if (c.chan>=5 && c.chan<7) {
|
2022-05-27 09:02:53 +00:00
|
|
|
chan[c.chan].dacSample=-1;
|
2022-01-24 06:01:08 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0002,0);
|
2022-03-12 03:11:33 +00:00
|
|
|
if (parent->song.brokenDACMode) {
|
|
|
|
rWrite(0x2b,0);
|
2022-05-27 09:02:53 +00:00
|
|
|
if (chan[c.chan].dacMode) break;
|
2022-03-12 03:11:33 +00:00
|
|
|
}
|
2021-12-09 08:25:00 +00:00
|
|
|
}
|
2021-05-13 08:18:54 +00:00
|
|
|
chan[c.chan].keyOff=true;
|
2022-02-21 02:39:14 +00:00
|
|
|
chan[c.chan].keyOn=false;
|
2021-05-12 22:19:18 +00:00
|
|
|
chan[c.chan].active=false;
|
|
|
|
break;
|
2022-02-08 18:11:04 +00:00
|
|
|
case DIV_CMD_NOTE_OFF_ENV:
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=5) {
|
|
|
|
chan[c.chan].dacSample=-1;
|
2022-02-08 18:11:04 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0002,0);
|
|
|
|
}
|
|
|
|
chan[c.chan].keyOff=true;
|
2022-02-21 02:39:14 +00:00
|
|
|
chan[c.chan].keyOn=false;
|
2022-02-08 18:11:04 +00:00
|
|
|
chan[c.chan].active=false;
|
|
|
|
chan[c.chan].std.release();
|
|
|
|
break;
|
|
|
|
case DIV_CMD_ENV_RELEASE:
|
|
|
|
chan[c.chan].std.release();
|
|
|
|
break;
|
2021-05-13 07:39:26 +00:00
|
|
|
case DIV_CMD_VOLUME: {
|
2021-05-12 22:19:18 +00:00
|
|
|
chan[c.chan].vol=c.value;
|
2022-04-10 05:01:55 +00:00
|
|
|
if (!chan[c.chan].std.vol.has) {
|
2022-01-26 23:03:08 +00:00
|
|
|
chan[c.chan].outVol=c.value;
|
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2021-05-13 07:39:26 +00:00
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[c.chan]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2021-05-13 07:39:26 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[c.chan].state.alg][i]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
2022-02-02 08:06:30 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
break;
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
2021-05-17 08:06:45 +00:00
|
|
|
case DIV_CMD_GET_VOLUME: {
|
|
|
|
return chan[c.chan].vol;
|
|
|
|
break;
|
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
case DIV_CMD_INSTRUMENT:
|
2022-01-17 23:01:40 +00:00
|
|
|
if (chan[c.chan].ins!=c.value || c.value2==1) {
|
2021-05-13 07:39:26 +00:00
|
|
|
chan[c.chan].insChanged=true;
|
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
chan[c.chan].ins=c.value;
|
|
|
|
break;
|
2021-05-13 07:39:26 +00:00
|
|
|
case DIV_CMD_PANNING: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>5) c.chan=5;
|
2022-04-30 04:41:14 +00:00
|
|
|
if (c.value==0 && c.value2==0) {
|
2022-03-06 19:39:20 +00:00
|
|
|
chan[c.chan].pan=3;
|
|
|
|
} else {
|
2022-04-30 04:41:14 +00:00
|
|
|
chan[c.chan].pan=(c.value2>0)|((c.value>0)<<1);
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
2022-06-04 05:50:53 +00:00
|
|
|
rWrite(chanOffs[c.chan]+ADDR_LRAF,(IS_REALLY_MUTED(c.chan)?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
|
2021-05-13 07:39:26 +00:00
|
|
|
break;
|
|
|
|
}
|
2021-05-14 19:16:48 +00:00
|
|
|
case DIV_CMD_PITCH: {
|
|
|
|
chan[c.chan].pitch=c.value;
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_NOTE_PORTA: {
|
2022-05-11 04:17:40 +00:00
|
|
|
if (parent->song.linearPitch==2) {
|
|
|
|
int destFreq=NOTE_FREQUENCY(c.value2);
|
|
|
|
bool return2=false;
|
|
|
|
if (destFreq>chan[c.chan].baseFreq) {
|
|
|
|
chan[c.chan].baseFreq+=c.value;
|
|
|
|
if (chan[c.chan].baseFreq>=destFreq) {
|
|
|
|
chan[c.chan].baseFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
chan[c.chan].baseFreq-=c.value;
|
|
|
|
if (chan[c.chan].baseFreq<=destFreq) {
|
|
|
|
chan[c.chan].baseFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
if (return2) {
|
|
|
|
chan[c.chan].inPorta=false;
|
|
|
|
return 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2022-06-03 21:21:42 +00:00
|
|
|
if (c.chan==7) {
|
|
|
|
int destFreq=NOTE_PERIODIC(c.value2);
|
|
|
|
bool return2=false;
|
|
|
|
if (destFreq>chan[c.chan].baseFreq) {
|
|
|
|
chan[c.chan].baseFreq+=c.value;
|
|
|
|
if (chan[c.chan].baseFreq>=destFreq) {
|
|
|
|
chan[c.chan].baseFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
chan[c.chan].baseFreq-=c.value;
|
|
|
|
if (chan[c.chan].baseFreq<=destFreq) {
|
|
|
|
chan[c.chan].baseFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
if (return2) {
|
|
|
|
chan[c.chan].inPorta=false;
|
|
|
|
return 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=5 && chan[c.chan].furnaceDac && chan[c.chan].dacMode) {
|
2022-04-25 06:24:42 +00:00
|
|
|
int destFreq=parent->calcBaseFreq(1,1,c.value2,false);
|
|
|
|
bool return2=false;
|
|
|
|
if (destFreq>chan[c.chan].baseFreq) {
|
|
|
|
chan[c.chan].baseFreq+=c.value*16;
|
|
|
|
if (chan[c.chan].baseFreq>=destFreq) {
|
|
|
|
chan[c.chan].baseFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
chan[c.chan].baseFreq-=c.value*16;
|
|
|
|
if (chan[c.chan].baseFreq<=destFreq) {
|
|
|
|
chan[c.chan].baseFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
if (return2) {
|
|
|
|
chan[c.chan].inPorta=false;
|
|
|
|
return 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2022-05-23 04:47:41 +00:00
|
|
|
PLEASE_HELP_ME(chan[c.chan]);
|
2021-05-14 19:16:48 +00:00
|
|
|
break;
|
|
|
|
}
|
2021-05-13 07:39:26 +00:00
|
|
|
case DIV_CMD_SAMPLE_MODE: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan<5) c.chan=5;
|
|
|
|
chan[c.chan].dacMode=c.value;
|
2022-01-19 06:27:32 +00:00
|
|
|
rWrite(0x2b,c.value<<7);
|
2021-05-13 07:39:26 +00:00
|
|
|
break;
|
|
|
|
}
|
2021-12-09 08:13:37 +00:00
|
|
|
case DIV_CMD_SAMPLE_BANK:
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan<5) c.chan=5;
|
|
|
|
chan[c.chan].sampleBank=c.value;
|
|
|
|
if (chan[c.chan].sampleBank>(parent->song.sample.size()/12)) {
|
|
|
|
chan[c.chan].sampleBank=parent->song.sample.size()/12;
|
2021-12-09 08:13:37 +00:00
|
|
|
}
|
|
|
|
break;
|
2022-05-27 07:47:44 +00:00
|
|
|
case DIV_CMD_SAMPLE_DIR: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan<5) c.chan=5;
|
|
|
|
chan[c.chan].dacDirection=c.value;
|
|
|
|
if (dumpWrites) addWrite(0xffff0003,chan[c.chan].dacDirection);
|
2022-05-27 07:47:44 +00:00
|
|
|
break;
|
|
|
|
}
|
2021-05-15 08:13:21 +00:00
|
|
|
case DIV_CMD_LEGATO: {
|
2022-06-03 21:21:42 +00:00
|
|
|
if (c.chan==7) {
|
|
|
|
chan[c.chan].baseFreq=NOTE_PERIODIC(c.value);
|
|
|
|
} else if (c.chan>=5 && chan[c.chan].furnaceDac && chan[c.chan].dacMode) {
|
2022-04-25 06:24:42 +00:00
|
|
|
chan[c.chan].baseFreq=parent->calcBaseFreq(1,1,c.value,false);
|
|
|
|
} else {
|
|
|
|
chan[c.chan].baseFreq=NOTE_FNUM_BLOCK(c.value,11);
|
|
|
|
}
|
2022-01-23 20:55:12 +00:00
|
|
|
chan[c.chan].note=c.value;
|
2021-05-15 08:13:21 +00:00
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
break;
|
|
|
|
}
|
2022-06-28 06:16:46 +00:00
|
|
|
case DIV_CMD_FM_EXTCH: {
|
|
|
|
if (extSys) {
|
|
|
|
extMode=c.value;
|
|
|
|
immWrite(0x27,extMode?0x40:0);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2021-06-06 04:27:02 +00:00
|
|
|
case DIV_CMD_FM_LFO: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-01-23 20:15:46 +00:00
|
|
|
lfoValue=(c.value&7)|((c.value>>4)<<3);
|
|
|
|
rWrite(0x22,lfoValue);
|
2021-06-06 04:27:02 +00:00
|
|
|
break;
|
|
|
|
}
|
2022-02-01 20:12:06 +00:00
|
|
|
case DIV_CMD_FM_FB: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-02-01 20:12:06 +00:00
|
|
|
chan[c.chan].state.fb=c.value&7;
|
|
|
|
rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
|
|
|
break;
|
|
|
|
}
|
2021-05-15 08:13:21 +00:00
|
|
|
case DIV_CMD_FM_MULT: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2021-05-17 08:06:45 +00:00
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.mult=c.value2&15;
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
2021-05-15 08:13:21 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_TL: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2021-05-15 08:13:21 +00:00
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.tl=c.value2;
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[c.chan]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2021-05-15 08:13:21 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
2022-02-02 08:06:30 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2021-05-15 08:13:21 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_AR: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2021-05-15 08:13:21 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.ar=c.value2&31;
|
2021-05-15 08:13:21 +00:00
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
2021-05-15 08:13:21 +00:00
|
|
|
}
|
2022-05-04 19:09:43 +00:00
|
|
|
} else if (c.value<4) {
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.ar=c.value2&31;
|
2021-05-15 08:13:21 +00:00
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
2021-05-15 08:13:21 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2022-05-04 19:09:43 +00:00
|
|
|
case DIV_CMD_FM_RS: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-05-04 19:09:43 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.rs=c.value2&3;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.rs=c.value2&3;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_AM: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-05-04 19:09:43 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.am=c.value2&1;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.am=c.value2&1;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_DR: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-05-04 19:09:43 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.dr=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.dr=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_SL: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-05-04 19:09:43 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.sl=c.value2&15;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.sl=c.value2&15;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_RR: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-05-04 19:09:43 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.rr=c.value2&15;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.rr=c.value2&15;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_D2R: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-05-04 19:09:43 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.d2r=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.d2r=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_DT: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-05-04 19:09:43 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.dt=c.value&7;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.dt=c.value2&7;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_SSG: {
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-05-04 19:09:43 +00:00
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.ssgEnv=8^(c.value2&15);
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.ssgEnv=8^(c.value2&15);
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2022-04-10 07:11:36 +00:00
|
|
|
case DIV_CMD_FM_HARD_RESET:
|
2022-05-27 09:02:53 +00:00
|
|
|
if (c.chan>=6) break;
|
2022-04-10 07:11:36 +00:00
|
|
|
chan[c.chan].hardReset=c.value;
|
|
|
|
break;
|
2021-05-28 05:36:25 +00:00
|
|
|
case DIV_ALWAYS_SET_VOLUME:
|
|
|
|
return 0;
|
|
|
|
break;
|
2021-05-17 20:06:11 +00:00
|
|
|
case DIV_CMD_GET_VOLMAX:
|
|
|
|
return 127;
|
|
|
|
break;
|
2021-05-18 07:53:59 +00:00
|
|
|
case DIV_CMD_PRE_PORTA:
|
2022-01-23 20:55:12 +00:00
|
|
|
chan[c.chan].inPorta=c.value;
|
2021-05-18 07:53:59 +00:00
|
|
|
break;
|
2021-12-06 07:59:12 +00:00
|
|
|
case DIV_CMD_PRE_NOTE:
|
|
|
|
break;
|
2021-05-12 22:19:18 +00:00
|
|
|
default:
|
2021-12-06 08:26:33 +00:00
|
|
|
//printf("WARNING: unimplemented command %d\n",c.cmd);
|
2021-05-12 22:19:18 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2021-12-21 06:29:07 +00:00
|
|
|
void DivPlatformGenesis::forceIns() {
|
2022-01-23 20:12:00 +00:00
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[i]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2022-01-23 20:12:00 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
2022-02-02 08:06:30 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2022-01-23 20:12:00 +00:00
|
|
|
}
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
2022-06-04 05:50:53 +00:00
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(IS_REALLY_MUTED(i)?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
2022-02-21 02:39:14 +00:00
|
|
|
if (chan[i].active) {
|
|
|
|
chan[i].keyOn=true;
|
|
|
|
chan[i].freqChanged=true;
|
|
|
|
}
|
2021-12-21 06:29:07 +00:00
|
|
|
}
|
2022-05-27 09:02:53 +00:00
|
|
|
if (chan[5].dacMode) {
|
2021-12-21 06:29:07 +00:00
|
|
|
rWrite(0x2b,0x80);
|
|
|
|
}
|
2022-01-23 20:15:46 +00:00
|
|
|
immWrite(0x22,lfoValue);
|
2021-12-21 06:29:07 +00:00
|
|
|
}
|
|
|
|
|
2022-01-24 06:01:08 +00:00
|
|
|
void DivPlatformGenesis::toggleRegisterDump(bool enable) {
|
|
|
|
DivDispatch::toggleRegisterDump(enable);
|
|
|
|
}
|
|
|
|
|
2022-01-27 05:29:16 +00:00
|
|
|
void* DivPlatformGenesis::getChanState(int ch) {
|
|
|
|
return &chan[ch];
|
|
|
|
}
|
|
|
|
|
2022-06-05 23:17:00 +00:00
|
|
|
DivMacroInt* DivPlatformGenesis::getChanMacroInt(int ch) {
|
|
|
|
return &chan[ch].std;
|
|
|
|
}
|
|
|
|
|
2022-05-01 03:59:26 +00:00
|
|
|
DivDispatchOscBuffer* DivPlatformGenesis::getOscBuffer(int ch) {
|
|
|
|
return oscBuf[ch];
|
|
|
|
}
|
|
|
|
|
2022-02-22 03:31:27 +00:00
|
|
|
unsigned char* DivPlatformGenesis::getRegisterPool() {
|
|
|
|
return regPool;
|
|
|
|
}
|
|
|
|
|
|
|
|
int DivPlatformGenesis::getRegisterPoolSize() {
|
|
|
|
return 512;
|
|
|
|
}
|
|
|
|
|
2021-12-11 18:14:38 +00:00
|
|
|
void DivPlatformGenesis::reset() {
|
2022-03-14 06:38:11 +00:00
|
|
|
while (!writes.empty()) writes.pop_front();
|
2022-02-22 03:31:27 +00:00
|
|
|
memset(regPool,0,512);
|
2022-02-03 04:08:45 +00:00
|
|
|
if (useYMFM) {
|
|
|
|
fm_ymfm->reset();
|
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
OPN2_Reset(&fm);
|
2022-02-02 08:06:30 +00:00
|
|
|
OPN2_SetChipType(ladder?ym3438_mode_ym2612:0);
|
2022-01-25 23:46:27 +00:00
|
|
|
if (dumpWrites) {
|
|
|
|
addWrite(0xffffffff,0);
|
|
|
|
}
|
2021-05-13 07:39:26 +00:00
|
|
|
for (int i=0; i<10; i++) {
|
2021-12-11 18:14:38 +00:00
|
|
|
chan[i]=DivPlatformGenesis::Channel();
|
2022-04-15 10:37:23 +00:00
|
|
|
chan[i].std.setEngine(parent);
|
2021-05-13 07:39:26 +00:00
|
|
|
chan[i].vol=0x7f;
|
2022-01-26 23:03:08 +00:00
|
|
|
chan[i].outVol=0x7f;
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
|
|
|
|
2021-05-13 08:09:56 +00:00
|
|
|
for (int i=0; i<512; i++) {
|
2021-05-16 08:03:23 +00:00
|
|
|
oldWrites[i]=-1;
|
2021-05-13 08:09:56 +00:00
|
|
|
pendingWrites[i]=-1;
|
|
|
|
}
|
|
|
|
|
2021-05-13 07:39:26 +00:00
|
|
|
lastBusy=60;
|
2022-01-23 20:15:46 +00:00
|
|
|
lfoValue=8;
|
2022-05-27 09:02:53 +00:00
|
|
|
softPCMTimer=0;
|
2021-05-17 01:49:54 +00:00
|
|
|
extMode=false;
|
|
|
|
|
2022-05-27 09:02:53 +00:00
|
|
|
if (softPCM) {
|
|
|
|
chan[5].dacMode=true;
|
|
|
|
chan[6].dacMode=true;
|
|
|
|
}
|
|
|
|
|
|
|
|
// normal sample direction
|
|
|
|
if (dumpWrites) addWrite(0xffff0003,0);
|
2022-05-27 07:47:44 +00:00
|
|
|
|
2021-05-13 07:39:26 +00:00
|
|
|
// LFO
|
2022-01-23 20:15:46 +00:00
|
|
|
immWrite(0x22,lfoValue);
|
2021-05-12 22:19:18 +00:00
|
|
|
|
2021-05-13 07:39:26 +00:00
|
|
|
delay=0;
|
2021-12-11 18:14:38 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bool DivPlatformGenesis::isStereo() {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool DivPlatformGenesis::keyOffAffectsArp(int ch) {
|
|
|
|
return (ch>5);
|
|
|
|
}
|
|
|
|
|
2021-12-29 07:08:50 +00:00
|
|
|
bool DivPlatformGenesis::keyOffAffectsPorta(int ch) {
|
|
|
|
return (ch>5);
|
|
|
|
}
|
|
|
|
|
2022-01-18 04:59:52 +00:00
|
|
|
void DivPlatformGenesis::notifyInsChange(int ins) {
|
2022-05-27 09:02:53 +00:00
|
|
|
for (int i=0; i<10; i++) {
|
2022-03-02 23:25:17 +00:00
|
|
|
if (chan[i].ins==ins) {
|
2022-01-18 04:59:52 +00:00
|
|
|
chan[i].insChanged=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-01-14 00:36:02 +00:00
|
|
|
void DivPlatformGenesis::notifyInsDeletion(void* ins) {
|
|
|
|
}
|
|
|
|
|
2022-02-01 23:08:19 +00:00
|
|
|
void DivPlatformGenesis::poke(unsigned int addr, unsigned short val) {
|
|
|
|
immWrite(addr,val);
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformGenesis::poke(std::vector<DivRegWrite>& wlist) {
|
|
|
|
for (DivRegWrite& i: wlist) immWrite(i.addr,i.val);
|
|
|
|
}
|
|
|
|
|
2022-01-30 20:55:31 +00:00
|
|
|
int DivPlatformGenesis::getPortaFloor(int ch) {
|
|
|
|
return (ch>5)?12:0;
|
|
|
|
}
|
|
|
|
|
2022-02-03 04:08:45 +00:00
|
|
|
void DivPlatformGenesis::setYMFM(bool use) {
|
|
|
|
useYMFM=use;
|
|
|
|
}
|
|
|
|
|
2022-05-27 09:02:53 +00:00
|
|
|
void DivPlatformGenesis::setSoftPCM(bool value) {
|
|
|
|
softPCM=value;
|
|
|
|
}
|
|
|
|
|
2022-01-28 17:59:53 +00:00
|
|
|
void DivPlatformGenesis::setFlags(unsigned int flags) {
|
Prepare for reducing duplicates for 4op FM related codes, Add and correct bunch of presets, Add various clock, type options for chips
Prepare for reducing duplicates for 4op FM related codes
Add and correct bunch of presets
- mostly based on MAME source.
- Neo Geo AES uses slightly difference clock for NTSC, PAL colorbust frequency.
- Turbosound FM + SAA: Some Turbosound FM has additional SAA1099, for additional sound channel and Plays SAM coupe tune?
- PC-98:
- Sound Orchestra: OPN with hardpanned stereo, some model has with OPL family FM addons.
V variation has Y8950 and supports ADPCM.
- Sound Blaster 16 for PC-9800: This famous PC sound card is also exists for PC-98, with optional OPN PC-9801-26(K) compatibility on some models.
- IBM PCjr: PC with SN PSG sound, but less popular than previous models, and compatible Tandy 1000.
- Tandy 1000: PCjr and previous IBM PC compatible, also has SN PSG (later embedded in their ASIC, like Sega).
- Hexion: One of konami's budget arcade hardware with SCC + MSM6295 sound system, like their amusement hardware in this era.
- DJ Boy, Atari JSA IIIs, Skimaxx: How to panning sound or plays stereo sound on MSM6295 - just use MSM6295s per each output!
- Air Buster: One of arcade hardware with OPN + MSM6295 sound system, Used this configuration is also some hardwares.
- Tecmo system: One of arcade hardware with pretty unique sound system: OPL3, YMZ280B, MSM6295; first 2 entry is mostly used in music, last entry is mostly used in sound effect.
- Sunsoft Shanghai 3: Predecessor of Sunsoft Arcade is using YM2149 rather than FM, MSM6295 is still there.
- Atari Klax: example of arcade hardware sound system with single MSM6295 only.
- Ikari warriors: This early SNK Triple-Z80 hardware uses 2 OPL1s and no ADPCM supports.
- Coreland Cyber Tank: This rare arcade machine's stereo sound is like SB Pro, but it's actually produced in 2 Y8950s.
- Data East MLC: Latest arcade hardware from Data East, with single YMZ280B for sound.
- Kaneko Jackie Chan: Predecessor of Super Kaneko Nova System hardware, also with YMZ280B.
- Super Kaneko Nova System: Latest arcade hardware from Kaneko, with single YMZ280B for sound. this announced 3D acceleration addon, but finally cancelled.
- Toaplan 1: Home of Late 80-Early 90s Good ol' stuffs, Example of arcade sound system with single OPL2
- Namco Pac-Land: and this era, Namco start to change Custom 15 WSG to their Custom 30 WSG with featured RAM based waveform, and mailbox feature.
- Namco System 1: One of latest usage of Custom 30 WSG, with OPM FM hardware and 8 bit DAC and Stereo output.
Add various clock, type options for chips
- SN7: Prepare to add 17 bit noise variation, Game gear stereo extentsion, NCR PSG variation (MAME core only for now)
- OPN, OPNA: Add placeholder for prescaler option
- OPL: Prepare for OPL3L, OPL4 downscaled output rate option
2022-06-06 10:04:52 +00:00
|
|
|
switch (flags&(~0x80000000)) {
|
|
|
|
default:
|
|
|
|
case 0: chipClock=COLOR_NTSC*15.0/7.0; break;
|
2022-05-20 18:45:26 +00:00
|
|
|
case 1: chipClock=COLOR_PAL*12.0/7.0; break;
|
|
|
|
case 2: chipClock=8000000.0; break;
|
|
|
|
case 3: chipClock=COLOR_NTSC*12.0/7.0; break;
|
|
|
|
case 4: chipClock=COLOR_NTSC*9.0/4.0; break;
|
2021-12-11 18:14:38 +00:00
|
|
|
}
|
2022-02-02 08:06:30 +00:00
|
|
|
ladder=flags&0x80000000;
|
|
|
|
OPN2_SetChipType(ladder?ym3438_mode_ym2612:0);
|
2022-02-03 04:08:45 +00:00
|
|
|
if (useYMFM) {
|
|
|
|
if (fm_ymfm!=NULL) delete fm_ymfm;
|
|
|
|
if (ladder) {
|
|
|
|
fm_ymfm=new ymfm::ym2612(iface);
|
|
|
|
} else {
|
|
|
|
fm_ymfm=new ymfm::ym3438(iface);
|
|
|
|
}
|
|
|
|
rate=chipClock/144;
|
|
|
|
} else {
|
|
|
|
rate=chipClock/36;
|
|
|
|
}
|
2022-05-01 03:59:26 +00:00
|
|
|
for (int i=0; i<10; i++) {
|
|
|
|
oscBuf[i]->rate=rate;
|
|
|
|
}
|
2021-12-15 22:32:08 +00:00
|
|
|
}
|
|
|
|
|
2022-01-28 17:59:53 +00:00
|
|
|
int DivPlatformGenesis::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
|
2021-12-15 22:32:08 +00:00
|
|
|
parent=p;
|
2022-01-17 04:21:27 +00:00
|
|
|
dumpWrites=false;
|
2022-02-02 08:06:30 +00:00
|
|
|
ladder=false;
|
2021-12-21 21:02:31 +00:00
|
|
|
skipRegisterWrites=false;
|
2021-12-18 08:25:42 +00:00
|
|
|
for (int i=0; i<10; i++) {
|
|
|
|
isMuted[i]=false;
|
2022-05-01 03:59:26 +00:00
|
|
|
oscBuf[i]=new DivDispatchOscBuffer;
|
2021-12-18 08:25:42 +00:00
|
|
|
}
|
2022-02-03 04:08:45 +00:00
|
|
|
fm_ymfm=NULL;
|
2022-01-28 17:59:53 +00:00
|
|
|
setFlags(flags);
|
2021-12-11 18:14:38 +00:00
|
|
|
|
2022-05-27 09:02:53 +00:00
|
|
|
for (int i=0; i<128; i++) {
|
|
|
|
dacVolTable[127-i]=128*pow(10.0f,(float)(-i)*0.75f/20.0f);
|
|
|
|
}
|
|
|
|
dacVolTable[0]=0;
|
|
|
|
|
2021-12-11 18:14:38 +00:00
|
|
|
reset();
|
2021-05-12 22:19:18 +00:00
|
|
|
return 10;
|
|
|
|
}
|
2021-12-15 05:37:27 +00:00
|
|
|
|
|
|
|
void DivPlatformGenesis::quit() {
|
2022-05-01 03:59:26 +00:00
|
|
|
for (int i=0; i<10; i++) {
|
|
|
|
delete oscBuf[i];
|
|
|
|
}
|
2022-02-03 04:08:45 +00:00
|
|
|
if (fm_ymfm!=NULL) delete fm_ymfm;
|
2021-12-15 05:37:27 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
DivPlatformGenesis::~DivPlatformGenesis() {
|
2022-01-23 18:19:19 +00:00
|
|
|
}
|