2022-02-15 03:12:20 +00:00
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/**
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* Furnace Tracker - multi-system chiptune tracker
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* Copyright (C) 2021-2022 tildearrow and contributors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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2021-05-12 22:19:18 +00:00
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#include "genesis.h"
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#include "../engine.h"
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#include <string.h>
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2021-05-14 08:23:40 +00:00
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#include <math.h>
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2021-05-12 22:19:18 +00:00
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2021-05-18 21:02:49 +00:00
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#include "genesisshared.h"
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2021-05-28 04:03:10 +00:00
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static unsigned char konOffs[6]={
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0, 1, 2, 4, 5, 6
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};
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2022-01-28 05:55:51 +00:00
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#define CHIP_FREQBASE 9440540
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2022-02-15 06:46:03 +00:00
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const char* DivPlatformGenesis::getEffectName(unsigned char effect) {
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switch (effect) {
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case 0x10:
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return "10xy: Setup LFO (x: enable; y: speed)";
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break;
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case 0x11:
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return "11xx: Set feedback (0 to 7)";
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break;
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case 0x12:
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return "12xx: Set level of operator 1 (0 highest, 7F lowest)";
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break;
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case 0x13:
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return "13xx: Set level of operator 2 (0 highest, 7F lowest)";
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break;
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case 0x14:
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return "14xx: Set level of operator 3 (0 highest, 7F lowest)";
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break;
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case 0x15:
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return "15xx: Set level of operator 4 (0 highest, 7F lowest)";
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break;
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case 0x16:
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return "16xy: Set operator multiplier (x: operator from 1 to 4; y: multiplier)";
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break;
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case 0x17:
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return "17xx: Enable channel 6 DAC";
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break;
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case 0x18:
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return "18xx: Toggle extended channel 3 mode";
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break;
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case 0x19:
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return "19xx: Set attack of all operators (0 to 1F)";
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break;
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case 0x1a:
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return "1Axx: Set attack of operator 1 (0 to 1F)";
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break;
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case 0x1b:
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return "1Bxx: Set attack of operator 2 (0 to 1F)";
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break;
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case 0x1c:
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return "1Cxx: Set attack of operator 3 (0 to 1F)";
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break;
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case 0x1d:
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return "1Dxx: Set attack of operator 4 (0 to 1F)";
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break;
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2022-04-10 07:11:36 +00:00
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case 0x30:
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return "30xx: Toggle hard envelope reset on new notes";
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break;
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2022-02-15 06:46:03 +00:00
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}
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return NULL;
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}
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2022-02-03 04:08:45 +00:00
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void DivPlatformGenesis::acquire_nuked(short* bufL, short* bufR, size_t start, size_t len) {
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2021-05-15 21:59:57 +00:00
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static short o[2];
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2021-06-09 06:57:12 +00:00
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static int os[2];
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2021-05-13 07:39:26 +00:00
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2021-12-06 10:21:42 +00:00
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for (size_t h=start; h<start+len; h++) {
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if (dacMode && dacSample!=-1) {
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dacPeriod-=6;
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if (dacPeriod<1) {
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2022-02-25 03:52:20 +00:00
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DivSample* s=parent->getSample(dacSample);
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2022-02-24 08:57:45 +00:00
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if (s->samples>0) {
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2022-01-24 20:47:39 +00:00
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if (!isMuted[5]) {
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2022-03-27 06:47:27 +00:00
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if (writes.size()<16) {
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urgentWrite(0x2a,(unsigned char)s->data8[dacPos]+0x80);
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}
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2021-12-19 05:51:10 +00:00
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}
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2022-02-24 08:57:45 +00:00
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if (++dacPos>=s->samples) {
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2022-03-22 02:26:36 +00:00
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if (s->loopStart>=0 && s->loopStart<(int)s->samples) {
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2022-01-24 20:47:39 +00:00
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dacPos=s->loopStart;
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} else {
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dacSample=-1;
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2022-03-12 03:11:33 +00:00
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if (parent->song.brokenDACMode) {
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rWrite(0x2b,0);
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}
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2022-01-24 20:47:39 +00:00
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}
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2022-01-20 07:46:28 +00:00
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}
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2022-01-24 20:47:39 +00:00
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dacPeriod+=MAX(40,dacRate);
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} else {
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dacSample=-1;
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2021-12-06 10:21:42 +00:00
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}
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2021-05-13 07:39:26 +00:00
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}
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}
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2021-12-06 10:21:42 +00:00
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os[0]=0; os[1]=0;
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for (int i=0; i<6; i++) {
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if (!writes.empty() && --delay<0) {
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delay=0;
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QueuedWrite& w=writes.front();
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if (w.addrOrVal) {
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OPN2_Write(&fm,0x1+((w.addr>>8)<<1),w.val);
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//printf("write: %x = %.2x\n",w.addr,w.val);
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lastBusy=0;
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2022-02-22 03:31:27 +00:00
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regPool[w.addr&0x1ff]=w.val;
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2022-03-14 06:38:11 +00:00
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writes.pop_front();
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2021-12-06 10:21:42 +00:00
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} else {
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lastBusy++;
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if (fm.write_busy==0) {
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//printf("busycounter: %d\n",lastBusy);
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OPN2_Write(&fm,0x0+((w.addr>>8)<<1),w.addr);
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w.addrOrVal=true;
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}
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2021-12-06 08:07:29 +00:00
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}
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2021-05-13 07:39:26 +00:00
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}
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2021-12-06 10:21:42 +00:00
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OPN2_Clock(&fm,o); os[0]+=o[0]; os[1]+=o[1];
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//OPN2_Write(&fm,0,0);
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}
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2021-12-06 08:07:29 +00:00
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2022-03-02 23:25:17 +00:00
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os[0]=(os[0]<<5);
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2021-12-08 06:56:40 +00:00
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if (os[0]<-32768) os[0]=-32768;
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if (os[0]>32767) os[0]=32767;
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2022-03-02 23:25:17 +00:00
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os[1]=(os[1]<<5);
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2021-12-08 06:56:40 +00:00
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if (os[1]<-32768) os[1]=-32768;
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if (os[1]>32767) os[1]=32767;
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2021-05-15 21:59:57 +00:00
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2021-12-08 06:56:40 +00:00
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bufL[h]=os[0];
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bufR[h]=os[1];
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2021-05-15 21:59:57 +00:00
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}
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2021-05-12 22:19:18 +00:00
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}
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2022-02-03 04:08:45 +00:00
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void DivPlatformGenesis::acquire_ymfm(short* bufL, short* bufR, size_t start, size_t len) {
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static int os[2];
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for (size_t h=start; h<start+len; h++) {
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if (dacMode && dacSample!=-1) {
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dacPeriod-=24;
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if (dacPeriod<1) {
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2022-02-25 03:52:20 +00:00
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DivSample* s=parent->getSample(dacSample);
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2022-02-24 08:57:45 +00:00
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if (s->samples>0) {
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2022-02-03 04:08:45 +00:00
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if (!isMuted[5]) {
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2022-03-27 06:47:27 +00:00
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if (writes.size()<16) {
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urgentWrite(0x2a,(unsigned char)s->data8[dacPos]+0x80);
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}
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2022-02-03 04:08:45 +00:00
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}
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2022-02-24 08:57:45 +00:00
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if (++dacPos>=s->samples) {
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2022-03-22 02:26:36 +00:00
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if (s->loopStart>=0 && s->loopStart<(int)s->samples) {
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2022-02-03 04:08:45 +00:00
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dacPos=s->loopStart;
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} else {
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dacSample=-1;
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2022-03-12 03:11:33 +00:00
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if (parent->song.brokenDACMode) {
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rWrite(0x2b,0);
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}
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2022-02-03 04:08:45 +00:00
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}
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}
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dacPeriod+=MAX(40,dacRate);
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} else {
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dacSample=-1;
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}
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}
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}
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os[0]=0; os[1]=0;
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2022-02-05 09:31:20 +00:00
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if (!writes.empty()) {
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2022-02-03 04:08:45 +00:00
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QueuedWrite& w=writes.front();
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2022-02-05 09:31:20 +00:00
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fm_ymfm->write(0x0+((w.addr>>8)<<1),w.addr);
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fm_ymfm->write(0x1+((w.addr>>8)<<1),w.val);
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2022-02-22 03:31:27 +00:00
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regPool[w.addr&0x1ff]=w.val;
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2022-03-14 06:38:11 +00:00
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writes.pop_front();
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2022-02-05 09:31:20 +00:00
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lastBusy=1;
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2022-02-03 04:08:45 +00:00
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}
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if (ladder) {
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fm_ymfm->generate(&out_ymfm);
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} else {
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((ymfm::ym3438*)fm_ymfm)->generate(&out_ymfm);
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}
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os[0]=out_ymfm.data[0];
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os[1]=out_ymfm.data[1];
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//OPN2_Write(&fm,0,0);
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if (os[0]<-32768) os[0]=-32768;
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if (os[0]>32767) os[0]=32767;
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if (os[1]<-32768) os[1]=-32768;
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if (os[1]>32767) os[1]=32767;
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bufL[h]=os[0];
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bufR[h]=os[1];
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}
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}
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void DivPlatformGenesis::acquire(short* bufL, short* bufR, size_t start, size_t len) {
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if (useYMFM) {
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acquire_ymfm(bufL,bufR,start,len);
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} else {
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acquire_nuked(bufL,bufR,start,len);
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}
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}
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2022-04-15 20:01:11 +00:00
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void DivPlatformGenesis::tick(bool sysTick) {
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2021-05-13 08:09:56 +00:00
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for (int i=0; i<6; i++) {
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2021-05-18 21:02:49 +00:00
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if (i==2 && extMode) continue;
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2022-01-23 18:19:19 +00:00
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chan[i].std.next();
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2022-01-23 20:55:12 +00:00
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2022-04-10 05:01:55 +00:00
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if (chan[i].std.vol.had) {
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chan[i].outVol=(chan[i].vol*MIN(127,chan[i].std.vol.val))/127;
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2022-01-26 23:03:08 +00:00
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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2022-02-02 08:06:30 +00:00
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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2022-01-26 23:03:08 +00:00
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} else {
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2022-02-02 08:06:30 +00:00
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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2022-01-26 23:03:08 +00:00
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}
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}
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}
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2022-04-10 05:01:55 +00:00
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if (chan[i].std.arp.had) {
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2022-01-23 20:55:12 +00:00
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if (!chan[i].inPorta) {
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2022-04-10 05:01:55 +00:00
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if (chan[i].std.arp.mode) {
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].std.arp.val);
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2022-01-23 20:55:12 +00:00
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} else {
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2022-04-10 05:01:55 +00:00
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].note+(signed char)chan[i].std.arp.val);
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2022-01-23 20:55:12 +00:00
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}
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}
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chan[i].freqChanged=true;
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} else {
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2022-04-10 05:01:55 +00:00
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if (chan[i].std.arp.mode && chan[i].std.arp.finished) {
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2022-01-28 05:55:51 +00:00
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].note);
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2022-01-23 20:55:12 +00:00
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chan[i].freqChanged=true;
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}
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}
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2022-04-16 06:39:40 +00:00
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if (chan[i].std.pitch.had) {
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chan[i].freqChanged=true;
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}
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2022-04-15 08:16:14 +00:00
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if (chan[i].std.phaseReset.had) {
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if (chan[i].std.phaseReset.val==1) {
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chan[i].keyOn=true;
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}
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}
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2022-04-10 05:01:55 +00:00
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if (chan[i].std.alg.had) {
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chan[i].state.alg=chan[i].std.alg.val;
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2022-01-23 18:19:19 +00:00
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rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
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2022-02-10 03:07:32 +00:00
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if (!parent->song.algMacroBehavior) for (int j=0; j<4; j++) {
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2022-02-09 17:43:27 +00:00
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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}
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2022-01-23 18:19:19 +00:00
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}
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2022-04-10 05:01:55 +00:00
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if (chan[i].std.fb.had) {
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chan[i].state.fb=chan[i].std.fb.val;
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2022-01-23 18:19:19 +00:00
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|
|
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.fms.had) {
|
|
|
|
chan[i].state.fms=chan[i].std.fms.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (chan[i].std.ams.had) {
|
|
|
|
chan[i].state.ams=chan[i].std.ams.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
|
|
|
}
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
|
|
|
DivMacroInt::IntOp& m=chan[i].std.op[j];
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.am.had) {
|
|
|
|
op.am=m.am.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.ar.had) {
|
|
|
|
op.ar=m.ar.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.dr.had) {
|
|
|
|
op.dr=m.dr.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.mult.had) {
|
|
|
|
op.mult=m.mult.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.rr.had) {
|
|
|
|
op.rr=m.rr.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.sl.had) {
|
|
|
|
op.sl=m.sl.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.tl.had) {
|
|
|
|
op.tl=127-m.tl.val;
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[i]) {
|
2022-02-13 02:19:38 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2022-01-23 18:19:19 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
|
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2022-01-23 18:19:19 +00:00
|
|
|
}
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.rs.had) {
|
|
|
|
op.rs=m.rs.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.dt.had) {
|
|
|
|
op.dt=m.dt.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.d2r.had) {
|
|
|
|
op.d2r=m.d2r.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
}
|
2022-04-10 05:01:55 +00:00
|
|
|
if (m.ssg.had) {
|
|
|
|
op.ssgEnv=m.ssg.val;
|
2022-01-23 18:19:19 +00:00
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-05-13 08:18:54 +00:00
|
|
|
if (chan[i].keyOn || chan[i].keyOff) {
|
2022-04-10 07:11:36 +00:00
|
|
|
if (chan[i].hardReset && chan[i].keyOn) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
immWrite(baseAddr+ADDR_SL_RR,0x0f);
|
|
|
|
immWrite(baseAddr+ADDR_TL,0x7f);
|
|
|
|
oldWrites[baseAddr+ADDR_SL_RR]=-1;
|
|
|
|
oldWrites[baseAddr+ADDR_TL]=-1;
|
|
|
|
//rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
}
|
2021-12-21 06:29:07 +00:00
|
|
|
immWrite(0x28,0x00|konOffs[i]);
|
2022-04-10 07:11:36 +00:00
|
|
|
if (chan[i].hardReset && chan[i].keyOn) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
for (int k=0; k<5; k++) {
|
|
|
|
immWrite(baseAddr+ADDR_SL_RR,0x0f);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2021-05-13 08:18:54 +00:00
|
|
|
chan[i].keyOff=false;
|
2021-05-13 08:09:56 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i=0; i<512; i++) {
|
2021-05-16 08:03:23 +00:00
|
|
|
if (pendingWrites[i]!=oldWrites[i]) {
|
2021-12-21 06:29:07 +00:00
|
|
|
immWrite(i,pendingWrites[i]&0xff);
|
2021-05-16 08:03:23 +00:00
|
|
|
oldWrites[i]=pendingWrites[i];
|
2021-05-13 08:09:56 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i=0; i<6; i++) {
|
2021-05-18 21:02:49 +00:00
|
|
|
if (i==2 && extMode) continue;
|
2021-05-14 08:23:40 +00:00
|
|
|
if (chan[i].freqChanged) {
|
2022-02-03 07:24:11 +00:00
|
|
|
chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,false,octave(chan[i].baseFreq));
|
2022-02-18 03:07:20 +00:00
|
|
|
if (chan[i].freq>262143) chan[i].freq=262143;
|
2022-04-15 08:37:16 +00:00
|
|
|
int freqt=toFreq(chan[i].freq)+chan[i].std.pitch.val;
|
2022-01-22 22:43:57 +00:00
|
|
|
immWrite(chanOffs[i]+ADDR_FREQH,freqt>>8);
|
|
|
|
immWrite(chanOffs[i]+ADDR_FREQ,freqt&0xff);
|
2022-02-06 21:47:12 +00:00
|
|
|
if (chan[i].furnaceDac && dacMode) {
|
2022-02-04 08:29:40 +00:00
|
|
|
double off=1.0;
|
|
|
|
if (dacSample>=0 && dacSample<parent->song.sampleLen) {
|
2022-02-25 03:52:20 +00:00
|
|
|
DivSample* s=parent->getSample(dacSample);
|
2022-02-04 08:29:40 +00:00
|
|
|
if (s->centerRate<1) {
|
|
|
|
off=1.0;
|
|
|
|
} else {
|
|
|
|
off=8363.0/(double)s->centerRate;
|
|
|
|
}
|
|
|
|
}
|
2022-02-15 22:22:09 +00:00
|
|
|
dacRate=(1280000*1.25*off)/MAX(1,chan[i].baseFreq);
|
2022-02-15 20:19:36 +00:00
|
|
|
if (dacRate<1) dacRate=1;
|
2022-02-01 08:23:29 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0001,1280000/dacRate);
|
2022-01-20 21:09:05 +00:00
|
|
|
}
|
2021-12-11 21:44:02 +00:00
|
|
|
chan[i].freqChanged=false;
|
2021-05-14 08:23:40 +00:00
|
|
|
}
|
|
|
|
if (chan[i].keyOn) {
|
2021-12-21 06:29:07 +00:00
|
|
|
immWrite(0x28,0xf0|konOffs[i]);
|
2021-05-13 08:09:56 +00:00
|
|
|
chan[i].keyOn=false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-05-18 06:20:38 +00:00
|
|
|
int DivPlatformGenesis::octave(int freq) {
|
|
|
|
if (freq>=82432) {
|
|
|
|
return 128;
|
|
|
|
} else if (freq>=41216) {
|
|
|
|
return 64;
|
|
|
|
} else if (freq>=20608) {
|
|
|
|
return 32;
|
|
|
|
} else if (freq>=10304) {
|
|
|
|
return 16;
|
|
|
|
} else if (freq>=5152) {
|
|
|
|
return 8;
|
|
|
|
} else if (freq>=2576) {
|
|
|
|
return 4;
|
|
|
|
} else if (freq>=1288) {
|
|
|
|
return 2;
|
|
|
|
} else {
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2021-05-19 19:39:39 +00:00
|
|
|
int DivPlatformGenesis::toFreq(int freq) {
|
|
|
|
if (freq>=82432) {
|
|
|
|
return 0x3800|((freq>>7)&0x7ff);
|
|
|
|
} else if (freq>=41216) {
|
|
|
|
return 0x3000|((freq>>6)&0x7ff);
|
|
|
|
} else if (freq>=20608) {
|
|
|
|
return 0x2800|((freq>>5)&0x7ff);
|
|
|
|
} else if (freq>=10304) {
|
|
|
|
return 0x2000|((freq>>4)&0x7ff);
|
|
|
|
} else if (freq>=5152) {
|
|
|
|
return 0x1800|((freq>>3)&0x7ff);
|
|
|
|
} else if (freq>=2576) {
|
|
|
|
return 0x1000|((freq>>2)&0x7ff);
|
|
|
|
} else if (freq>=1288) {
|
|
|
|
return 0x800|((freq>>1)&0x7ff);
|
|
|
|
} else {
|
|
|
|
return freq&0x7ff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2021-12-18 08:25:42 +00:00
|
|
|
void DivPlatformGenesis::muteChannel(int ch, bool mute) {
|
|
|
|
isMuted[ch]=mute;
|
2022-02-02 08:06:30 +00:00
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[ch]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[ch].state.op[j];
|
|
|
|
if (isMuted[ch]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
|
|
|
} else {
|
|
|
|
if (isOutput[chan[ch].state.alg][j]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[ch].outVol&0x7f))/127));
|
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(chanOffs[ch]+ADDR_LRAF,(isMuted[ch]?0:(chan[ch].pan<<6))|(chan[ch].state.fms&7)|((chan[ch].state.ams&3)<<4));
|
2021-12-18 08:25:42 +00:00
|
|
|
}
|
|
|
|
|
2021-05-12 22:19:18 +00:00
|
|
|
int DivPlatformGenesis::dispatch(DivCommand c) {
|
|
|
|
switch (c.cmd) {
|
|
|
|
case DIV_CMD_NOTE_ON: {
|
2022-01-20 21:09:05 +00:00
|
|
|
DivInstrument* ins=parent->getIns(chan[c.chan].ins);
|
2022-01-20 21:40:18 +00:00
|
|
|
if (c.chan==5) {
|
|
|
|
if (ins->type==DIV_INS_AMIGA) {
|
|
|
|
dacMode=1;
|
|
|
|
rWrite(0x2b,1<<7);
|
|
|
|
} else if (chan[c.chan].furnaceDac) {
|
|
|
|
dacMode=0;
|
|
|
|
rWrite(0x2b,0<<7);
|
|
|
|
}
|
|
|
|
}
|
2021-05-13 07:39:26 +00:00
|
|
|
if (c.chan==5 && dacMode) {
|
2021-12-21 06:29:07 +00:00
|
|
|
if (skipRegisterWrites) break;
|
2022-01-20 21:09:05 +00:00
|
|
|
if (ins->type==DIV_INS_AMIGA) { // Furnace mode
|
|
|
|
dacSample=ins->amiga.initSample;
|
|
|
|
if (dacSample<0 || dacSample>=parent->song.sampleLen) {
|
|
|
|
dacSample=-1;
|
2022-01-24 06:01:08 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0002,0);
|
2022-01-20 21:09:05 +00:00
|
|
|
break;
|
2022-01-24 06:01:08 +00:00
|
|
|
} else {
|
2022-03-12 03:11:33 +00:00
|
|
|
rWrite(0x2b,1<<7);
|
2022-01-24 06:01:08 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0000,dacSample);
|
2022-01-20 21:09:05 +00:00
|
|
|
}
|
|
|
|
dacPos=0;
|
|
|
|
dacPeriod=0;
|
2022-04-15 06:26:44 +00:00
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
|
|
|
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
}
|
2022-01-20 21:09:05 +00:00
|
|
|
chan[c.chan].furnaceDac=true;
|
|
|
|
} else { // compatible mode
|
2022-02-03 20:43:41 +00:00
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
|
|
|
chan[c.chan].note=c.value;
|
|
|
|
}
|
|
|
|
dacSample=12*sampleBank+chan[c.chan].note%12;
|
2022-01-20 21:09:05 +00:00
|
|
|
if (dacSample>=parent->song.sampleLen) {
|
|
|
|
dacSample=-1;
|
2022-01-24 06:01:08 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0002,0);
|
2022-01-20 21:09:05 +00:00
|
|
|
break;
|
2022-01-24 06:01:08 +00:00
|
|
|
} else {
|
2022-03-12 03:11:33 +00:00
|
|
|
rWrite(0x2b,1<<7);
|
2022-01-24 06:01:08 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0000,dacSample);
|
2022-01-20 21:09:05 +00:00
|
|
|
}
|
|
|
|
dacPos=0;
|
|
|
|
dacPeriod=0;
|
2022-02-25 03:52:20 +00:00
|
|
|
dacRate=1280000/MAX(1,parent->getSample(dacSample)->rate);
|
|
|
|
if (dumpWrites) addWrite(0xffff0001,parent->getSample(dacSample)->rate);
|
2022-01-20 21:09:05 +00:00
|
|
|
chan[c.chan].furnaceDac=false;
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
|
|
|
break;
|
2022-01-22 22:43:57 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
chan[c.chan].state=ins->fm;
|
|
|
|
}
|
2022-01-26 23:03:08 +00:00
|
|
|
|
|
|
|
chan[c.chan].std.init(ins);
|
2022-04-10 05:01:55 +00:00
|
|
|
if (!chan[c.chan].std.vol.will) {
|
2022-01-26 23:03:08 +00:00
|
|
|
chan[c.chan].outVol=chan[c.chan].vol;
|
|
|
|
}
|
2021-05-17 08:06:45 +00:00
|
|
|
|
2021-05-16 08:03:23 +00:00
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[c.chan]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2021-05-16 08:03:23 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[c.chan].state.alg][i]) {
|
|
|
|
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2021-05-17 08:06:45 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
if (chan[c.chan].insChanged) {
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
}
|
2021-05-17 08:06:45 +00:00
|
|
|
if (chan[c.chan].insChanged) {
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
|
|
|
rWrite(chanOffs[c.chan]+ADDR_LRAF,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
|
2021-05-17 08:06:45 +00:00
|
|
|
}
|
|
|
|
chan[c.chan].insChanged=false;
|
|
|
|
|
2022-01-19 05:01:34 +00:00
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
2022-01-28 05:55:51 +00:00
|
|
|
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
2022-03-30 04:58:50 +00:00
|
|
|
chan[c.chan].portaPause=false;
|
2022-01-23 20:55:12 +00:00
|
|
|
chan[c.chan].note=c.value;
|
2022-01-19 05:01:34 +00:00
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
}
|
2021-05-13 08:09:56 +00:00
|
|
|
chan[c.chan].keyOn=true;
|
2021-05-12 22:19:18 +00:00
|
|
|
chan[c.chan].active=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_NOTE_OFF:
|
2021-12-09 08:25:00 +00:00
|
|
|
if (c.chan==5) {
|
|
|
|
dacSample=-1;
|
2022-01-24 06:01:08 +00:00
|
|
|
if (dumpWrites) addWrite(0xffff0002,0);
|
2022-03-12 03:11:33 +00:00
|
|
|
if (parent->song.brokenDACMode) {
|
|
|
|
rWrite(0x2b,0);
|
2022-03-12 03:41:04 +00:00
|
|
|
if (dacMode) break;
|
2022-03-12 03:11:33 +00:00
|
|
|
}
|
2021-12-09 08:25:00 +00:00
|
|
|
}
|
2021-05-13 08:18:54 +00:00
|
|
|
chan[c.chan].keyOff=true;
|
2022-02-21 02:39:14 +00:00
|
|
|
chan[c.chan].keyOn=false;
|
2021-05-12 22:19:18 +00:00
|
|
|
chan[c.chan].active=false;
|
|
|
|
break;
|
2022-02-08 18:11:04 +00:00
|
|
|
case DIV_CMD_NOTE_OFF_ENV:
|
|
|
|
if (c.chan==5) {
|
|
|
|
dacSample=-1;
|
|
|
|
if (dumpWrites) addWrite(0xffff0002,0);
|
|
|
|
}
|
|
|
|
chan[c.chan].keyOff=true;
|
2022-02-21 02:39:14 +00:00
|
|
|
chan[c.chan].keyOn=false;
|
2022-02-08 18:11:04 +00:00
|
|
|
chan[c.chan].active=false;
|
|
|
|
chan[c.chan].std.release();
|
|
|
|
break;
|
|
|
|
case DIV_CMD_ENV_RELEASE:
|
|
|
|
chan[c.chan].std.release();
|
|
|
|
break;
|
2021-05-13 07:39:26 +00:00
|
|
|
case DIV_CMD_VOLUME: {
|
2021-05-12 22:19:18 +00:00
|
|
|
chan[c.chan].vol=c.value;
|
2022-04-10 05:01:55 +00:00
|
|
|
if (!chan[c.chan].std.vol.has) {
|
2022-01-26 23:03:08 +00:00
|
|
|
chan[c.chan].outVol=c.value;
|
|
|
|
}
|
2021-05-13 07:39:26 +00:00
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[c.chan]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2021-05-13 07:39:26 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[c.chan].state.alg][i]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
|
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
break;
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
2021-05-17 08:06:45 +00:00
|
|
|
case DIV_CMD_GET_VOLUME: {
|
|
|
|
return chan[c.chan].vol;
|
|
|
|
break;
|
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
case DIV_CMD_INSTRUMENT:
|
2022-01-17 23:01:40 +00:00
|
|
|
if (chan[c.chan].ins!=c.value || c.value2==1) {
|
2021-05-13 07:39:26 +00:00
|
|
|
chan[c.chan].insChanged=true;
|
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
chan[c.chan].ins=c.value;
|
|
|
|
break;
|
2021-05-13 07:39:26 +00:00
|
|
|
case DIV_CMD_PANNING: {
|
2022-03-06 19:39:20 +00:00
|
|
|
if (c.value==0) {
|
|
|
|
chan[c.chan].pan=3;
|
|
|
|
} else {
|
|
|
|
chan[c.chan].pan=((c.value&15)>0)|(((c.value>>4)>0)<<1);
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(chanOffs[c.chan]+ADDR_LRAF,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
|
2021-05-13 07:39:26 +00:00
|
|
|
break;
|
|
|
|
}
|
2021-05-14 19:16:48 +00:00
|
|
|
case DIV_CMD_PITCH: {
|
|
|
|
chan[c.chan].pitch=c.value;
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_NOTE_PORTA: {
|
2022-01-28 05:55:51 +00:00
|
|
|
int destFreq=NOTE_FREQUENCY(c.value2);
|
2021-05-19 19:39:39 +00:00
|
|
|
int newFreq;
|
2021-05-14 19:16:48 +00:00
|
|
|
bool return2=false;
|
|
|
|
if (destFreq>chan[c.chan].baseFreq) {
|
2021-05-19 19:39:39 +00:00
|
|
|
newFreq=chan[c.chan].baseFreq+c.value*octave(chan[c.chan].baseFreq);
|
|
|
|
if (newFreq>=destFreq) {
|
|
|
|
newFreq=destFreq;
|
2021-05-14 19:16:48 +00:00
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
} else {
|
2021-05-19 19:39:39 +00:00
|
|
|
newFreq=chan[c.chan].baseFreq-c.value*octave(chan[c.chan].baseFreq);
|
|
|
|
if (newFreq<=destFreq) {
|
|
|
|
newFreq=destFreq;
|
2021-05-14 19:16:48 +00:00
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
}
|
2021-05-19 19:39:39 +00:00
|
|
|
if (!chan[c.chan].portaPause) {
|
|
|
|
if (octave(chan[c.chan].baseFreq)!=octave(newFreq)) {
|
|
|
|
chan[c.chan].portaPause=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[c.chan].baseFreq=newFreq;
|
|
|
|
chan[c.chan].portaPause=false;
|
2021-05-14 19:16:48 +00:00
|
|
|
chan[c.chan].freqChanged=true;
|
2022-01-23 20:55:12 +00:00
|
|
|
if (return2) {
|
|
|
|
chan[c.chan].inPorta=false;
|
|
|
|
return 2;
|
|
|
|
}
|
2021-05-14 19:16:48 +00:00
|
|
|
break;
|
|
|
|
}
|
2021-05-13 07:39:26 +00:00
|
|
|
case DIV_CMD_SAMPLE_MODE: {
|
2022-01-19 06:27:32 +00:00
|
|
|
dacMode=c.value;
|
|
|
|
rWrite(0x2b,c.value<<7);
|
2021-05-13 07:39:26 +00:00
|
|
|
break;
|
|
|
|
}
|
2021-12-09 08:13:37 +00:00
|
|
|
case DIV_CMD_SAMPLE_BANK:
|
|
|
|
sampleBank=c.value;
|
|
|
|
if (sampleBank>(parent->song.sample.size()/12)) {
|
|
|
|
sampleBank=parent->song.sample.size()/12;
|
|
|
|
}
|
|
|
|
break;
|
2021-05-15 08:13:21 +00:00
|
|
|
case DIV_CMD_LEGATO: {
|
2022-01-28 05:55:51 +00:00
|
|
|
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
2022-01-23 20:55:12 +00:00
|
|
|
chan[c.chan].note=c.value;
|
2021-05-15 08:13:21 +00:00
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
break;
|
|
|
|
}
|
2021-06-06 04:27:02 +00:00
|
|
|
case DIV_CMD_FM_LFO: {
|
2022-01-23 20:15:46 +00:00
|
|
|
lfoValue=(c.value&7)|((c.value>>4)<<3);
|
|
|
|
rWrite(0x22,lfoValue);
|
2021-06-06 04:27:02 +00:00
|
|
|
break;
|
|
|
|
}
|
2022-02-01 20:12:06 +00:00
|
|
|
case DIV_CMD_FM_FB: {
|
|
|
|
chan[c.chan].state.fb=c.value&7;
|
|
|
|
rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
|
|
|
break;
|
|
|
|
}
|
2021-05-15 08:13:21 +00:00
|
|
|
case DIV_CMD_FM_MULT: {
|
2021-05-17 08:06:45 +00:00
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.mult=c.value2&15;
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
2021-05-15 08:13:21 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_TL: {
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.tl=c.value2;
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[c.chan]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2021-05-15 08:13:21 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
|
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2021-05-15 08:13:21 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_AR: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.ar=c.value2&31;
|
2021-05-15 08:13:21 +00:00
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
2021-05-15 08:13:21 +00:00
|
|
|
}
|
|
|
|
} else {
|
2022-01-22 22:43:57 +00:00
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.ar=c.value2&31;
|
2021-05-15 08:13:21 +00:00
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
2022-01-22 22:43:57 +00:00
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
2021-05-15 08:13:21 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2022-04-10 07:11:36 +00:00
|
|
|
case DIV_CMD_FM_HARD_RESET:
|
|
|
|
chan[c.chan].hardReset=c.value;
|
|
|
|
break;
|
2021-05-28 05:36:25 +00:00
|
|
|
case DIV_ALWAYS_SET_VOLUME:
|
|
|
|
return 0;
|
|
|
|
break;
|
2021-05-17 20:06:11 +00:00
|
|
|
case DIV_CMD_GET_VOLMAX:
|
|
|
|
return 127;
|
|
|
|
break;
|
2021-05-18 07:53:59 +00:00
|
|
|
case DIV_CMD_PRE_PORTA:
|
2022-01-23 20:55:12 +00:00
|
|
|
chan[c.chan].inPorta=c.value;
|
2021-05-18 07:53:59 +00:00
|
|
|
break;
|
2021-12-06 07:59:12 +00:00
|
|
|
case DIV_CMD_PRE_NOTE:
|
|
|
|
break;
|
2021-05-12 22:19:18 +00:00
|
|
|
default:
|
2021-12-06 08:26:33 +00:00
|
|
|
//printf("WARNING: unimplemented command %d\n",c.cmd);
|
2021-05-12 22:19:18 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2021-12-21 06:29:07 +00:00
|
|
|
void DivPlatformGenesis::forceIns() {
|
2022-01-23 20:12:00 +00:00
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isMuted[i]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
2022-01-23 20:12:00 +00:00
|
|
|
} else {
|
2022-02-02 08:06:30 +00:00
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
|
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
2022-01-23 20:12:00 +00:00
|
|
|
}
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
2022-02-21 02:39:14 +00:00
|
|
|
if (chan[i].active) {
|
|
|
|
chan[i].keyOn=true;
|
|
|
|
chan[i].freqChanged=true;
|
|
|
|
}
|
2021-12-21 06:29:07 +00:00
|
|
|
}
|
|
|
|
if (dacMode) {
|
|
|
|
rWrite(0x2b,0x80);
|
|
|
|
}
|
2022-01-23 20:15:46 +00:00
|
|
|
immWrite(0x22,lfoValue);
|
2021-12-21 06:29:07 +00:00
|
|
|
}
|
|
|
|
|
2022-01-24 06:01:08 +00:00
|
|
|
void DivPlatformGenesis::toggleRegisterDump(bool enable) {
|
|
|
|
DivDispatch::toggleRegisterDump(enable);
|
|
|
|
}
|
|
|
|
|
2022-01-27 05:29:16 +00:00
|
|
|
void* DivPlatformGenesis::getChanState(int ch) {
|
|
|
|
return &chan[ch];
|
|
|
|
}
|
|
|
|
|
2022-02-22 03:31:27 +00:00
|
|
|
unsigned char* DivPlatformGenesis::getRegisterPool() {
|
|
|
|
return regPool;
|
|
|
|
}
|
|
|
|
|
|
|
|
int DivPlatformGenesis::getRegisterPoolSize() {
|
|
|
|
return 512;
|
|
|
|
}
|
|
|
|
|
2021-12-11 18:14:38 +00:00
|
|
|
void DivPlatformGenesis::reset() {
|
2022-03-14 06:38:11 +00:00
|
|
|
while (!writes.empty()) writes.pop_front();
|
2022-02-22 03:31:27 +00:00
|
|
|
memset(regPool,0,512);
|
2022-02-03 04:08:45 +00:00
|
|
|
if (useYMFM) {
|
|
|
|
fm_ymfm->reset();
|
|
|
|
}
|
2021-05-12 22:19:18 +00:00
|
|
|
OPN2_Reset(&fm);
|
2022-02-02 08:06:30 +00:00
|
|
|
OPN2_SetChipType(ladder?ym3438_mode_ym2612:0);
|
2022-01-25 23:46:27 +00:00
|
|
|
if (dumpWrites) {
|
|
|
|
addWrite(0xffffffff,0);
|
|
|
|
}
|
2021-05-13 07:39:26 +00:00
|
|
|
for (int i=0; i<10; i++) {
|
2021-12-11 18:14:38 +00:00
|
|
|
chan[i]=DivPlatformGenesis::Channel();
|
2022-04-15 10:37:23 +00:00
|
|
|
chan[i].std.setEngine(parent);
|
2021-05-13 07:39:26 +00:00
|
|
|
chan[i].vol=0x7f;
|
2022-01-26 23:03:08 +00:00
|
|
|
chan[i].outVol=0x7f;
|
2021-05-13 07:39:26 +00:00
|
|
|
}
|
|
|
|
|
2021-05-13 08:09:56 +00:00
|
|
|
for (int i=0; i<512; i++) {
|
2021-05-16 08:03:23 +00:00
|
|
|
oldWrites[i]=-1;
|
2021-05-13 08:09:56 +00:00
|
|
|
pendingWrites[i]=-1;
|
|
|
|
}
|
|
|
|
|
2021-05-13 07:39:26 +00:00
|
|
|
lastBusy=60;
|
|
|
|
dacMode=0;
|
|
|
|
dacPeriod=0;
|
|
|
|
dacPos=0;
|
|
|
|
dacRate=0;
|
|
|
|
dacSample=-1;
|
2021-12-09 08:13:37 +00:00
|
|
|
sampleBank=0;
|
2022-01-23 20:15:46 +00:00
|
|
|
lfoValue=8;
|
2021-05-13 07:39:26 +00:00
|
|
|
|
2021-05-17 01:49:54 +00:00
|
|
|
extMode=false;
|
|
|
|
|
2021-05-13 07:39:26 +00:00
|
|
|
// LFO
|
2022-01-23 20:15:46 +00:00
|
|
|
immWrite(0x22,lfoValue);
|
2021-05-12 22:19:18 +00:00
|
|
|
|
2021-05-13 07:39:26 +00:00
|
|
|
delay=0;
|
2021-12-11 18:14:38 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
bool DivPlatformGenesis::isStereo() {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool DivPlatformGenesis::keyOffAffectsArp(int ch) {
|
|
|
|
return (ch>5);
|
|
|
|
}
|
|
|
|
|
2021-12-29 07:08:50 +00:00
|
|
|
bool DivPlatformGenesis::keyOffAffectsPorta(int ch) {
|
|
|
|
return (ch>5);
|
|
|
|
}
|
|
|
|
|
2022-01-18 04:59:52 +00:00
|
|
|
void DivPlatformGenesis::notifyInsChange(int ins) {
|
2022-03-02 23:25:17 +00:00
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
if (chan[i].ins==ins) {
|
2022-01-18 04:59:52 +00:00
|
|
|
chan[i].insChanged=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-01-14 00:36:02 +00:00
|
|
|
void DivPlatformGenesis::notifyInsDeletion(void* ins) {
|
|
|
|
}
|
|
|
|
|
2022-02-01 23:08:19 +00:00
|
|
|
void DivPlatformGenesis::poke(unsigned int addr, unsigned short val) {
|
|
|
|
immWrite(addr,val);
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformGenesis::poke(std::vector<DivRegWrite>& wlist) {
|
|
|
|
for (DivRegWrite& i: wlist) immWrite(i.addr,i.val);
|
|
|
|
}
|
|
|
|
|
2022-01-30 20:55:31 +00:00
|
|
|
int DivPlatformGenesis::getPortaFloor(int ch) {
|
|
|
|
return (ch>5)?12:0;
|
|
|
|
}
|
|
|
|
|
2022-02-03 04:08:45 +00:00
|
|
|
void DivPlatformGenesis::setYMFM(bool use) {
|
|
|
|
useYMFM=use;
|
|
|
|
}
|
|
|
|
|
2022-01-28 17:59:53 +00:00
|
|
|
void DivPlatformGenesis::setFlags(unsigned int flags) {
|
2022-02-05 02:35:24 +00:00
|
|
|
if (flags==3) {
|
|
|
|
chipClock=COLOR_NTSC*12.0/7.0;
|
|
|
|
} else if (flags==2) {
|
2022-01-29 05:20:27 +00:00
|
|
|
chipClock=8000000.0;
|
|
|
|
} else if (flags==1) {
|
2022-01-28 05:55:51 +00:00
|
|
|
chipClock=COLOR_PAL*12.0/7.0;
|
2021-12-11 18:14:38 +00:00
|
|
|
} else {
|
2022-01-28 05:55:51 +00:00
|
|
|
chipClock=COLOR_NTSC*15.0/7.0;
|
2021-12-11 18:14:38 +00:00
|
|
|
}
|
2022-02-02 08:06:30 +00:00
|
|
|
ladder=flags&0x80000000;
|
|
|
|
OPN2_SetChipType(ladder?ym3438_mode_ym2612:0);
|
2022-02-03 04:08:45 +00:00
|
|
|
if (useYMFM) {
|
|
|
|
if (fm_ymfm!=NULL) delete fm_ymfm;
|
|
|
|
if (ladder) {
|
|
|
|
fm_ymfm=new ymfm::ym2612(iface);
|
|
|
|
} else {
|
|
|
|
fm_ymfm=new ymfm::ym3438(iface);
|
|
|
|
}
|
|
|
|
rate=chipClock/144;
|
|
|
|
} else {
|
|
|
|
rate=chipClock/36;
|
|
|
|
}
|
2021-12-15 22:32:08 +00:00
|
|
|
}
|
|
|
|
|
2022-01-28 17:59:53 +00:00
|
|
|
int DivPlatformGenesis::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
|
2021-12-15 22:32:08 +00:00
|
|
|
parent=p;
|
2022-01-17 04:21:27 +00:00
|
|
|
dumpWrites=false;
|
2022-02-02 08:06:30 +00:00
|
|
|
ladder=false;
|
2021-12-21 21:02:31 +00:00
|
|
|
skipRegisterWrites=false;
|
2021-12-18 08:25:42 +00:00
|
|
|
for (int i=0; i<10; i++) {
|
|
|
|
isMuted[i]=false;
|
|
|
|
}
|
2022-02-03 04:08:45 +00:00
|
|
|
fm_ymfm=NULL;
|
2022-01-28 17:59:53 +00:00
|
|
|
setFlags(flags);
|
2021-12-11 18:14:38 +00:00
|
|
|
|
|
|
|
reset();
|
2021-05-12 22:19:18 +00:00
|
|
|
return 10;
|
|
|
|
}
|
2021-12-15 05:37:27 +00:00
|
|
|
|
|
|
|
void DivPlatformGenesis::quit() {
|
2022-02-03 04:08:45 +00:00
|
|
|
if (fm_ymfm!=NULL) delete fm_ymfm;
|
2021-12-15 05:37:27 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
DivPlatformGenesis::~DivPlatformGenesis() {
|
2022-01-23 18:19:19 +00:00
|
|
|
}
|