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2684 commits 108 branches 189 tags 200 MiB
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Author SHA1 Message Date
tildearrow
6d441c2ffd FDS: set a post-amp value 2022-05-26 18:07:59 -05:00
tildearrow
a52f71ba32 FDS: fix NSFplay core low pass filter precision 
closes #427
 2022-05-26 18:03:57 -05:00
tildearrow
7cf853797a fix .dmf saving 2022-05-26 17:42:30 -05:00
Mahbod-Karamoozian
186dd8c522
Modern layout fix 
This fixes the problem that is present in raijin's layout
 2022-05-26 23:44:04 +04:30
tildearrow
9d36cf5ff0 fix compilation on GCC 12 2022-05-26 13:31:17 -05:00
tildearrow
c52db81d00
Merge pull request #492 from OPNA2608/fix/ci_multithreading 
Fix multithreading on CI
 2022-05-26 04:55:36 -05:00
OPNA2608
4790b56e61 Fix multithreading on CI 
`set` is not the right command to set an envvar so "" got propagated to --parallel & in turn -j.
"-j" (no job count) is _bad_ and prolly caused the OOM sitations.
 2022-05-26 11:37:51 +02:00
tildearrow
4b91669e58 Lynx: why did I not commit this 2022-05-26 03:37:34 -05:00
tildearrow
6260bcef54 Lynx: more sample improvements 2022-05-26 00:50:11 -05:00
tildearrow
b0c8cfc1f6 Lynx: sample improvements 2022-05-26 00:39:15 -05:00
tildearrow
1811a95e76 Lynx: add sample support! 2022-05-26 00:29:04 -05:00
tildearrow
f8794ae9a4 GUI: fix wavetable list oversight 2022-05-25 23:50:11 -05:00
tildearrow
49a8f77cf1 WaveSynth: fix phase modulation - again 2022-05-25 23:46:07 -05:00
Laurens Holst
4b4bc98417 Stop / reset Y8950 ADPCM before restarting. 
The emulation core treats every write to register 7 with start bit set as
a retrigger. This is not how the real hardware behaves.
 2022-05-26 03:48:49 +02:00
tildearrow
7750a9b9f3 GUI: fix possible wave editor crash 2022-05-25 12:18:11 -05:00
tildearrow
93a4e3d688 WaveSynth: fix phase modulation 
fixes #481
 2022-05-25 00:34:35 -05:00
tildearrow
42a082b2a7 Lynx: add phase reset macro 2022-05-25 00:28:47 -05:00
tildearrow
051cd6e966 fix another fucking IGFD crash bug 2022-05-25 00:10:01 -05:00
tildearrow
0292f4d4c3 temporarily "fix" MinGW issue 2022-05-24 22:15:43 -05:00
Laurens Holst
a19090ab9b Correct VGM chip ID for Y8950 reset. 2022-05-24 22:08:01 +02:00
tildearrow
58750d58c3 build actions with debug info 2022-05-24 13:56:26 -05:00
tildearrow
cad0eab9ca another fix 2022-05-24 13:40:38 -05:00
tildearrow
3a1b66957b and finally add crash file output 2022-05-24 13:23:23 -05:00
tildearrow
652edb18b7 fix it 2022-05-24 13:17:40 -05:00
tildearrow
914b5f7a88 experiment with backward-cpp again 2022-05-24 13:06:29 -05:00
tildearrow
979cb63c5b GUI: fix .cfgc/.cfgk extension duplication 2022-05-24 12:46:51 -05:00
tildearrow
3932a82d14 GUI: add frame shading setting 2022-05-24 03:49:52 -05:00
tildearrow
8dde6a604e add rounding to AddRectFilledMultiColor 2022-05-24 03:30:27 -05:00
tildearrow
08d85869a9 GUI: slight changes to edit controls 
- align classic
- stretch compact vertical
 2022-05-24 03:06:17 -05:00
tildearrow
6a3ce215ad what am I gonna do with you? 2022-05-24 02:56:50 -05:00
tildearrow
d490746325 GUI: finish lock layout 2022-05-24 02:38:10 -05:00
tildearrow
eb926a668d MSM6258: it works 2022-05-24 00:24:52 -05:00
tildearrow
8ea60f37c5 MSM6258: start work - DO NOT USE! 2022-05-23 19:01:10 -05:00
tildearrow
b849b5283b
Merge pull request #482 from grauw/y8950-adpcm-fix 
Fix Y8950 ADPCM samples.
 2022-05-23 17:52:56 -05:00
Laurens Holst
fc7b94876d Fix Y8950 ADPCM samples. 
Reverting back to before 70ead337f3, and setting register 8 to 256Kbit RAM mode.
This is what MSX has natively, and allows for the most compact sample storage with
only 4 byte alignment.

Additionally, setting register 8 before writing the start / stop addresses.

Back story:

VGMPlay MSX only supports Y8950 256K DRAM mode and ROM mode (for the latter
it makes sure address writes are shifted). 64K DRAM mode is not supported because
it’s not used by anything and the addresses are specified weirdly with some middle
bits having to be masked out.

The original code in Furnace before the change 70ead337f3 was almost correct except
it needed to set register 8 to 0 to select the 256K DRAM mode. It was set to ROM mode
so the address shift did not match up.

After 70ead337f3 (address shift change) it was also more or less correct except in
“furnacePCM” direct-sample mode the shift was not updated accordingly.

In 1a446c1cdd it selected 64K RAM mode, but for this the addresses need to be specified
differently (see Y8950 manual page 18), and it’s not really the best choice anyway.
 2022-05-24 00:51:13 +02:00
tildearrow
49943aba76 GUI: add setting to make osc escape bounds 2022-05-23 17:42:25 -05:00
tildearrow
f8d851cbc2 the Namco C163 trial 2022-05-23 16:01:35 -05:00
tildearrow
402a1d06cf more chip naming improvements 2022-05-23 15:28:38 -05:00
tildearrow
278979a2f2 change names of 15xx/CUS30 to C15 and C30 2022-05-23 15:08:29 -05:00
tildearrow
ff1263aadf ASDFGHJK 2022-05-23 03:43:33 -05:00
tildearrow
ced2940336 MSM6295: per-channel osc and muting 2022-05-23 03:18:56 -05:00
tildearrow
d3edc58cb1 MSM6295: add clock rate flag 2022-05-23 03:13:22 -05:00
tildearrow
59a722d04a MSM6295: a bit more polishing 2022-05-23 02:56:43 -05:00
tildearrow
f25cd17590 early OKI MSM6295 work 2022-05-23 01:46:58 -05:00
tildearrow
133b213998 OPL: new forceIns strategy 2022-05-23 00:18:50 -05:00
tildearrow
519bf244b9 OPL: fix kick volume in drums mode 2022-05-23 00:07:32 -05:00
tildearrow
1a446c1cdd Y8950: let's see 2022-05-22 23:54:33 -05:00
tildearrow
2fa51e482a OPN(A/B/2/B-B): fix absolutely everything 2022-05-22 23:47:41 -05:00
tildearrow
3d4f2cfa13
Merge pull request #453 from grauw/scc-reset-period-counter 
Reset period counter when writing to period registers.
 2022-05-22 22:49:03 -05:00
tildearrow
82eaa45f5d increase range of relative pitch macro 
-32768 to 32767 should be enough
 2022-05-22 22:47:40 -05:00