2022-02-18 17:58:36 +00:00
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/**
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* Furnace Tracker - multi-system chiptune tracker
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* Copyright (C) 2021-2022 tildearrow and contributors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "engine.h"
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#include "../ta-log.h"
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#include "../utfutils.h"
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2022-02-27 05:41:27 +00:00
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#include "song.h"
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2022-02-18 17:58:36 +00:00
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constexpr int MASTER_CLOCK_PREC=(sizeof(void*)==8)?8:0;
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void DivEngine::performVGMWrite(SafeWriter* w, DivSystem sys, DivRegWrite& write, int streamOff, double* loopTimer, double* loopFreq, int* loopSample, bool isSecond) {
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2022-03-05 09:02:01 +00:00
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unsigned char baseAddr1=isSecond?0xa0:0x50;
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unsigned char baseAddr2=isSecond?0x80:0;
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unsigned short baseAddr2S=isSecond?0x8000:0;
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unsigned char smsAddr=isSecond?0x30:0x50;
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2022-05-20 18:45:26 +00:00
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unsigned char rf5c68Addr=isSecond?0xb1:0xb0;
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2022-02-18 17:58:36 +00:00
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if (write.addr==0xffffffff) { // Furnace fake reset
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switch (sys) {
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case DIV_SYSTEM_YM2612:
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2022-02-27 05:39:16 +00:00
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case DIV_SYSTEM_YM2612_EXT:
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2022-02-18 17:58:36 +00:00
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for (int i=0; i<3; i++) { // set SL and RR to highest
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2022-03-05 09:02:01 +00:00
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w->writeC(2|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x80+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(2|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x84+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(2|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x88+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(2|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x8c+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(3|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x80+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(3|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x84+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(3|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x88+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(3|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x8c+i);
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w->writeC(0xff);
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}
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for (int i=0; i<3; i++) { // note off
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2022-03-05 09:02:01 +00:00
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w->writeC(2|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x28);
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w->writeC(i);
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2022-03-05 09:02:01 +00:00
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w->writeC(2|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x28);
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w->writeC(4+i);
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}
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2022-03-05 09:02:01 +00:00
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w->writeC(2|baseAddr1); // disable DAC
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2022-02-18 17:58:36 +00:00
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w->writeC(0x2b);
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w->writeC(0);
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break;
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case DIV_SYSTEM_SMS:
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for (int i=0; i<4; i++) {
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2022-03-05 09:02:01 +00:00
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w->writeC(smsAddr);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x90|(i<<5)|15);
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}
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break;
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case DIV_SYSTEM_GB:
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// square 1
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w->writeC(0xb3);
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2022-03-05 09:02:01 +00:00
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w->writeC(2|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0);
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w->writeC(0xb3);
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2022-03-05 09:02:01 +00:00
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w->writeC(4|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x80);
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// square 2
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w->writeC(0xb3);
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2022-03-05 09:02:01 +00:00
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w->writeC(7|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0);
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w->writeC(0xb3);
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2022-03-05 09:02:01 +00:00
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w->writeC(9|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x80);
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// wave
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w->writeC(0xb3);
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2022-03-05 09:02:01 +00:00
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w->writeC(0x0c|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0);
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w->writeC(0xb3);
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2022-03-05 09:02:01 +00:00
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w->writeC(0x0e|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x80);
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// noise
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w->writeC(0xb3);
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2022-03-05 09:02:01 +00:00
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w->writeC(0x11|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0);
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w->writeC(0xb3);
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2022-03-05 09:02:01 +00:00
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w->writeC(0x13|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x80);
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break;
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case DIV_SYSTEM_PCE:
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for (int i=0; i<6; i++) {
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w->writeC(0xb9);
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2022-03-05 09:02:01 +00:00
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w->writeC(0|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(i);
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w->writeC(0xb9);
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2022-03-05 09:02:01 +00:00
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w->writeC(4|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0);
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}
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break;
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case DIV_SYSTEM_NES:
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w->writeC(0xb4);
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2022-03-05 09:02:01 +00:00
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w->writeC(0x15|baseAddr2);
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2022-02-18 17:58:36 +00:00
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w->writeC(0);
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break;
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case DIV_SYSTEM_YM2151:
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for (int i=0; i<8; i++) {
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2022-03-05 09:02:01 +00:00
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w->writeC(4|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0xe0+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(4|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0xe8+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(4|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0xf0+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(4|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0xf8+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(4|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x08);
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w->writeC(i);
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}
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2022-02-27 05:39:16 +00:00
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break;
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case DIV_SYSTEM_SEGAPCM:
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case DIV_SYSTEM_SEGAPCM_COMPAT:
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for (int i=0; i<16; i++) {
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w->writeC(0xc0);
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2022-03-05 09:02:01 +00:00
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w->writeS((0x86|baseAddr2S)+(i<<3));
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2022-02-27 05:39:16 +00:00
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w->writeC(3);
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2022-02-18 17:58:36 +00:00
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}
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break;
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2022-03-06 17:31:03 +00:00
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case DIV_SYSTEM_X1_010:
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for (int i=0; i<16; i++) {
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w->writeC(0xc8);
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2022-03-12 01:22:21 +00:00
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w->writeS_BE(baseAddr2S+(i<<3));
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2022-03-06 17:31:03 +00:00
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w->writeC(0);
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}
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break;
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2022-02-18 17:58:36 +00:00
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case DIV_SYSTEM_YM2610:
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case DIV_SYSTEM_YM2610_FULL:
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2022-02-24 16:02:35 +00:00
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case DIV_SYSTEM_YM2610B:
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2022-02-18 17:58:36 +00:00
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case DIV_SYSTEM_YM2610_EXT:
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case DIV_SYSTEM_YM2610_FULL_EXT:
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2022-02-24 16:02:35 +00:00
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case DIV_SYSTEM_YM2610B_EXT:
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2022-05-19 23:09:46 +00:00
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// TODO: YM2610B channels 1 and 4 and ADPCM-B
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2022-02-18 17:58:36 +00:00
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for (int i=0; i<2; i++) { // set SL and RR to highest
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x81+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x85+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x89+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x8d+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(9|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x81+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(9|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x85+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(9|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x89+i);
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w->writeC(0xff);
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2022-03-05 09:02:01 +00:00
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w->writeC(9|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x8d+i);
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w->writeC(0xff);
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}
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for (int i=0; i<2; i++) { // note off
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x28);
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w->writeC(1+i);
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0x28);
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w->writeC(5+i);
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}
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// reset AY
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(7);
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w->writeC(0x3f);
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(8);
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w->writeC(0);
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(9);
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w->writeC(0);
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2022-03-05 09:02:01 +00:00
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w->writeC(8|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(10);
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w->writeC(0);
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// reset sample
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2022-03-05 09:02:01 +00:00
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w->writeC(9|baseAddr1);
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2022-02-18 17:58:36 +00:00
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w->writeC(0);
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w->writeC(0xbf);
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break;
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2022-03-02 05:58:49 +00:00
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case DIV_SYSTEM_OPLL:
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case DIV_SYSTEM_OPLL_DRUMS:
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case DIV_SYSTEM_VRC7:
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for (int i=0; i<9; i++) {
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2022-03-05 09:02:01 +00:00
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w->writeC(1|baseAddr1);
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2022-03-02 05:58:49 +00:00
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w->writeC(0x20+i);
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w->writeC(0);
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2022-03-05 09:02:01 +00:00
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w->writeC(1|baseAddr1);
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2022-03-02 05:58:49 +00:00
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w->writeC(0x30+i);
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w->writeC(0);
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2022-03-05 09:02:01 +00:00
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w->writeC(1|baseAddr1);
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2022-03-02 05:58:49 +00:00
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w->writeC(0x10+i);
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w->writeC(0);
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}
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break;
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2022-05-19 22:46:41 +00:00
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case DIV_SYSTEM_OPN:
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case DIV_SYSTEM_OPN_EXT:
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for (int i=0; i<3; i++) { // set SL and RR to highest
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w->writeC(5|baseAddr1);
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w->writeC(0x80+i);
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w->writeC(0xff);
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w->writeC(5|baseAddr1);
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w->writeC(0x84+i);
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w->writeC(0xff);
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w->writeC(5|baseAddr1);
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w->writeC(0x88+i);
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w->writeC(0xff);
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w->writeC(5|baseAddr1);
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w->writeC(0x8c+i);
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w->writeC(0xff);
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}
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for (int i=0; i<3; i++) { // note off
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w->writeC(5|baseAddr1);
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w->writeC(0x28);
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w->writeC(i);
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}
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// SSG
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w->writeC(5|baseAddr1);
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w->writeC(7);
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w->writeC(0x3f);
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w->writeC(5|baseAddr1);
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|
|
w->writeC(8);
|
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
w->writeC(5|baseAddr1);
|
|
|
|
w->writeC(9);
|
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
w->writeC(5|baseAddr1);
|
|
|
|
w->writeC(10);
|
|
|
|
w->writeC(0);
|
|
|
|
break;
|
2022-02-18 17:58:36 +00:00
|
|
|
case DIV_SYSTEM_AY8910:
|
|
|
|
w->writeC(0xa0);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(7|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0x3f);
|
|
|
|
|
|
|
|
w->writeC(0xa0);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(8|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
w->writeC(0xa0);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(9|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
w->writeC(0xa0);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(10|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_AY8930:
|
|
|
|
w->writeC(0xa0);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(0x0d|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0xa0);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(0x0d|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0xa0);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_SAA1099:
|
|
|
|
w->writeC(0xbd);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(0x1c|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0x02);
|
|
|
|
w->writeC(0xbd);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(0x14|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0xbd);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(0x15|baseAddr2);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
w->writeC(0xbd);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC((0|baseAddr2)+i);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0);
|
|
|
|
}
|
|
|
|
break;
|
2022-02-20 17:15:15 +00:00
|
|
|
case DIV_SYSTEM_LYNX:
|
|
|
|
w->writeC(0x4e);
|
2022-02-21 11:41:06 +00:00
|
|
|
w->writeC(0x44);
|
|
|
|
w->writeC(0xff); //stereo attenuation select
|
2022-02-20 17:15:15 +00:00
|
|
|
w->writeC(0x4e);
|
|
|
|
w->writeC(0x50);
|
2022-02-21 11:41:06 +00:00
|
|
|
w->writeC(0x00); //stereo channel disable
|
|
|
|
for (int i=0; i<4; i++) { //stereo attenuation value
|
|
|
|
w->writeC(0x4e);
|
|
|
|
w->writeC(0x40+i);
|
|
|
|
w->writeC(0xff);
|
|
|
|
}
|
2022-02-20 17:15:15 +00:00
|
|
|
break;
|
2022-02-22 09:01:57 +00:00
|
|
|
case DIV_SYSTEM_QSOUND:
|
2022-02-22 23:21:57 +00:00
|
|
|
for (int i=0; i<16; i++) {
|
|
|
|
w->writeC(0xc4);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(2+(i*8));
|
|
|
|
w->writeC(0xc4);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(6+(i*8));
|
|
|
|
}
|
|
|
|
for (int i=0; i<3; i++) {
|
|
|
|
w->writeC(0xc4);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0xcd+(i*4));
|
|
|
|
w->writeC(0xc4);
|
|
|
|
w->writeC(0x00);
|
|
|
|
w->writeC(0x01);
|
|
|
|
w->writeC(0xd6+i);
|
|
|
|
}
|
2022-02-22 09:01:57 +00:00
|
|
|
break;
|
2022-03-30 08:36:16 +00:00
|
|
|
case DIV_SYSTEM_OPL:
|
|
|
|
case DIV_SYSTEM_OPL_DRUMS:
|
2022-03-30 09:27:11 +00:00
|
|
|
// disable envelope
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0x80+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0x88+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0x90+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
}
|
|
|
|
// key off + freq reset
|
|
|
|
for (int i=0; i<9; i++) {
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0xa0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0xb0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
}
|
2022-03-30 08:36:16 +00:00
|
|
|
break;
|
2022-05-19 23:09:46 +00:00
|
|
|
case DIV_SYSTEM_Y8950:
|
|
|
|
case DIV_SYSTEM_Y8950_DRUMS:
|
|
|
|
// disable envelope
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0x80+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0x88+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0x90+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
}
|
|
|
|
// key off + freq reset
|
|
|
|
for (int i=0; i<9; i++) {
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0xa0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(0xb0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
}
|
|
|
|
// TODO: ADPCM
|
|
|
|
break;
|
2022-03-30 08:36:16 +00:00
|
|
|
case DIV_SYSTEM_OPL2:
|
|
|
|
case DIV_SYSTEM_OPL2_DRUMS:
|
2022-03-30 09:27:11 +00:00
|
|
|
// disable envelope
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
w->writeC(0x0a|baseAddr1);
|
|
|
|
w->writeC(0x80+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0a|baseAddr1);
|
|
|
|
w->writeC(0x88+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0a|baseAddr1);
|
|
|
|
w->writeC(0x90+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
}
|
|
|
|
// key off + freq reset
|
|
|
|
for (int i=0; i<9; i++) {
|
|
|
|
w->writeC(0x0a|baseAddr1);
|
|
|
|
w->writeC(0xa0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0x0a|baseAddr1);
|
|
|
|
w->writeC(0xb0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
}
|
2022-03-30 08:36:16 +00:00
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_OPL3:
|
|
|
|
case DIV_SYSTEM_OPL3_DRUMS:
|
2022-03-30 09:27:11 +00:00
|
|
|
// disable envelope
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
w->writeC(0x0e|baseAddr1);
|
|
|
|
w->writeC(0x80+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0e|baseAddr1);
|
|
|
|
w->writeC(0x88+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0e|baseAddr1);
|
|
|
|
w->writeC(0x90+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0f|baseAddr1);
|
|
|
|
w->writeC(0x80+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0f|baseAddr1);
|
|
|
|
w->writeC(0x88+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
w->writeC(0x0f|baseAddr1);
|
|
|
|
w->writeC(0x90+i);
|
|
|
|
w->writeC(0x0f);
|
|
|
|
}
|
|
|
|
// key off + freq reset
|
|
|
|
for (int i=0; i<9; i++) {
|
|
|
|
w->writeC(0x0e|baseAddr1);
|
|
|
|
w->writeC(0xa0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0x0e|baseAddr1);
|
|
|
|
w->writeC(0xb0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0x0f|baseAddr1);
|
|
|
|
w->writeC(0xa0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0x0f|baseAddr1);
|
|
|
|
w->writeC(0xb0+i);
|
|
|
|
w->writeC(0);
|
|
|
|
}
|
|
|
|
// reset 4-op
|
|
|
|
w->writeC(0x0f|baseAddr1);
|
|
|
|
w->writeC(0x04);
|
|
|
|
w->writeC(0x00);
|
2022-03-30 08:36:16 +00:00
|
|
|
break;
|
2022-05-17 06:52:18 +00:00
|
|
|
case DIV_SYSTEM_SCC:
|
|
|
|
case DIV_SYSTEM_SCC_PLUS:
|
|
|
|
w->writeC(0xd2);
|
|
|
|
w->writeC(baseAddr2|3);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0);
|
|
|
|
break;
|
2022-05-20 18:45:26 +00:00
|
|
|
case DIV_SYSTEM_RF5C68:
|
|
|
|
w->writeC(rf5c68Addr);
|
|
|
|
w->writeC(7);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(rf5c68Addr);
|
|
|
|
w->writeC(8);
|
|
|
|
w->writeC(0xff);
|
2022-02-18 17:58:36 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (write.addr>=0xffff0000) { // Furnace special command
|
|
|
|
unsigned char streamID=streamOff+((write.addr&0xff00)>>8);
|
2022-04-11 03:12:02 +00:00
|
|
|
logD("writing stream command %x:%x with stream ID %d",write.addr,write.val,streamID);
|
2022-02-18 17:58:36 +00:00
|
|
|
switch (write.addr&0xff) {
|
|
|
|
case 0: // play sample
|
|
|
|
if (write.val<song.sampleLen) {
|
|
|
|
DivSample* sample=song.sample[write.val];
|
|
|
|
w->writeC(0x95);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeS(write.val); // sample number
|
|
|
|
w->writeC((sample->loopStart==0)); // flags
|
|
|
|
if (sample->loopStart>0) {
|
2022-02-24 08:57:45 +00:00
|
|
|
loopTimer[streamID]=sample->length8;
|
2022-02-18 17:58:36 +00:00
|
|
|
loopSample[streamID]=write.val;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 1: // set sample freq
|
|
|
|
w->writeC(0x92);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeI(write.val);
|
|
|
|
loopFreq[streamID]=write.val;
|
|
|
|
break;
|
|
|
|
case 2: // stop sample
|
|
|
|
w->writeC(0x94);
|
|
|
|
w->writeC(streamID);
|
|
|
|
loopSample[streamID]=-1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
switch (sys) {
|
|
|
|
case DIV_SYSTEM_YM2612:
|
2022-02-27 05:39:16 +00:00
|
|
|
case DIV_SYSTEM_YM2612_EXT:
|
2022-02-18 17:58:36 +00:00
|
|
|
switch (write.addr>>8) {
|
|
|
|
case 0: // port 0
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(2|baseAddr1);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case 1: // port 1
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(3|baseAddr1);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case 2: // PSG
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(smsAddr);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_SMS:
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(smsAddr);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_GB:
|
|
|
|
w->writeC(0xb3);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(baseAddr2|((write.addr-16)&0xff));
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_PCE:
|
|
|
|
w->writeC(0xb9);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(baseAddr2|(write.addr&0xff));
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_NES:
|
|
|
|
w->writeC(0xb4);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(baseAddr2|(write.addr&0xff));
|
2022-04-04 03:37:16 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_FDS: // yeah
|
|
|
|
w->writeC(0xb4);
|
|
|
|
if ((write.addr&0xff)==0x23) {
|
|
|
|
w->writeC(baseAddr2|0x3f);
|
|
|
|
} else if ((write.addr&0xff)>=0x80) {
|
|
|
|
w->writeC(baseAddr2|(0x20+(write.addr&0x7f)));
|
|
|
|
} else {
|
|
|
|
w->writeC(baseAddr2|(write.addr&0xff));
|
|
|
|
}
|
|
|
|
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_YM2151:
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(4|baseAddr1);
|
2022-02-27 05:39:16 +00:00
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_SEGAPCM:
|
|
|
|
case DIV_SYSTEM_SEGAPCM_COMPAT:
|
|
|
|
w->writeC(0xc0);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeS(baseAddr2S|(write.addr&0xffff));
|
2022-02-27 05:39:16 +00:00
|
|
|
w->writeC(write.val);
|
2022-02-18 17:58:36 +00:00
|
|
|
break;
|
2022-03-06 17:31:03 +00:00
|
|
|
case DIV_SYSTEM_X1_010:
|
|
|
|
w->writeC(0xc8);
|
2022-03-12 01:22:21 +00:00
|
|
|
w->writeS_BE(baseAddr2S|(write.addr&0x1fff));
|
2022-03-06 17:31:03 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
2022-02-18 17:58:36 +00:00
|
|
|
case DIV_SYSTEM_YM2610:
|
|
|
|
case DIV_SYSTEM_YM2610_FULL:
|
2022-02-24 16:02:35 +00:00
|
|
|
case DIV_SYSTEM_YM2610B:
|
2022-02-18 17:58:36 +00:00
|
|
|
case DIV_SYSTEM_YM2610_EXT:
|
|
|
|
case DIV_SYSTEM_YM2610_FULL_EXT:
|
2022-02-24 16:02:35 +00:00
|
|
|
case DIV_SYSTEM_YM2610B_EXT:
|
2022-02-18 17:58:36 +00:00
|
|
|
switch (write.addr>>8) {
|
|
|
|
case 0: // port 0
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(8|baseAddr1);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case 1: // port 1
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(9|baseAddr1);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2022-05-11 08:41:02 +00:00
|
|
|
case DIV_SYSTEM_OPN:
|
2022-05-19 22:46:41 +00:00
|
|
|
case DIV_SYSTEM_OPN_EXT:
|
2022-05-11 08:41:02 +00:00
|
|
|
w->writeC(5|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
2022-05-19 23:09:46 +00:00
|
|
|
case DIV_SYSTEM_PC98:
|
|
|
|
case DIV_SYSTEM_PC98_EXT:
|
|
|
|
switch (write.addr>>8) {
|
|
|
|
case 0: // port 0
|
|
|
|
w->writeC(6|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case 1: // port 1
|
|
|
|
w->writeC(7|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2022-03-02 05:58:49 +00:00
|
|
|
case DIV_SYSTEM_OPLL:
|
|
|
|
case DIV_SYSTEM_OPLL_DRUMS:
|
|
|
|
case DIV_SYSTEM_VRC7:
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(1|baseAddr1);
|
2022-03-02 05:58:49 +00:00
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
2022-02-18 17:58:36 +00:00
|
|
|
case DIV_SYSTEM_AY8910:
|
|
|
|
case DIV_SYSTEM_AY8930:
|
|
|
|
w->writeC(0xa0);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(baseAddr2|(write.addr&0xff));
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_SAA1099:
|
|
|
|
w->writeC(0xbd);
|
2022-03-05 09:02:01 +00:00
|
|
|
w->writeC(baseAddr2|(write.addr&0xff));
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
2022-02-20 17:15:15 +00:00
|
|
|
case DIV_SYSTEM_LYNX:
|
|
|
|
w->writeC(0x4e);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
break;
|
2022-02-22 09:01:57 +00:00
|
|
|
case DIV_SYSTEM_QSOUND:
|
|
|
|
w->writeC(0xc4);
|
2022-02-22 23:21:57 +00:00
|
|
|
w->writeC((write.val>>8)&0xff);
|
2022-02-22 09:01:57 +00:00
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
break;
|
2022-03-06 16:13:47 +00:00
|
|
|
case DIV_SYSTEM_SWAN:
|
|
|
|
if ((write.addr&0x7f)<0x40) {
|
|
|
|
w->writeC(0xbc);
|
|
|
|
w->writeC(baseAddr2|(write.addr&0x3f));
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else {
|
|
|
|
// (Wave) RAM write
|
|
|
|
w->writeC(0xc6);
|
2022-03-06 18:26:59 +00:00
|
|
|
w->writeS_BE(baseAddr2S|(write.addr&0x3f));
|
2022-03-06 16:13:47 +00:00
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
}
|
|
|
|
break;
|
2022-03-30 08:36:16 +00:00
|
|
|
case DIV_SYSTEM_OPL:
|
|
|
|
case DIV_SYSTEM_OPL_DRUMS:
|
|
|
|
w->writeC(0x0b|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
2022-05-19 23:09:46 +00:00
|
|
|
case DIV_SYSTEM_Y8950:
|
|
|
|
case DIV_SYSTEM_Y8950_DRUMS:
|
|
|
|
w->writeC(0x0c|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
2022-03-30 08:36:16 +00:00
|
|
|
case DIV_SYSTEM_OPL2:
|
|
|
|
case DIV_SYSTEM_OPL2_DRUMS:
|
|
|
|
w->writeC(0x0a|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_OPL3:
|
|
|
|
case DIV_SYSTEM_OPL3_DRUMS:
|
|
|
|
switch (write.addr>>8) {
|
|
|
|
case 0: // port 0
|
|
|
|
w->writeC(0x0e|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
case 1: // port 1
|
|
|
|
w->writeC(0x0f|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
2022-05-11 07:20:14 +00:00
|
|
|
case DIV_SYSTEM_SCC:
|
|
|
|
if (write.addr<0x80) {
|
|
|
|
w->writeC(0xd2);
|
2022-05-11 07:32:08 +00:00
|
|
|
w->writeC(baseAddr2|0);
|
|
|
|
w->writeC(write.addr&0x7f);
|
2022-05-11 07:20:14 +00:00
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr<0x8a) {
|
|
|
|
w->writeC(0xd2);
|
2022-05-11 07:32:08 +00:00
|
|
|
w->writeC(baseAddr2|1);
|
|
|
|
w->writeC((write.addr-0x80)&0x7f);
|
2022-05-11 07:20:14 +00:00
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr<0x8f) {
|
|
|
|
w->writeC(0xd2);
|
2022-05-11 07:32:08 +00:00
|
|
|
w->writeC(baseAddr2|2);
|
|
|
|
w->writeC((write.addr-0x8a)&0x7f);
|
2022-05-11 07:20:14 +00:00
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr<0x90) {
|
|
|
|
w->writeC(0xd2);
|
2022-05-11 07:32:08 +00:00
|
|
|
w->writeC(baseAddr2|3);
|
|
|
|
w->writeC((write.addr-0x8f)&0x7f);
|
2022-05-11 07:20:14 +00:00
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr>=0xe0) {
|
|
|
|
w->writeC(0xd2);
|
2022-05-11 07:32:08 +00:00
|
|
|
w->writeC(baseAddr2|5);
|
|
|
|
w->writeC((write.addr-0xe0)&0x7f);
|
2022-05-11 07:20:14 +00:00
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else {
|
|
|
|
logW("SCC: writing to unmapped address %.2x!",write.addr);
|
|
|
|
}
|
|
|
|
break;
|
2022-05-11 07:32:08 +00:00
|
|
|
case DIV_SYSTEM_SCC_PLUS:
|
|
|
|
if (write.addr<0x80) {
|
|
|
|
w->writeC(0xd2);
|
|
|
|
w->writeC(baseAddr2|0);
|
|
|
|
w->writeC(write.addr&0x7f);
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr<0xa0) {
|
|
|
|
w->writeC(0xd2);
|
|
|
|
w->writeC(baseAddr2|4);
|
|
|
|
w->writeC(write.addr);
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr<0xaa) {
|
|
|
|
w->writeC(0xd2);
|
|
|
|
w->writeC(baseAddr2|1);
|
|
|
|
w->writeC((write.addr-0xa0)&0x7f);
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr<0xaf) {
|
|
|
|
w->writeC(0xd2);
|
|
|
|
w->writeC(baseAddr2|2);
|
|
|
|
w->writeC((write.addr-0xaa)&0x7f);
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr<0xb0) {
|
|
|
|
w->writeC(0xd2);
|
|
|
|
w->writeC(baseAddr2|3);
|
|
|
|
w->writeC((write.addr-0xaf)&0x7f);
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else if (write.addr>=0xe0) {
|
|
|
|
w->writeC(0xd2);
|
|
|
|
w->writeC(baseAddr2|5);
|
|
|
|
w->writeC((write.addr-0xe0)&0x7f);
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
} else {
|
|
|
|
logW("SCC+: writing to unmapped address %.2x!",write.addr);
|
|
|
|
}
|
|
|
|
break;
|
2022-05-18 06:55:33 +00:00
|
|
|
case DIV_SYSTEM_YMZ280B:
|
|
|
|
w->writeC(0x0d|baseAddr1);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val&0xff);
|
|
|
|
break;
|
2022-05-20 18:45:26 +00:00
|
|
|
case DIV_SYSTEM_RF5C68:
|
|
|
|
w->writeC(rf5c68Addr);
|
|
|
|
w->writeC(write.addr&0xff);
|
|
|
|
w->writeC(write.val);
|
|
|
|
break;
|
2022-02-18 17:58:36 +00:00
|
|
|
default:
|
2022-04-11 03:12:02 +00:00
|
|
|
logW("write not handled!");
|
2022-02-18 17:58:36 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-04-02 02:40:32 +00:00
|
|
|
SafeWriter* DivEngine::saveVGM(bool* sysToExport, bool loop, int version) {
|
|
|
|
if (version<0x150) {
|
|
|
|
lastError="VGM version is too low";
|
|
|
|
return NULL;
|
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
stop();
|
2022-02-22 04:05:41 +00:00
|
|
|
repeatPattern=false;
|
2022-02-18 17:58:36 +00:00
|
|
|
setOrder(0);
|
2022-03-24 02:38:28 +00:00
|
|
|
BUSY_BEGIN_SOFT;
|
2022-02-18 17:58:36 +00:00
|
|
|
double origRate=got.rate;
|
|
|
|
got.rate=44100;
|
|
|
|
// determine loop point
|
|
|
|
int loopOrder=0;
|
|
|
|
int loopRow=0;
|
|
|
|
int loopEnd=0;
|
|
|
|
walkSong(loopOrder,loopRow,loopEnd);
|
2022-04-11 03:12:02 +00:00
|
|
|
logI("loop point: %d %d",loopOrder,loopRow);
|
2022-02-18 17:58:36 +00:00
|
|
|
warnings="";
|
|
|
|
|
|
|
|
curOrder=0;
|
|
|
|
freelance=false;
|
|
|
|
playing=false;
|
|
|
|
extValuePresent=false;
|
|
|
|
remainingLoops=-1;
|
|
|
|
|
|
|
|
// play the song ourselves
|
|
|
|
bool done=false;
|
|
|
|
int writeCount=0;
|
|
|
|
|
|
|
|
int gd3Off=0;
|
|
|
|
|
|
|
|
int hasSN=0;
|
|
|
|
int snNoiseConfig=9;
|
|
|
|
int snNoiseSize=16;
|
|
|
|
int snFlags=0;
|
|
|
|
int hasOPLL=0;
|
|
|
|
int hasOPN2=0;
|
|
|
|
int hasOPM=0;
|
|
|
|
int hasSegaPCM=0;
|
|
|
|
int segaPCMOffset=0xf8000d;
|
|
|
|
int hasRFC=0;
|
|
|
|
int hasOPN=0;
|
|
|
|
int hasOPNA=0;
|
|
|
|
int hasOPNB=0;
|
|
|
|
int hasOPL2=0;
|
|
|
|
int hasOPL=0;
|
|
|
|
int hasY8950=0;
|
|
|
|
int hasOPL3=0;
|
|
|
|
int hasOPL4=0;
|
|
|
|
int hasOPX=0;
|
|
|
|
int hasZ280=0;
|
|
|
|
int hasRFC1=0;
|
|
|
|
int hasPWM=0;
|
|
|
|
int hasAY=0;
|
|
|
|
int ayConfig=0;
|
|
|
|
int ayFlags=0;
|
|
|
|
int hasGB=0;
|
|
|
|
int hasNES=0;
|
|
|
|
int hasMultiPCM=0;
|
|
|
|
int hasuPD7759=0;
|
|
|
|
int hasOKIM6258=0;
|
|
|
|
int hasK054539=0;
|
|
|
|
int hasOKIM6295=0;
|
|
|
|
int hasK051649=0;
|
|
|
|
int hasPCE=0;
|
|
|
|
int hasNamco=0;
|
|
|
|
int hasK053260=0;
|
|
|
|
int hasPOKEY=0;
|
|
|
|
int hasQSound=0;
|
|
|
|
int hasSCSP=0;
|
|
|
|
int hasSwan=0;
|
|
|
|
int hasVSU=0;
|
|
|
|
int hasSAA=0;
|
|
|
|
int hasES5503=0;
|
|
|
|
int hasES5505=0;
|
|
|
|
int hasX1=0;
|
|
|
|
int hasC352=0;
|
|
|
|
int hasGA20=0;
|
2022-02-20 17:15:15 +00:00
|
|
|
int hasLynx=0;
|
2022-02-18 17:58:36 +00:00
|
|
|
|
|
|
|
int howManyChips=0;
|
|
|
|
|
|
|
|
int loopPos=-1;
|
|
|
|
int loopTick=-1;
|
|
|
|
|
|
|
|
SafeWriter* w=new SafeWriter;
|
|
|
|
w->init();
|
|
|
|
|
|
|
|
// write header
|
|
|
|
w->write("Vgm ",4);
|
|
|
|
w->writeI(0); // will be written later
|
2022-04-02 02:40:32 +00:00
|
|
|
w->writeI(version);
|
2022-02-18 17:58:36 +00:00
|
|
|
|
|
|
|
bool willExport[32];
|
|
|
|
bool isSecond[32];
|
|
|
|
int streamIDs[32];
|
|
|
|
double loopTimer[DIV_MAX_CHANS];
|
|
|
|
double loopFreq[DIV_MAX_CHANS];
|
|
|
|
int loopSample[DIV_MAX_CHANS];
|
|
|
|
|
|
|
|
for (int i=0; i<DIV_MAX_CHANS; i++) {
|
|
|
|
loopTimer[i]=0;
|
|
|
|
loopFreq[i]=0;
|
|
|
|
loopSample[i]=-1;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool writeDACSamples=false;
|
|
|
|
bool writeNESSamples=false;
|
|
|
|
bool writePCESamples=false;
|
2022-05-19 23:09:46 +00:00
|
|
|
DivDispatch* writeADPCM_OPNA[2]={NULL,NULL};
|
|
|
|
DivDispatch* writeADPCM_OPNB[2]={NULL,NULL};
|
|
|
|
DivDispatch* writeADPCM_Y8950[2]={NULL,NULL};
|
2022-04-16 15:54:01 +00:00
|
|
|
int writeSegaPCM=0;
|
2022-05-01 17:57:44 +00:00
|
|
|
DivDispatch* writeX1010[2]={NULL,NULL};
|
|
|
|
DivDispatch* writeQSound[2]={NULL,NULL};
|
2022-05-18 06:55:33 +00:00
|
|
|
DivDispatch* writeZ280[2]={NULL,NULL};
|
2022-05-20 18:45:26 +00:00
|
|
|
DivDispatch* writeRF5C68[2]={NULL,NULL};
|
2022-02-18 17:58:36 +00:00
|
|
|
|
|
|
|
for (int i=0; i<song.systemLen; i++) {
|
|
|
|
willExport[i]=false;
|
|
|
|
isSecond[i]=false;
|
|
|
|
streamIDs[i]=0;
|
|
|
|
if (sysToExport!=NULL) {
|
|
|
|
if (!sysToExport[i]) continue;
|
|
|
|
}
|
2022-04-02 02:40:32 +00:00
|
|
|
if (minVGMVersion(song.system[i])>version) continue;
|
2022-02-18 17:58:36 +00:00
|
|
|
switch (song.system[i]) {
|
|
|
|
case DIV_SYSTEM_SMS:
|
|
|
|
if (!hasSN) {
|
|
|
|
hasSN=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
switch ((song.systemFlags[i]>>2)&3) {
|
|
|
|
case 1: // real SN
|
|
|
|
snNoiseConfig=3;
|
|
|
|
snNoiseSize=15;
|
|
|
|
break;
|
|
|
|
case 2: // real SN atari bass (seemingly unsupported)
|
|
|
|
snNoiseConfig=3;
|
|
|
|
snNoiseSize=15;
|
|
|
|
break;
|
|
|
|
default: // Sega VDP
|
|
|
|
snNoiseConfig=9;
|
|
|
|
snNoiseSize=16;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else if (!(hasSN&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasSN|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_GB:
|
|
|
|
if (!hasGB) {
|
|
|
|
hasGB=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasGB&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasGB|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_PCE:
|
|
|
|
if (!hasPCE) {
|
|
|
|
hasPCE=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
writePCESamples=true;
|
|
|
|
} else if (!(hasPCE&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasPCE|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_NES:
|
|
|
|
if (!hasNES) {
|
|
|
|
hasNES=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeNESSamples=true;
|
|
|
|
} else if (!(hasNES&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasNES|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-02-27 05:39:16 +00:00
|
|
|
case DIV_SYSTEM_SEGAPCM:
|
|
|
|
case DIV_SYSTEM_SEGAPCM_COMPAT:
|
2022-02-18 17:58:36 +00:00
|
|
|
if (!hasSegaPCM) {
|
|
|
|
hasSegaPCM=4000000;
|
|
|
|
willExport[i]=true;
|
2022-04-16 15:54:01 +00:00
|
|
|
writeSegaPCM=1;
|
2022-02-18 17:58:36 +00:00
|
|
|
} else if (!(hasSegaPCM&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
2022-04-16 15:54:01 +00:00
|
|
|
writeSegaPCM=2;
|
2022-02-18 17:58:36 +00:00
|
|
|
hasSegaPCM|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-03-06 17:31:03 +00:00
|
|
|
case DIV_SYSTEM_X1_010:
|
2022-03-12 14:39:38 +00:00
|
|
|
if (!hasX1) {
|
|
|
|
hasX1=disCont[i].dispatch->chipClock;
|
2022-03-06 17:31:03 +00:00
|
|
|
willExport[i]=true;
|
2022-05-01 17:57:44 +00:00
|
|
|
writeX1010[0]=disCont[i].dispatch;
|
2022-03-12 14:39:38 +00:00
|
|
|
} else if (!(hasX1&0x40000000)) {
|
2022-03-06 17:31:03 +00:00
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
2022-05-01 17:57:44 +00:00
|
|
|
writeX1010[1]=disCont[i].dispatch;
|
2022-03-12 14:39:38 +00:00
|
|
|
hasX1|=0x40000000;
|
2022-03-06 17:31:03 +00:00
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-02-18 17:58:36 +00:00
|
|
|
case DIV_SYSTEM_YM2610:
|
|
|
|
case DIV_SYSTEM_YM2610_FULL:
|
2022-02-24 16:02:35 +00:00
|
|
|
case DIV_SYSTEM_YM2610B:
|
2022-02-18 17:58:36 +00:00
|
|
|
case DIV_SYSTEM_YM2610_EXT:
|
|
|
|
case DIV_SYSTEM_YM2610_FULL_EXT:
|
2022-02-24 16:02:35 +00:00
|
|
|
case DIV_SYSTEM_YM2610B_EXT:
|
2022-02-18 17:58:36 +00:00
|
|
|
if (!hasOPNB) {
|
|
|
|
hasOPNB=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
2022-05-19 23:09:46 +00:00
|
|
|
writeADPCM_OPNB[0]=disCont[i].dispatch;
|
2022-02-18 17:58:36 +00:00
|
|
|
} else if (!(hasOPNB&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
2022-05-19 23:09:46 +00:00
|
|
|
writeADPCM_OPNB[1]=disCont[i].dispatch;
|
2022-02-18 17:58:36 +00:00
|
|
|
hasOPNB|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
2022-02-25 08:37:43 +00:00
|
|
|
if (((song.system[i]==DIV_SYSTEM_YM2610B) || (song.system[i]==DIV_SYSTEM_YM2610B_EXT)) && (!(hasOPNB&0x80000000))) { // YM2610B flag
|
2022-02-24 16:02:35 +00:00
|
|
|
hasOPNB|=0x80000000;
|
2022-03-07 15:15:21 +00:00
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_AY8910:
|
2022-05-14 15:58:00 +00:00
|
|
|
case DIV_SYSTEM_AY8930: {
|
2022-02-18 17:58:36 +00:00
|
|
|
if (!hasAY) {
|
2022-05-14 15:58:00 +00:00
|
|
|
bool hasClockDivider=false; // Configurable clock divider
|
|
|
|
bool hasStereo=true; // Stereo
|
2022-02-18 17:58:36 +00:00
|
|
|
hasAY=disCont[i].dispatch->chipClock;
|
|
|
|
ayFlags=1;
|
2022-05-14 15:58:00 +00:00
|
|
|
if (song.system[i]==DIV_SYSTEM_AY8930) { // AY8930
|
|
|
|
ayConfig=0x03;
|
|
|
|
hasClockDivider=true;
|
|
|
|
} else {
|
|
|
|
switch ((song.systemFlags[i]>>4)&3) {
|
|
|
|
default:
|
|
|
|
case 0: // AY8910
|
|
|
|
ayConfig=0x00;
|
|
|
|
break;
|
|
|
|
case 1: // YM2149
|
|
|
|
ayConfig=0x10;
|
|
|
|
hasClockDivider=true;
|
|
|
|
break;
|
|
|
|
case 2: // Sunsoft 5B
|
|
|
|
ayConfig=0x10;
|
|
|
|
ayFlags|=0x12; // Clock internally divided, Single sound output
|
|
|
|
hasStereo=false; // due to above, can't be per-channel stereo configurable
|
|
|
|
break;
|
|
|
|
case 3: // AY8914
|
|
|
|
ayConfig=0x04;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (hasClockDivider && ((song.systemFlags[i]>>7)&1)) {
|
|
|
|
ayFlags|=0x10;
|
|
|
|
}
|
|
|
|
if (hasStereo && ((song.systemFlags[i]>>6)&1)) {
|
|
|
|
ayFlags|=0x80;
|
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasAY&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasAY|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-05-14 15:58:00 +00:00
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
case DIV_SYSTEM_SAA1099:
|
|
|
|
if (!hasSAA) {
|
|
|
|
hasSAA=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasSAA&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasSAA|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_YM2612:
|
2022-02-27 05:41:27 +00:00
|
|
|
case DIV_SYSTEM_YM2612_EXT:
|
2022-02-18 17:58:36 +00:00
|
|
|
if (!hasOPN2) {
|
|
|
|
hasOPN2=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeDACSamples=true;
|
|
|
|
} else if (!(hasOPN2&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasOPN2|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_YM2151:
|
|
|
|
if (!hasOPM) {
|
|
|
|
hasOPM=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasOPM&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasOPM|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
2022-02-21 18:58:14 +00:00
|
|
|
break;
|
2022-05-11 08:41:02 +00:00
|
|
|
case DIV_SYSTEM_OPN:
|
2022-05-19 22:46:41 +00:00
|
|
|
case DIV_SYSTEM_OPN_EXT:
|
2022-05-11 08:41:02 +00:00
|
|
|
if (!hasOPN) {
|
|
|
|
hasOPN=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeDACSamples=true;
|
|
|
|
} else if (!(hasOPN&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasOPN|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-05-19 23:09:46 +00:00
|
|
|
case DIV_SYSTEM_PC98:
|
|
|
|
case DIV_SYSTEM_PC98_EXT:
|
|
|
|
if (!hasOPNA) {
|
|
|
|
hasOPNA=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeADPCM_OPNA[0]=disCont[i].dispatch;
|
|
|
|
} else if (!(hasOPNA&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeADPCM_OPNA[1]=disCont[i].dispatch;
|
|
|
|
hasOPNA|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-03-02 05:58:49 +00:00
|
|
|
case DIV_SYSTEM_OPLL:
|
|
|
|
case DIV_SYSTEM_OPLL_DRUMS:
|
|
|
|
case DIV_SYSTEM_VRC7:
|
|
|
|
if (!hasOPLL) {
|
|
|
|
hasOPLL=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasOPLL&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasOPLL|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-04-04 03:37:16 +00:00
|
|
|
case DIV_SYSTEM_FDS:
|
|
|
|
if (!hasNES) {
|
|
|
|
hasNES=0x80000000|disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasNES&0x80000000)) {
|
|
|
|
hasNES|=0x80000000;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasNES&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasNES|=0xc0000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-02-20 17:15:15 +00:00
|
|
|
case DIV_SYSTEM_LYNX:
|
|
|
|
if (!hasLynx) {
|
|
|
|
hasLynx=disCont[i].dispatch->chipClock;
|
2022-02-22 23:21:57 +00:00
|
|
|
willExport[i]=true;
|
2022-02-20 17:15:15 +00:00
|
|
|
} else if (!(hasLynx&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasLynx|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
break;
|
2022-02-22 09:01:57 +00:00
|
|
|
case DIV_SYSTEM_QSOUND:
|
|
|
|
if (!hasQSound) {
|
2022-02-22 23:21:57 +00:00
|
|
|
// could set chipClock to 4000000 here for compatibility
|
|
|
|
// However I think it it not necessary because old VGM players will still
|
|
|
|
// not be able to handle the 64kb sample bank trick
|
2022-02-22 09:01:57 +00:00
|
|
|
hasQSound=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
2022-05-01 17:57:44 +00:00
|
|
|
writeQSound[0]=disCont[i].dispatch;
|
2022-02-22 09:01:57 +00:00
|
|
|
} else if (!(hasQSound&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=false;
|
2022-05-01 17:57:44 +00:00
|
|
|
writeQSound[1]=disCont[i].dispatch;
|
2022-02-22 09:01:57 +00:00
|
|
|
addWarning("dual QSound is not supported by the VGM format");
|
|
|
|
}
|
|
|
|
break;
|
2022-03-06 16:13:47 +00:00
|
|
|
case DIV_SYSTEM_SWAN:
|
|
|
|
if (!hasSwan) {
|
|
|
|
hasSwan=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
// funny enough, VGM doesn't have support for WSC's sound DMA by design
|
|
|
|
// so DAC stream it goes
|
|
|
|
// since WS has the same PCM format as YM2612 DAC, I can just reuse this flag
|
|
|
|
writeDACSamples=true;
|
|
|
|
} else if (!(hasSwan&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasSwan|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-03-30 08:36:16 +00:00
|
|
|
case DIV_SYSTEM_OPL:
|
|
|
|
case DIV_SYSTEM_OPL_DRUMS:
|
|
|
|
if (!hasOPL) {
|
|
|
|
hasOPL=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasOPL&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasOPL|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-05-19 23:09:46 +00:00
|
|
|
case DIV_SYSTEM_Y8950:
|
|
|
|
case DIV_SYSTEM_Y8950_DRUMS:
|
|
|
|
if (!hasY8950) {
|
|
|
|
hasY8950=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeADPCM_Y8950[0]=disCont[i].dispatch;
|
|
|
|
} else if (!(hasY8950&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeADPCM_Y8950[1]=disCont[i].dispatch;
|
|
|
|
hasY8950|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-03-30 08:36:16 +00:00
|
|
|
case DIV_SYSTEM_OPL2:
|
|
|
|
case DIV_SYSTEM_OPL2_DRUMS:
|
|
|
|
if (!hasOPL2) {
|
|
|
|
hasOPL2=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasOPL2&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasOPL2|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_OPL3:
|
|
|
|
case DIV_SYSTEM_OPL3_DRUMS:
|
|
|
|
if (!hasOPL3) {
|
|
|
|
hasOPL3=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasOPL3&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasOPL3|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-05-11 07:20:14 +00:00
|
|
|
case DIV_SYSTEM_SCC:
|
|
|
|
case DIV_SYSTEM_SCC_PLUS:
|
|
|
|
if (!hasK051649) {
|
|
|
|
hasK051649=disCont[i].dispatch->chipClock;
|
|
|
|
if (song.system[i]==DIV_SYSTEM_SCC_PLUS) {
|
|
|
|
hasK051649|=0x80000000;
|
|
|
|
}
|
|
|
|
willExport[i]=true;
|
|
|
|
} else if (!(hasK051649&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
hasK051649|=0x40000000;
|
|
|
|
if (song.system[i]==DIV_SYSTEM_SCC_PLUS) {
|
|
|
|
hasK051649|=0x80000000;
|
|
|
|
}
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-05-18 06:55:33 +00:00
|
|
|
case DIV_SYSTEM_YMZ280B:
|
|
|
|
if (!hasZ280) {
|
|
|
|
hasZ280=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeZ280[0]=disCont[i].dispatch;
|
|
|
|
} else if (!(hasZ280&0x40000000)) {
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeZ280[1]=disCont[i].dispatch;
|
|
|
|
hasZ280|=0x40000000;
|
|
|
|
howManyChips++;
|
|
|
|
}
|
|
|
|
break;
|
2022-05-20 18:45:26 +00:00
|
|
|
case DIV_SYSTEM_RF5C68:
|
|
|
|
// here's the dumb part: VGM thinks RF5C68 and RF5C164 are different
|
|
|
|
// chips even though the only difference is the output resolution
|
|
|
|
// these system types are currently handled by reusing isSecond flag
|
|
|
|
// also this system is not dual-able
|
|
|
|
if ((song.systemFlags[i]>>4)==1) {
|
|
|
|
if (!hasRFC1) {
|
|
|
|
hasRFC1=disCont[i].dispatch->chipClock;
|
|
|
|
isSecond[i]=true;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeRF5C68[1]=disCont[i].dispatch;
|
|
|
|
}
|
|
|
|
} else if (!hasRFC) {
|
|
|
|
hasRFC=disCont[i].dispatch->chipClock;
|
|
|
|
willExport[i]=true;
|
|
|
|
writeRF5C68[0]=disCont[i].dispatch;
|
2022-05-20 20:36:11 +00:00
|
|
|
}
|
2022-05-20 18:45:26 +00:00
|
|
|
break;
|
2022-02-18 17:58:36 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (willExport[i]) {
|
|
|
|
disCont[i].dispatch->toggleRegisterDump(true);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
//bool wantsExtraHeader=false;
|
|
|
|
/*for (int i=0; i<song.systemLen; i++) {
|
|
|
|
if (isSecond[i]) {
|
|
|
|
wantsExtraHeader=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}*/
|
|
|
|
|
|
|
|
// write chips and stuff
|
|
|
|
w->writeI(hasSN);
|
|
|
|
w->writeI(hasOPLL);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0); // length. will be written later
|
|
|
|
w->writeI(0); // loop. will be written later
|
|
|
|
w->writeI(0); // loop length. why is this necessary?
|
|
|
|
w->writeI(0); // tick rate
|
|
|
|
w->writeS(snNoiseConfig);
|
|
|
|
w->writeC(snNoiseSize);
|
2022-04-02 02:40:32 +00:00
|
|
|
if (version>=0x151) {
|
|
|
|
w->writeC(snFlags);
|
|
|
|
} else {
|
|
|
|
w->writeC(0);
|
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeI(hasOPN2);
|
|
|
|
w->writeI(hasOPM);
|
|
|
|
w->writeI(0); // data pointer. will be written later
|
2022-04-02 02:40:32 +00:00
|
|
|
if (version>=0x151) {
|
|
|
|
w->writeI(hasSegaPCM);
|
|
|
|
w->writeI(segaPCMOffset);
|
|
|
|
w->writeI(hasRFC);
|
|
|
|
w->writeI(hasOPN);
|
|
|
|
w->writeI(hasOPNA);
|
|
|
|
w->writeI(hasOPNB);
|
|
|
|
w->writeI(hasOPL2);
|
|
|
|
w->writeI(hasOPL);
|
|
|
|
w->writeI(hasY8950);
|
|
|
|
w->writeI(hasOPL3);
|
|
|
|
w->writeI(hasOPL4);
|
|
|
|
w->writeI(hasOPX);
|
|
|
|
w->writeI(hasZ280);
|
|
|
|
w->writeI(hasRFC1);
|
|
|
|
w->writeI(hasPWM);
|
|
|
|
w->writeI(hasAY);
|
|
|
|
w->writeC(ayConfig);
|
|
|
|
w->writeC(ayFlags);
|
|
|
|
w->writeC(ayFlags); // OPN
|
|
|
|
w->writeC(ayFlags); // OPNA
|
|
|
|
} else {
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(0); // OPN
|
|
|
|
w->writeC(0); // OPNA
|
|
|
|
}
|
|
|
|
// currently not used but is part of 1.60
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0); // volume
|
|
|
|
w->writeC(0); // reserved
|
|
|
|
w->writeC(0); // loop count
|
2022-04-02 02:40:32 +00:00
|
|
|
// 1.51
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0); // loop modifier
|
2022-04-02 02:40:32 +00:00
|
|
|
|
|
|
|
if (version>=0x161) {
|
|
|
|
w->writeI(hasGB);
|
|
|
|
w->writeI(hasNES);
|
|
|
|
w->writeI(hasMultiPCM);
|
|
|
|
w->writeI(hasuPD7759);
|
|
|
|
w->writeI(hasOKIM6258);
|
|
|
|
w->writeC(0); // flags
|
|
|
|
w->writeC(0); // K flags
|
|
|
|
w->writeC(0); // C140 chip type
|
|
|
|
w->writeC(0); // reserved
|
|
|
|
w->writeI(hasOKIM6295);
|
|
|
|
w->writeI(hasK051649);
|
|
|
|
w->writeI(hasK054539);
|
|
|
|
w->writeI(hasPCE);
|
|
|
|
w->writeI(hasNamco);
|
|
|
|
w->writeI(hasK053260);
|
|
|
|
w->writeI(hasPOKEY);
|
|
|
|
w->writeI(hasQSound);
|
|
|
|
} else {
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeC(0); // flags
|
|
|
|
w->writeC(0); // K flags
|
|
|
|
w->writeC(0); // C140 chip type
|
|
|
|
w->writeC(0); // reserved
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
}
|
|
|
|
if (version>=0x171) {
|
|
|
|
w->writeI(hasSCSP);
|
|
|
|
} else {
|
|
|
|
w->writeI(0);
|
|
|
|
}
|
|
|
|
// 1.70
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeI(0); // extra header
|
2022-04-02 02:40:32 +00:00
|
|
|
// 1.71
|
|
|
|
if (version>=0x171) {
|
|
|
|
w->writeI(hasSwan);
|
|
|
|
w->writeI(hasVSU);
|
|
|
|
w->writeI(hasSAA);
|
|
|
|
w->writeI(hasES5503);
|
|
|
|
w->writeI(hasES5505);
|
|
|
|
w->writeC(0); // 5503 chans
|
|
|
|
w->writeC(0); // 5505 chans
|
|
|
|
w->writeC(0); // C352 clock divider
|
|
|
|
w->writeC(0); // reserved
|
|
|
|
w->writeI(hasX1);
|
|
|
|
w->writeI(hasC352);
|
|
|
|
w->writeI(hasGA20);
|
|
|
|
w->writeI(hasLynx);
|
|
|
|
} else {
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeC(0); // 5503 chans
|
|
|
|
w->writeC(0); // 5505 chans
|
|
|
|
w->writeC(0); // C352 clock divider
|
|
|
|
w->writeC(0); // reserved
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
}
|
2022-02-20 17:15:15 +00:00
|
|
|
for (int i=0; i<6; i++) { // reserved
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeI(0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* TODO
|
|
|
|
unsigned int exHeaderOff=w->tell();
|
|
|
|
if (wantsExtraHeader) {
|
|
|
|
w->writeI(4);
|
|
|
|
w->writeI(4);
|
|
|
|
|
|
|
|
// write clocks
|
|
|
|
w->writeC(howManyChips);
|
|
|
|
}*/
|
|
|
|
|
|
|
|
unsigned int songOff=w->tell();
|
|
|
|
|
|
|
|
// write samples
|
|
|
|
unsigned int sampleSeek=0;
|
|
|
|
for (int i=0; i<song.sampleLen; i++) {
|
|
|
|
DivSample* sample=song.sample[i];
|
2022-04-11 03:12:02 +00:00
|
|
|
logI("setting seek to %d",sampleSeek);
|
2022-02-24 08:57:45 +00:00
|
|
|
sample->off8=sampleSeek;
|
|
|
|
sampleSeek+=sample->length8;
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (writeDACSamples) for (int i=0; i<song.sampleLen; i++) {
|
|
|
|
DivSample* sample=song.sample[i];
|
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0);
|
2022-02-24 08:57:45 +00:00
|
|
|
w->writeI(sample->length8);
|
|
|
|
for (unsigned int j=0; j<sample->length8; j++) {
|
|
|
|
w->writeC((unsigned char)sample->data8[j]+0x80);
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (writeNESSamples) for (int i=0; i<song.sampleLen; i++) {
|
|
|
|
DivSample* sample=song.sample[i];
|
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(7);
|
2022-02-24 08:57:45 +00:00
|
|
|
w->writeI(sample->length8);
|
|
|
|
for (unsigned int j=0; j<sample->length8; j++) {
|
|
|
|
w->writeC(((unsigned char)sample->data8[j]+0x80)>>1);
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (writePCESamples) for (int i=0; i<song.sampleLen; i++) {
|
|
|
|
DivSample* sample=song.sample[i];
|
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(5);
|
2022-02-24 08:57:45 +00:00
|
|
|
w->writeI(sample->length8);
|
|
|
|
for (unsigned int j=0; j<sample->length8; j++) {
|
|
|
|
w->writeC(((unsigned char)sample->data8[j]+0x80)>>3);
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-04-16 15:54:01 +00:00
|
|
|
if (writeSegaPCM>0) {
|
2022-02-18 17:58:36 +00:00
|
|
|
unsigned char* pcmMem=new unsigned char[16777216];
|
|
|
|
|
|
|
|
size_t memPos=0;
|
|
|
|
for (int i=0; i<song.sampleLen; i++) {
|
|
|
|
DivSample* sample=song.sample[i];
|
2022-05-17 07:38:13 +00:00
|
|
|
unsigned int alignedSize=(sample->length8+0xff)&(~0xff);
|
|
|
|
if (alignedSize>65536) alignedSize=65536;
|
|
|
|
if ((memPos&0xff0000)!=((memPos+alignedSize)&0xff0000)) {
|
2022-02-18 17:58:36 +00:00
|
|
|
memPos=(memPos+0xffff)&0xff0000;
|
|
|
|
}
|
2022-05-17 07:38:13 +00:00
|
|
|
logV("- sample %d will be at %x with length %x",i,memPos,alignedSize);
|
2022-02-18 17:58:36 +00:00
|
|
|
if (memPos>=16777216) break;
|
2022-02-24 08:57:45 +00:00
|
|
|
sample->offSegaPCM=memPos;
|
2022-02-18 17:58:36 +00:00
|
|
|
unsigned int readPos=0;
|
2022-02-24 08:57:45 +00:00
|
|
|
for (unsigned int j=0; j<alignedSize; j++) {
|
|
|
|
if (readPos>=sample->length8) {
|
|
|
|
if (sample->loopStart>=0 && sample->loopStart<(int)sample->length8) {
|
|
|
|
readPos=sample->loopStart;
|
|
|
|
pcmMem[memPos++]=((unsigned char)sample->data8[readPos]+0x80);
|
2022-02-18 17:58:36 +00:00
|
|
|
} else {
|
2022-02-24 08:57:45 +00:00
|
|
|
pcmMem[memPos++]=0x80;
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
2022-02-24 08:57:45 +00:00
|
|
|
} else {
|
|
|
|
pcmMem[memPos++]=((unsigned char)sample->data8[readPos]+0x80);
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
2022-02-24 08:57:45 +00:00
|
|
|
readPos++;
|
|
|
|
if (memPos>=16777216) break;
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
2022-02-24 08:57:45 +00:00
|
|
|
sample->loopOffP=readPos-sample->loopStart;
|
2022-02-18 17:58:36 +00:00
|
|
|
if (memPos>=16777216) break;
|
|
|
|
}
|
|
|
|
|
2022-04-16 15:54:01 +00:00
|
|
|
for (int i=0; i<writeSegaPCM; i++) {
|
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0x80);
|
|
|
|
w->writeI((memPos+8)|(i*0x80000000));
|
|
|
|
w->writeI(memPos);
|
|
|
|
w->writeI(0);
|
|
|
|
w->write(pcmMem,memPos);
|
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
|
|
|
|
delete[] pcmMem;
|
|
|
|
}
|
|
|
|
|
2022-05-19 23:09:46 +00:00
|
|
|
for (int i=0; i<2; i++) {
|
2022-05-20 19:34:51 +00:00
|
|
|
// ADPCM (OPNA)
|
2022-05-19 23:09:46 +00:00
|
|
|
if (writeADPCM_OPNA[i]!=NULL && writeADPCM_OPNA[i]->getSampleMemUsage(0)>0) {
|
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0x81);
|
|
|
|
w->writeI((writeADPCM_OPNA[i]->getSampleMemUsage(0)+8)|(i*0x80000000));
|
|
|
|
w->writeI(writeADPCM_OPNA[i]->getSampleMemCapacity(0));
|
|
|
|
w->writeI(0);
|
|
|
|
w->write(writeADPCM_OPNA[i]->getSampleMem(0),writeADPCM_OPNA[i]->getSampleMemUsage(0));
|
|
|
|
}
|
2022-05-20 19:34:51 +00:00
|
|
|
// ADPCM-A (OPNB)
|
2022-05-19 23:09:46 +00:00
|
|
|
if (writeADPCM_OPNB[i]!=NULL && writeADPCM_OPNB[i]->getSampleMemUsage(0)>0) {
|
2022-04-16 15:54:01 +00:00
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0x82);
|
2022-05-19 23:09:46 +00:00
|
|
|
w->writeI((writeADPCM_OPNB[i]->getSampleMemUsage(0)+8)|(i*0x80000000));
|
|
|
|
w->writeI(writeADPCM_OPNB[i]->getSampleMemCapacity(0));
|
2022-04-16 15:54:01 +00:00
|
|
|
w->writeI(0);
|
2022-05-19 23:09:46 +00:00
|
|
|
w->write(writeADPCM_OPNB[i]->getSampleMem(0),writeADPCM_OPNB[i]->getSampleMemUsage(0));
|
2022-04-16 15:54:01 +00:00
|
|
|
}
|
2022-05-20 19:34:51 +00:00
|
|
|
// ADPCM-B (OPNB)
|
2022-05-19 23:09:46 +00:00
|
|
|
if (writeADPCM_OPNB[i]!=NULL && writeADPCM_OPNB[i]->getSampleMemUsage(1)>0) {
|
2022-04-16 15:54:01 +00:00
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0x83);
|
2022-05-19 23:09:46 +00:00
|
|
|
w->writeI((writeADPCM_OPNB[i]->getSampleMemUsage(1)+8)|(i*0x80000000));
|
|
|
|
w->writeI(writeADPCM_OPNB[i]->getSampleMemCapacity(1));
|
|
|
|
w->writeI(0);
|
|
|
|
w->write(writeADPCM_OPNB[i]->getSampleMem(1),writeADPCM_OPNB[i]->getSampleMemUsage(1));
|
|
|
|
}
|
2022-05-20 19:34:51 +00:00
|
|
|
// ADPCM (Y8950)
|
2022-05-19 23:09:46 +00:00
|
|
|
if (writeADPCM_Y8950[i]!=NULL && writeADPCM_Y8950[i]->getSampleMemUsage(0)>0) {
|
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0x88);
|
|
|
|
w->writeI((writeADPCM_Y8950[i]->getSampleMemUsage(0)+8)|(i*0x80000000));
|
|
|
|
w->writeI(writeADPCM_Y8950[i]->getSampleMemCapacity(0));
|
2022-04-16 15:54:01 +00:00
|
|
|
w->writeI(0);
|
2022-05-19 23:09:46 +00:00
|
|
|
w->write(writeADPCM_Y8950[i]->getSampleMem(0),writeADPCM_Y8950[i]->getSampleMemUsage(0));
|
2022-04-16 15:54:01 +00:00
|
|
|
}
|
2022-05-01 17:57:44 +00:00
|
|
|
if (writeQSound[i]!=NULL && writeQSound[i]->getSampleMemUsage()>0) {
|
|
|
|
unsigned int blockSize=(writeQSound[i]->getSampleMemUsage()+0xffff)&(~0xffff);
|
|
|
|
if (blockSize > 0x1000000) {
|
|
|
|
blockSize = 0x1000000;
|
|
|
|
}
|
2022-04-16 15:54:01 +00:00
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0x8F);
|
|
|
|
w->writeI((blockSize+8)|(i*0x80000000));
|
2022-05-01 17:57:44 +00:00
|
|
|
w->writeI(writeQSound[i]->getSampleMemCapacity());
|
2022-04-16 15:54:01 +00:00
|
|
|
w->writeI(0);
|
2022-05-01 17:57:44 +00:00
|
|
|
w->write(writeQSound[i]->getSampleMem(),blockSize);
|
2022-04-16 15:54:01 +00:00
|
|
|
}
|
2022-05-01 17:57:44 +00:00
|
|
|
if (writeX1010[i]!=NULL && writeX1010[i]->getSampleMemUsage()>0) {
|
2022-04-16 15:54:01 +00:00
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0x91);
|
2022-05-01 17:57:44 +00:00
|
|
|
w->writeI((writeX1010[i]->getSampleMemUsage()+8)|(i*0x80000000));
|
|
|
|
w->writeI(writeX1010[i]->getSampleMemCapacity());
|
2022-04-16 15:54:01 +00:00
|
|
|
w->writeI(0);
|
2022-05-01 17:57:44 +00:00
|
|
|
w->write(writeX1010[i]->getSampleMem(),writeX1010[i]->getSampleMemUsage());
|
2022-04-16 15:54:01 +00:00
|
|
|
}
|
2022-05-18 06:55:33 +00:00
|
|
|
if (writeZ280[i]!=NULL && writeZ280[i]->getSampleMemUsage()>0) {
|
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0x86);
|
|
|
|
w->writeI((writeZ280[i]->getSampleMemUsage()+8)|(i*0x80000000));
|
|
|
|
w->writeI(writeZ280[i]->getSampleMemCapacity());
|
|
|
|
w->writeI(0);
|
|
|
|
w->write(writeZ280[i]->getSampleMem(),writeZ280[i]->getSampleMemUsage());
|
|
|
|
}
|
2022-03-06 17:31:03 +00:00
|
|
|
}
|
|
|
|
|
2022-05-20 18:45:26 +00:00
|
|
|
for (int i=0; i<2; i++) {
|
|
|
|
if (writeRF5C68[i]!=NULL && writeRF5C68[i]->getSampleMemUsage()>0) {
|
|
|
|
w->writeC(0x67);
|
|
|
|
w->writeC(0x66);
|
|
|
|
w->writeC(0xc0+i);
|
|
|
|
w->writeI(writeRF5C68[i]->getSampleMemUsage()+8);
|
|
|
|
w->writeI(writeRF5C68[i]->getSampleMemCapacity());
|
|
|
|
w->writeI(0);
|
|
|
|
w->write(writeRF5C68[i]->getSampleMem(),writeRF5C68[i]->getSampleMemUsage());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-02-18 17:58:36 +00:00
|
|
|
// initialize streams
|
|
|
|
int streamID=0;
|
|
|
|
for (int i=0; i<song.systemLen; i++) {
|
|
|
|
if (!willExport[i]) continue;
|
|
|
|
streamIDs[i]=streamID;
|
|
|
|
switch (song.system[i]) {
|
2022-02-27 05:39:16 +00:00
|
|
|
case DIV_SYSTEM_YM2612:
|
|
|
|
case DIV_SYSTEM_YM2612_EXT:
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0x90);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeC(0x02);
|
|
|
|
w->writeC(0); // port
|
|
|
|
w->writeC(0x2a); // DAC
|
|
|
|
|
|
|
|
w->writeC(0x91);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(1);
|
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
w->writeC(0x92);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeI(32000); // default
|
|
|
|
streamID++;
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_NES:
|
|
|
|
w->writeC(0x90);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeC(20);
|
|
|
|
w->writeC(0); // port
|
|
|
|
w->writeC(0x11); // DAC
|
|
|
|
|
|
|
|
w->writeC(0x91);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeC(7);
|
|
|
|
w->writeC(1);
|
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
w->writeC(0x92);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeI(32000); // default
|
|
|
|
streamID++;
|
|
|
|
break;
|
|
|
|
case DIV_SYSTEM_PCE:
|
|
|
|
for (int j=0; j<6; j++) {
|
|
|
|
w->writeC(0x90);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeC(27);
|
|
|
|
w->writeC(j); // port
|
|
|
|
w->writeC(0x06); // select+DAC
|
|
|
|
|
|
|
|
w->writeC(0x91);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeC(5);
|
|
|
|
w->writeC(1);
|
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
w->writeC(0x92);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeI(16000); // default
|
|
|
|
streamID++;
|
|
|
|
}
|
|
|
|
break;
|
2022-03-06 16:13:47 +00:00
|
|
|
case DIV_SYSTEM_SWAN:
|
|
|
|
w->writeC(0x90);
|
|
|
|
w->writeC(streamID);
|
2022-03-06 18:26:59 +00:00
|
|
|
w->writeC(isSecond[i]?0xa1:0x21);
|
2022-03-06 16:13:47 +00:00
|
|
|
w->writeC(0); // port
|
2022-03-06 18:26:59 +00:00
|
|
|
w->writeC(0x09); // DAC
|
2022-03-06 16:13:47 +00:00
|
|
|
|
|
|
|
w->writeC(0x91);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeC(0);
|
|
|
|
w->writeC(1);
|
|
|
|
w->writeC(0);
|
|
|
|
|
|
|
|
w->writeC(0x92);
|
|
|
|
w->writeC(streamID);
|
|
|
|
w->writeI(24000); // default
|
|
|
|
streamID++;
|
|
|
|
break;
|
2022-02-18 17:58:36 +00:00
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// write song data
|
|
|
|
playSub(false);
|
|
|
|
size_t tickCount=0;
|
|
|
|
bool writeLoop=false;
|
|
|
|
while (!done) {
|
|
|
|
if (loopPos==-1) {
|
|
|
|
if (loopOrder==curOrder && loopRow==curRow && ticks==1) {
|
|
|
|
writeLoop=true;
|
|
|
|
}
|
|
|
|
}
|
2022-04-16 03:27:44 +00:00
|
|
|
if (nextTick(false,true) || !playing) {
|
2022-02-18 17:58:36 +00:00
|
|
|
done=true;
|
|
|
|
if (!loop) {
|
|
|
|
for (int i=0; i<song.systemLen; i++) {
|
|
|
|
disCont[i].dispatch->getRegisterWrites().clear();
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
// stop all streams
|
|
|
|
for (int i=0; i<streamID; i++) {
|
|
|
|
w->writeC(0x94);
|
|
|
|
w->writeC(i);
|
|
|
|
loopSample[i]=-1;
|
|
|
|
}
|
2022-02-21 04:13:52 +00:00
|
|
|
|
|
|
|
if (!playing) {
|
|
|
|
writeLoop=false;
|
|
|
|
loopPos=-1;
|
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
|
|
|
// get register dumps
|
|
|
|
for (int i=0; i<song.systemLen; i++) {
|
|
|
|
std::vector<DivRegWrite>& writes=disCont[i].dispatch->getRegisterWrites();
|
|
|
|
for (DivRegWrite& j: writes) {
|
|
|
|
performVGMWrite(w,song.system[i],j,streamIDs[i],loopTimer,loopFreq,loopSample,isSecond[i]);
|
|
|
|
writeCount++;
|
|
|
|
}
|
|
|
|
writes.clear();
|
|
|
|
}
|
|
|
|
// check whether we need to loop
|
|
|
|
int totalWait=cycles>>MASTER_CLOCK_PREC;
|
|
|
|
for (int i=0; i<streamID; i++) {
|
|
|
|
if (loopSample[i]>=0) {
|
|
|
|
loopTimer[i]-=(loopFreq[i]/44100.0)*(double)totalWait;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
bool haveNegatives=false;
|
|
|
|
for (int i=0; i<streamID; i++) {
|
|
|
|
if (loopSample[i]>=0) {
|
|
|
|
if (loopTimer[i]<0) {
|
|
|
|
haveNegatives=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
while (haveNegatives) {
|
|
|
|
// finish all negatives
|
|
|
|
int nextToTouch=-1;
|
|
|
|
for (int i=0; i<streamID; i++) {
|
|
|
|
if (loopSample[i]>=0) {
|
|
|
|
if (loopTimer[i]<0) {
|
|
|
|
if (nextToTouch>=0) {
|
|
|
|
if (loopTimer[nextToTouch]>loopTimer[i]) nextToTouch=i;
|
|
|
|
} else {
|
|
|
|
nextToTouch=i;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (nextToTouch>=0) {
|
|
|
|
double waitTime=totalWait+(loopTimer[nextToTouch]*(44100.0/MAX(1,loopFreq[nextToTouch])));
|
|
|
|
if (waitTime>0) {
|
|
|
|
w->writeC(0x61);
|
|
|
|
w->writeS(waitTime);
|
2022-04-11 03:12:02 +00:00
|
|
|
logV("wait is: %f",waitTime);
|
2022-02-18 17:58:36 +00:00
|
|
|
totalWait-=waitTime;
|
|
|
|
tickCount+=waitTime;
|
|
|
|
}
|
|
|
|
if (loopSample[nextToTouch]<song.sampleLen) {
|
|
|
|
DivSample* sample=song.sample[loopSample[nextToTouch]];
|
|
|
|
// insert loop
|
2022-02-24 08:57:45 +00:00
|
|
|
if (sample->loopStart<(int)sample->length8) {
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0x93);
|
|
|
|
w->writeC(nextToTouch);
|
2022-02-24 08:57:45 +00:00
|
|
|
w->writeI(sample->off8+sample->loopStart);
|
2022-02-18 17:58:36 +00:00
|
|
|
w->writeC(0x81);
|
2022-02-24 08:57:45 +00:00
|
|
|
w->writeI(sample->length8-sample->loopStart);
|
2022-02-18 17:58:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
loopSample[nextToTouch]=-1;
|
|
|
|
} else {
|
|
|
|
haveNegatives=false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// write wait
|
|
|
|
if (totalWait>0) {
|
|
|
|
if (totalWait==735) {
|
|
|
|
w->writeC(0x62);
|
|
|
|
} else if (totalWait==882) {
|
|
|
|
w->writeC(0x63);
|
|
|
|
} else {
|
|
|
|
w->writeC(0x61);
|
|
|
|
w->writeS(totalWait);
|
|
|
|
}
|
|
|
|
tickCount+=totalWait;
|
|
|
|
}
|
|
|
|
if (writeLoop) {
|
|
|
|
writeLoop=false;
|
|
|
|
loopPos=w->tell();
|
|
|
|
loopTick=tickCount;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// end of song
|
|
|
|
w->writeC(0x66);
|
|
|
|
|
|
|
|
got.rate=origRate;
|
|
|
|
|
|
|
|
for (int i=0; i<song.systemLen; i++) {
|
|
|
|
disCont[i].dispatch->toggleRegisterDump(false);
|
|
|
|
}
|
|
|
|
|
|
|
|
// write GD3 tag
|
|
|
|
gd3Off=w->tell();
|
|
|
|
w->write("Gd3 ",4);
|
|
|
|
w->writeI(0x100);
|
|
|
|
w->writeI(0); // length. will be written later
|
|
|
|
|
|
|
|
WString ws;
|
|
|
|
ws=utf8To16(song.name.c_str());
|
|
|
|
w->writeWString(ws,false); // name
|
|
|
|
w->writeS(0); // japanese name
|
|
|
|
w->writeS(0); // game name
|
|
|
|
w->writeS(0); // japanese game name
|
|
|
|
if (song.systemLen>1) {
|
|
|
|
ws=L"Multiple Systems";
|
|
|
|
} else {
|
|
|
|
ws=utf8To16(getSystemName(song.system[0]));
|
|
|
|
}
|
|
|
|
w->writeWString(ws,false); // system name
|
|
|
|
if (song.systemLen>1) {
|
|
|
|
ws=L"複数システム";
|
|
|
|
} else {
|
|
|
|
ws=utf8To16(getSystemNameJ(song.system[0]));
|
|
|
|
}
|
|
|
|
w->writeWString(ws,false); // japanese system name
|
|
|
|
ws=utf8To16(song.author.c_str());
|
|
|
|
w->writeWString(ws,false); // author name
|
|
|
|
w->writeS(0); // japanese author name
|
|
|
|
w->writeS(0); // date
|
|
|
|
w->writeWString(L"Furnace Tracker",false); // ripper
|
|
|
|
w->writeS(0); // notes
|
|
|
|
|
|
|
|
int gd3Len=w->tell()-gd3Off-12;
|
|
|
|
|
|
|
|
w->seek(gd3Off+8,SEEK_SET);
|
|
|
|
w->writeI(gd3Len);
|
|
|
|
|
|
|
|
// finish file
|
|
|
|
size_t len=w->size()-4;
|
|
|
|
w->seek(4,SEEK_SET);
|
|
|
|
w->writeI(len);
|
|
|
|
w->seek(0x14,SEEK_SET);
|
|
|
|
w->writeI(gd3Off-0x14);
|
|
|
|
w->writeI(tickCount);
|
|
|
|
if (loop) {
|
2022-02-21 04:13:52 +00:00
|
|
|
if (loopPos==-1) {
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
} else {
|
|
|
|
w->writeI(loopPos-0x1c);
|
|
|
|
w->writeI(tickCount-loopTick-1);
|
|
|
|
}
|
2022-02-18 17:58:36 +00:00
|
|
|
} else {
|
|
|
|
w->writeI(0);
|
|
|
|
w->writeI(0);
|
|
|
|
}
|
|
|
|
w->seek(0x34,SEEK_SET);
|
|
|
|
w->writeI(songOff-0x34);
|
|
|
|
/*if (wantsExtraHeader) {
|
|
|
|
w->seek(0xbc,SEEK_SET);
|
|
|
|
w->writeI(exHeaderOff-0xbc);
|
|
|
|
}*/
|
|
|
|
|
|
|
|
remainingLoops=-1;
|
|
|
|
playing=false;
|
|
|
|
freelance=false;
|
|
|
|
extValuePresent=false;
|
|
|
|
|
2022-04-11 03:12:02 +00:00
|
|
|
logI("%d register writes total.",writeCount);
|
2022-02-18 17:58:36 +00:00
|
|
|
|
2022-03-24 02:38:28 +00:00
|
|
|
BUSY_END;
|
2022-02-18 17:58:36 +00:00
|
|
|
return w;
|
|
|
|
}
|