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Author SHA1 Message Date
LTVA1
b6ecd79ffa Merge branch 'master' of https://github.com/tildearrow/furnace into SID3 2024-08-14 21:19:12 +03:00
LTVA1
006fe144ac version bump... 2024-08-14 21:17:10 +03:00
LTVA1
7c324ec39d naive channel pair refactor (dumb replace one pair with vector of pairs) 2024-08-14 20:01:16 +03:00
cam900
f906b4ebe4 Safety check for MSM6295 bankswitched address 2024-08-14 17:54:20 +09:00
tildearrow
34517754ad port TIunA to export framework, part 4 
index option
 2024-08-13 18:42:11 -05:00
tildearrow
b7631542c6 port TIunA to export framework, part 3 
options
 2024-08-13 18:07:07 -05:00
tildearrow
249032f096 port TIunA to export framework, part 2 
progress bars!
 2024-08-13 17:47:18 -05:00
tildearrow
bb5ad38fb6 port TIunA to export framework, part 1 
part 2 includes progress bars and options
 2024-08-13 16:50:13 -05:00
tildearrow
aad42210d7 it kinda works 2024-08-13 14:34:06 -05:00
LTVA1
0ea53fdae5 phase reset effects & fix wavetable change 2024-08-13 20:36:45 +03:00
LTVA1
cc87178e41 a tiny bit of Russian translations 2024-08-13 19:09:47 +03:00
Yohanan
5afb68396b
add demo song 'The Only Way is Forward' (#2081) 
* add demo song 'The Only Way is Forward'

* demo song 'TheOnlyWayIsForward': convert samples to 8-bit
 2024-08-13 13:45:27 +02:00
tildearrow
e475b29ec3 a menu 2024-08-13 04:40:26 -05:00
tildearrow
b5e500d85d dev217 2024-08-13 04:14:46 -05:00
MooingLemur
0224882a42 oops, should have been 47.0.2 2024-08-13 04:11:08 -05:00
MooingLemur
3b9cf70ff5 VERA: bump default chip type 2024-08-13 04:11:08 -05:00
MooingLemur
a8122d3efd Add VERA 47.0.3 chip type 2024-08-13 04:11:08 -05:00
tildearrow
45eab67fd4 prepare more stuff 2024-08-13 04:10:03 -05:00
tildearrow
1bdcbf95d3 prepare a ROM export dialog 2024-08-12 23:20:08 -05:00
LTVA1
a244282626 update po files... 2024-08-12 19:08:28 +03:00
LTVA1
46f1ae33c7 add cutoff and pulse width slides for C64, SID2 and SID3 
Also add clipping for ADSR, duty and cutoff when in instrument types you go SID3 -> SID2 or SID2 -> C64 or SID3 -> C64
 2024-08-12 16:54:26 +03:00
LTVA1
e0df55749a MOAR EFFECTS!! 2024-08-12 12:59:34 +03:00
tildearrow
7591b2ed6a Byte-Sized Bop 
by Someone64
 2024-08-12 04:10:44 -05:00
LTVA1
6417da27e9 add different clock speed, optimize channel processing, add quarter clock speed flag 2024-08-12 11:22:10 +03:00
tildearrow
535c2dde79 a 2024-08-11 15:42:42 -05:00
LTVA1
802f55a26e hide some settings in inst UI for wave channel, do sample reg writes interleaved with usual reg writes 2024-08-11 21:41:48 +03:00
LTVA1
d38a2b4f37
Merge branch 'tildearrow:master' into SID3 2024-08-11 17:03:06 +03:00
LTVA1
65d65ef81e add phase invesrion for left/right channel and feedback 2024-08-11 16:47:49 +03:00
Background
035de0e767 opl the third 2024-08-11 12:52:06 +02:00
tildearrow
8d005f7cbc fix Linux build 2024-08-10 22:49:22 -05:00
tildearrow
0325f9ed57 NO 2024-08-10 19:50:58 -05:00
tildearrow
148f49eb2b further preparations 2024-08-10 19:38:50 -05:00
tildearrow
a4aa408912 apvr eatavel eao rso jyrsovrs 
to-do:
- make an "exporting ROM" dialog with progress and all
- move TIunA export to the ROM export framework
- perhaps do the same with ZSM in the future?
 2024-08-10 19:25:01 -05:00
LTVA1
f5877abafe add distortion to wave channel as well... 2024-08-10 23:45:12 +03:00
LTVA1
845b36e3f2 throw in some shitty asymmetrical distortion (no, it's not 6581 SID distortion you want... sigh) 2024-08-10 22:49:39 +03:00
LTVA1
57f4f64bbb clarify 2024-08-10 15:32:05 +03:00
LTVA1
3206b39525 add filter mode macro, SID2 wave mix macro tips 2024-08-10 14:21:28 +03:00
tildearrow
48523add00 asfgdhk;lj 2024-08-10 02:16:30 -05:00
tildearrow
4fe3822a7e 32x32sam 2024-08-09 16:06:34 -05:00
tildearrow
1b535704d0 one more demo song 
poltvick
 2024-08-09 16:04:54 -05:00
tildearrow
a9130a1e88 two demo songs 
by:
- Crisps
- Molkirill
 2024-08-09 16:03:18 -05:00
LTVA1
4ac2338cd7 sigh 6 2024-08-09 15:41:04 +03:00
LTVA1
6349f161eb sigh 5 2024-08-09 15:13:16 +03:00
LTVA1
37fc2ece2c fx fix 2024-08-09 14:33:34 +03:00
LTVA1
6bf391b4bc wavetables and samples for SID3! (unfinished) 2024-08-09 14:30:45 +03:00
tildearrow
a8cd10dd46 DivROMExport: new functions 
for threading...
 2024-08-09 04:27:18 -05:00
tildearrow
d44029647c TIunA export: possibly optimize 2024-08-09 00:30:16 -05:00
DevEd
d8aa07bbbb GB: enable VIN input to accomodate multiple chips on hardware 2024-08-08 17:38:10 -05:00
tildearrow
b213586ca4 add options for ZSM and TIunA out 2024-08-08 15:30:17 -05:00
LTVA1
2a322bff4f implement some basic SID3 effects 
Wave/PCM chan and pw/cutoff slides coming later ig
 2024-08-08 12:11:47 +03:00