SCC: optimize

extern/vgsound_emu-modified/vgsound_emu/src/scc/scc.cpp

@@ -13,10 +13,10 @@
 void scc_core::tick(const int cycles)
 {
 	m_out = 0;
-	for (auto &elem : m_voice)
+	for (int elem=0; elem<5; elem++)
 	{
-		elem.tick(cycles);
-		m_out += elem.out();
+		m_voice[elem].tick(cycles);
+		m_out += m_voice[elem].out();
 	}
 }
 
@@ -64,19 +64,19 @@ void scc_core::voice_t::tick(const int cycles)
 
 void scc_core::reset()
 {
-	for (auto &elem : m_voice)
+	for (int elem=0; elem<5; elem++)
 	{
-		elem.reset();
+		m_voice[elem].reset();
 	}
 
 	m_test.reset();
 	m_out = 0;
-	std::fill(m_reg.begin(), m_reg.end(), 0);
+  memset(m_reg,0,256);
 }
 
 void scc_core::voice_t::reset()
 {
-	std::fill(m_wave.begin(), m_wave.end(), 0);
+	memset(m_wave,0,32);
 	m_enable  = false;
 	m_pitch	  = 0;
 	m_volume  = 0;

extern/vgsound_emu-modified/vgsound_emu/src/scc/scc.hpp

@@ -14,6 +14,7 @@
 
 #include "../core/core.hpp"
 #include "../core/util/mem_intf.hpp"
+#include <string.h>
 
 using namespace vgsound_emu;
 
@@ -36,7 +37,7 @@ class scc_core : public vgsound_emu_core
 					, m_counter(0)
 					, m_out(0)
 				{
-					m_wave.fill(0);
+					memset(m_wave,0,32);
 				}
 
 				// internal state
@@ -69,7 +70,7 @@ class scc_core : public vgsound_emu_core
 			private:
 				// registers
 				scc_core &m_host;
-				std::array<s8, 32> m_wave;	// internal waveform
+				s8 m_wave[32];	// internal waveform
 				bool m_enable			  = false;	// output enable flag
 				u16 m_pitch	 : 12;					// pitch
 				u16 m_volume : 4;					// volume
@@ -139,7 +140,7 @@ class scc_core : public vgsound_emu_core
 			, m_test(test_t())
 			, m_out(0)
 		{
-			m_reg.fill(0);
+			memset(m_reg,0,256);
 		}
 
 		// destructor
@@ -168,12 +169,12 @@ class scc_core : public vgsound_emu_core
 		void freq_vol_enable_w(u8 address, u8 data);
 
 		// internal values
-		std::array<voice_t, 5> m_voice;	 // 5 voices
+		voice_t m_voice[5];	 // 5 voices
 
 		test_t m_test;					// test register
 		s32 m_out				  = 0;	// output to DA0...10
 
-		std::array<u8, 256> m_reg;  // register pool
+		u8 m_reg[256];  // register pool
 };
 
 // SCC core