fix type limits, part 1?

This commit is contained in:
tildearrow 2023-08-28 04:03:32 -05:00
parent 7ea7f72b45
commit 0e7dbf7b4a
5 changed files with 46 additions and 27 deletions

View File

@ -66,6 +66,14 @@ namespace vgsound_emu
return T(T(in) << len) >> len; return T(T(in) << len) >> len;
} }
// get sign extended value, sign_ext<type>(input, len)
template<typename T>
static inline T sign_ext_nomax(T in, u8 len)
{
len = (8 * sizeof(T)) - len;
return T(T(in) << len) >> len;
}
// convert attenuation decibel value to gain // convert attenuation decibel value to gain
static inline f32 dB_to_gain(f32 attenuation) { return std::pow(10.0f, attenuation / 20.0f); } static inline f32 dB_to_gain(f32 attenuation) { return std::pow(10.0f, attenuation / 20.0f); }

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@ -145,7 +145,7 @@ void es5504_core::voice_t::tick(u8 voice)
if (m_alu.busy()) if (m_alu.busy())
{ {
// Send to output // Send to output
m_out = ((sign_ext<s32>(m_filter.o4_1(), 16) >> 3) * m_volume) >> m_out = ((sign_ext_nomax<s32>(m_filter.o4_1(), 16) >> 3) * m_volume) >>
12; // Analog multiplied in real chip, 13/12 bit ladder DAC 12; // Analog multiplied in real chip, 13/12 bit ladder DAC
// ALU execute // ALU execute
@ -386,22 +386,22 @@ void es5504_core::regs_w(u8 page, u8 address, u16 data, bool cpu_access)
switch (address) switch (address)
{ {
case 1: // O4(n-1) (Filter 4 Temp Register) case 1: // O4(n-1) (Filter 4 Temp Register)
v.filter().set_o4_1(sign_ext<s32>(data, 16)); v.filter().set_o4_1(sign_ext_nomax<s32>(data, 16));
break; break;
case 2: // O3(n-2) (Filter 3 Temp Register #2) case 2: // O3(n-2) (Filter 3 Temp Register #2)
v.filter().set_o3_2(sign_ext<s32>(data, 16)); v.filter().set_o3_2(sign_ext_nomax<s32>(data, 16));
break; break;
case 3: // O3(n-1) (Filter 3 Temp Register #1) case 3: // O3(n-1) (Filter 3 Temp Register #1)
v.filter().set_o3_1(sign_ext<s32>(data, 16)); v.filter().set_o3_1(sign_ext_nomax<s32>(data, 16));
break; break;
case 4: // O2(n-2) (Filter 2 Temp Register #2) case 4: // O2(n-2) (Filter 2 Temp Register #2)
v.filter().set_o2_2(sign_ext<s32>(data, 16)); v.filter().set_o2_2(sign_ext_nomax<s32>(data, 16));
break; break;
case 5: // O2(n-1) (Filter 2 Temp Register #1) case 5: // O2(n-1) (Filter 2 Temp Register #1)
v.filter().set_o2_1(sign_ext<s32>(data, 16)); v.filter().set_o2_1(sign_ext_nomax<s32>(data, 16));
break; break;
case 6: // O1(n-1) (Filter 1 Temp Register) case 6: // O1(n-1) (Filter 1 Temp Register)
v.filter().set_o1_1(sign_ext<s32>(data, 16)); v.filter().set_o1_1(sign_ext_nomax<s32>(data, 16));
break; break;
} }
} }

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@ -231,8 +231,8 @@ void es5505_core::voice_t::tick(u8 voice)
if (m_alu.busy()) if (m_alu.busy())
{ {
// Send to output // Send to output
m_output[0] = volume_calc(m_lvol, sign_ext<s32>(m_filter.o4_1(), 16)); m_output[0] = volume_calc(m_lvol, sign_ext_nomax<s32>(m_filter.o4_1(), 16));
m_output[1] = volume_calc(m_rvol, sign_ext<s32>(m_filter.o4_1(), 16)); m_output[1] = volume_calc(m_rvol, sign_ext_nomax<s32>(m_filter.o4_1(), 16));
m_ch.set_left(m_output[0]); m_ch.set_left(m_output[0]);
m_ch.set_right(m_output[1]); m_ch.set_right(m_output[1]);
@ -583,22 +583,22 @@ void es5505_core::regs_w(u8 page, u8 address, u16 data)
switch (address) switch (address)
{ {
case 1: // O4(n-1) (Filter 4 Temp Register) case 1: // O4(n-1) (Filter 4 Temp Register)
v.filter().set_o4_1(sign_ext<s32>(data, 16)); v.filter().set_o4_1(sign_ext_nomax<s32>(data, 16));
break; break;
case 2: // O3(n-2) (Filter 3 Temp Register #2) case 2: // O3(n-2) (Filter 3 Temp Register #2)
v.filter().set_o3_2(sign_ext<s32>(data, 16)); v.filter().set_o3_2(sign_ext_nomax<s32>(data, 16));
break; break;
case 3: // O3(n-1) (Filter 3 Temp Register #1) case 3: // O3(n-1) (Filter 3 Temp Register #1)
v.filter().set_o3_1(sign_ext<s32>(data, 16)); v.filter().set_o3_1(sign_ext_nomax<s32>(data, 16));
break; break;
case 4: // O2(n-2) (Filter 2 Temp Register #2) case 4: // O2(n-2) (Filter 2 Temp Register #2)
v.filter().set_o2_2(sign_ext<s32>(data, 16)); v.filter().set_o2_2(sign_ext_nomax<s32>(data, 16));
break; break;
case 5: // O2(n-1) (Filter 2 Temp Register #1) case 5: // O2(n-1) (Filter 2 Temp Register #1)
v.filter().set_o2_1(sign_ext<s32>(data, 16)); v.filter().set_o2_1(sign_ext_nomax<s32>(data, 16));
break; break;
case 6: // O1(n-1) (Filter 1 Temp Register) case 6: // O1(n-1) (Filter 1 Temp Register)
v.filter().set_o1_1(sign_ext<s32>(data, 16)); v.filter().set_o1_1(sign_ext_nomax<s32>(data, 16));
break; break;
} }
} }

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@ -123,11 +123,11 @@ void es5506_core::voice_t::tick(u8 voice)
// Left and Right volume // Left and Right volume
if (bitfield(m_lvramp, 0, 8) != 0) if (bitfield(m_lvramp, 0, 8) != 0)
{ {
m_lvol = VGS_CLAMP(m_lvol + sign_ext<s32>(bitfield(m_lvramp, 0, 8), 8), 0, 0xffff); m_lvol = VGS_CLAMP(m_lvol + sign_ext_nomax<s32>(bitfield(m_lvramp, 0, 8), 8), 0, 0xffff);
} }
if (bitfield(m_rvramp, 0, 8) != 0) if (bitfield(m_rvramp, 0, 8) != 0)
{ {
m_rvol = VGS_CLAMP(m_rvol + sign_ext<s32>(bitfield(m_rvramp, 0, 8), 8), 0, 0xffff); m_rvol = VGS_CLAMP(m_rvol + sign_ext_nomax<s32>(bitfield(m_rvramp, 0, 8), 8), 0, 0xffff);
} }
// Filter coeffcient // Filter coeffcient
@ -135,13 +135,13 @@ void es5506_core::voice_t::tick(u8 voice)
((m_k1ramp.slow() == 0) || (bitfield(m_filtcount, 0, 3) == 0))) ((m_k1ramp.slow() == 0) || (bitfield(m_filtcount, 0, 3) == 0)))
{ {
m_filter.set_k1( m_filter.set_k1(
VGS_CLAMP(m_filter.k1() + sign_ext<s32>(m_k1ramp.ramp(), 8), 0, 0xffff)); VGS_CLAMP(m_filter.k1() + sign_ext_nomax<s32>(m_k1ramp.ramp(), 8), 0, 0xffff));
} }
if ((m_k2ramp.ramp() != 0) && if ((m_k2ramp.ramp() != 0) &&
((m_k2ramp.slow() == 0) || (bitfield(m_filtcount, 0, 3) == 0))) ((m_k2ramp.slow() == 0) || (bitfield(m_filtcount, 0, 3) == 0)))
{ {
m_filter.set_k2( m_filter.set_k2(
VGS_CLAMP(m_filter.k2() + sign_ext<s32>(m_k2ramp.ramp(), 8), 0, 0xffff)); VGS_CLAMP(m_filter.k2() + sign_ext_nomax<s32>(m_k2ramp.ramp(), 8), 0, 0xffff));
} }
m_ecount--; m_ecount--;
@ -531,7 +531,7 @@ void es5506_core::regs_w(u8 page, u8 address, u32 data)
case 8: // CH4L (Channel 4 Left) case 8: // CH4L (Channel 4 Left)
case 10: // CH5L (Channel 5 Left) case 10: // CH5L (Channel 5 Left)
m_ch[bitfield(address, 1, 3)].set_left( m_ch[bitfield(address, 1, 3)].set_left(
sign_ext<s32>(bitfield(data, 0, 23), 23)); sign_ext_nomax<s32>(bitfield(data, 0, 23), 23));
break; break;
case 1: // CH0R (Channel 0 Right) case 1: // CH0R (Channel 0 Right)
case 3: // CH1R (Channel 1 Right) case 3: // CH1R (Channel 1 Right)
@ -540,7 +540,7 @@ void es5506_core::regs_w(u8 page, u8 address, u32 data)
case 9: // CH4R (Channel 4 Right) case 9: // CH4R (Channel 4 Right)
case 11: // CH5R (Channel 5 Right) case 11: // CH5R (Channel 5 Right)
m_ch[bitfield(address, 1, 3)].set_right( m_ch[bitfield(address, 1, 3)].set_right(
sign_ext<s32>(bitfield(data, 0, 23), 23)); sign_ext_nomax<s32>(bitfield(data, 0, 23), 23));
break; break;
} }
} }
@ -574,22 +574,22 @@ void es5506_core::regs_w(u8 page, u8 address, u32 data)
v.alu().set_accum(data); v.alu().set_accum(data);
break; break;
case 4: // O4(n-1) (Filter 4 Temp Register) case 4: // O4(n-1) (Filter 4 Temp Register)
v.filter().set_o4_1(sign_ext<s32>(bitfield(data, 0, 18), 18)); v.filter().set_o4_1(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
break; break;
case 5: // O3(n-2) (Filter 3 Temp Register #2) case 5: // O3(n-2) (Filter 3 Temp Register #2)
v.filter().set_o3_2(sign_ext<s32>(bitfield(data, 0, 18), 18)); v.filter().set_o3_2(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
break; break;
case 6: // O3(n-1) (Filter 3 Temp Register #1) case 6: // O3(n-1) (Filter 3 Temp Register #1)
v.filter().set_o3_1(sign_ext<s32>(bitfield(data, 0, 18), 18)); v.filter().set_o3_1(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
break; break;
case 7: // O2(n-2) (Filter 2 Temp Register #2) case 7: // O2(n-2) (Filter 2 Temp Register #2)
v.filter().set_o2_2(sign_ext<s32>(bitfield(data, 0, 18), 18)); v.filter().set_o2_2(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
break; break;
case 8: // O2(n-1) (Filter 2 Temp Register #1) case 8: // O2(n-1) (Filter 2 Temp Register #1)
v.filter().set_o2_1(sign_ext<s32>(bitfield(data, 0, 18), 18)); v.filter().set_o2_1(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
break; break;
case 9: // O1(n-1) (Filter 1 Temp Register) case 9: // O1(n-1) (Filter 1 Temp Register)
v.filter().set_o1_1(sign_ext<s32>(bitfield(data, 0, 18), 18)); v.filter().set_o1_1(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
break; break;
case 10: // W_ST (Word Clock Start Register) case 10: // W_ST (Word Clock Start Register)
m_w_st = bitfield(data, 0, 7); m_w_st = bitfield(data, 0, 7);

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@ -239,6 +239,17 @@ void DivPlatformC140::tick(bool sysTick) {
groupBank[i>>2]=bank; groupBank[i>>2]=bank;
} }
rWrite(0x1f1+(((3+(i>>2))&3)<<1),groupBank[i>>2]); rWrite(0x1f1+(((3+(i>>2))&3)<<1),groupBank[i>>2]);
// shut everyone else up
for (int j=0; j<4; j++) {
int ch=(i&(~3))|j;
if (chan[ch].active && (i&3)!=j) {
chan[ch].sample=-1;
chan[ch].active=false;
chan[ch].keyOff=true;
chan[ch].macroInit(NULL);
rWrite(0x05+(ch<<4),ctrl);
}
}
} else { } else {
rWrite(0x04+(i<<4),bank); rWrite(0x04+(i<<4),bank);
} }