663 lines
18 KiB
C++
663 lines
18 KiB
C++
/*
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License: Zlib
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see https://gitlab.com/cam900/vgsound_emu/-/blob/main/LICENSE for more details
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Copyright holder(s): cam900
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Ensoniq ES5506 emulation core
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*/
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#include "es5506.hpp"
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// Internal functions
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// DO NOT USE THIS ONE!
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void es5506_core::tick()
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{
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}
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// less cycle accurate, but less CPU heavy routine
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void es5506_core::tick_perf()
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{
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// output
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if (((!m_mode.lrclk_en()) && (!m_mode.bclk_en()) && (!m_mode.wclk_en())) && (m_w_st < m_w_end))
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{
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const int output_bits = (20 - (m_w_end - m_w_st));
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if (output_bits < 20)
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{
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for (int c = 0; c < 6; c++)
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{
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m_output[c].m_left=m_ch[c].m_left>>output_bits;
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if (m_output[c].m_left<-0x80000) m_output[c].m_left=-0x80000;
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if (m_output[c].m_left>0x7ffff) m_output[c].m_left=0x7ffff;
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m_output[c].m_right=m_ch[c].m_right>>output_bits;
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if (m_output[c].m_right<-0x80000) m_output[c].m_right=-0x80000;
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if (m_output[c].m_right>0x7ffff) m_output[c].m_right=0x7ffff;
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}
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}
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}
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else
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{
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for (int c = 0; c < 6; c++)
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{
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m_output[c].reset();
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}
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}
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// update
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voice_tick();
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}
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void es5506_core::voice_tick()
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{
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// Refresh output
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m_voice_end = true;
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m_voice_cycle = 0;
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for (int i=0; i<6; i++)
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{
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m_ch[i].reset();
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}
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// Update voice
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const int total=VGS_CLAMP(m_active,4,31);
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for (int i=0; i<=total; i++) {
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m_voice[i].tick(i);
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const u8 ca = m_voice[i].cr().ca()&7;
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if (ca < 6)
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{
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m_ch[ca] += m_voice[i].ch();
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}
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}
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}
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void es5506_core::voice_t::fetch(u8 cycle)
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{
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m_alu.set_sample(
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0,
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m_host.m_intf.read_sample(m_cr.m_bs,
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(m_alu.get_accum_integer())&((1<<m_alu.m_integer)-1)));
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if (m_cr.cmpd())
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{ // Decompress (Upper 8 bit is used for compressed format)
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m_alu.set_sample(0, decompress((m_alu.sample(0)>>8)&255));
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}
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m_alu.set_sample(
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1,
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m_host.m_intf.read_sample(m_cr.m_bs,
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(m_alu.get_accum_integer() + 1)&((1<<m_alu.m_integer)-1)));
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if (m_cr.cmpd())
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{ // Decompress (Upper 8 bit is used for compressed format)
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m_alu.set_sample(1, decompress((m_alu.sample(1)>>8)&255));
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}
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}
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void es5506_core::voice_t::tick(u8 voice)
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{
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// Filter execute
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if (m_alu.busy())
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{
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if ((m_alu.m_last_accum&(~m_alu.m_fraction))!=(m_alu.m_accum&(~m_alu.m_fraction))) fetch(0);
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m_filter.tick(m_alu.interpolation());
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// Send to output
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m_output[0] = m_mute ? 0 : volume_calc(m_lvol, (short)m_filter.o4_1());
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m_output[1] = m_mute ? 0 : volume_calc(m_rvol, (short)m_filter.o4_1());
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m_ch.set_left(m_output[0]);
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m_ch.set_right(m_output[1]);
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// ALU execute
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if (m_alu.tick())
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{
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m_alu.loop_exec();
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}
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} else {
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m_filter.tick(m_alu.interpolation());
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m_output[0] = m_output[1] = 0;
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m_ch.reset();
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}
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// Envelope
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if (m_ecount != 0)
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{
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// Left and Right volume
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if (bitfield(m_lvramp, 0, 8) != 0)
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{
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m_lvol = VGS_CLAMP(m_lvol + sign_ext_nomax<s32>(bitfield(m_lvramp, 0, 8), 8), 0, 0xffff);
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}
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if (bitfield(m_rvramp, 0, 8) != 0)
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{
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m_rvol = VGS_CLAMP(m_rvol + sign_ext_nomax<s32>(bitfield(m_rvramp, 0, 8), 8), 0, 0xffff);
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}
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// Filter coeffcient
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if ((m_k1ramp.ramp() != 0) &&
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((m_k1ramp.slow() == 0) || (bitfield(m_filtcount, 0, 3) == 0)))
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{
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m_filter.set_k1(
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VGS_CLAMP(m_filter.k1() + sign_ext_nomax<s32>(m_k1ramp.ramp(), 8), 0, 0xffff));
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}
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if ((m_k2ramp.ramp() != 0) &&
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((m_k2ramp.slow() == 0) || (bitfield(m_filtcount, 0, 3) == 0)))
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{
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m_filter.set_k2(
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VGS_CLAMP(m_filter.k2() + sign_ext_nomax<s32>(m_k2ramp.ramp(), 8), 0, 0xffff));
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}
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m_ecount--;
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}
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m_filtcount = bitfield(m_filtcount + 1, 0, 3);
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// Update IRQ
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//m_alu.irq_exec(m_host.m_intf, m_host.m_irqv, voice);
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}
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// Compressed format
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s16 es5506_core::voice_t::decompress(u8 sample)
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{
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u8 exponent = bitfield(sample, 5, 3);
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u8 mantissa = bitfield(sample, 0, 5);
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return (exponent > 0)
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? s16(((bitfield(mantissa, 4) ? 0x10 : ~0x1f) | bitfield(mantissa, 0, 4))
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<< (4 + (exponent - 1)))
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: s16(((bitfield(mantissa, 4) ? ~0xf : 0) | bitfield(mantissa, 0, 4)) << 4);
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}
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// volume calculation
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s32 es5506_core::voice_t::volume_calc(u16 volume, s32 in)
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{
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return (in * s32(0x100 | ((volume>>4)&255))) >> (20 - ((volume>>12)&15));
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}
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void es5506_core::reset()
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{
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es550x_shared_core::reset();
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for (auto &elem : m_voice)
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{
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elem.reset();
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}
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m_read_latch = 0xffffffff;
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m_write_latch = 0xffffffff;
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m_w_st = 0;
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m_w_end = 0;
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m_lr_end = 0;
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m_w_st_curr = 0;
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m_w_end_curr = 0;
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m_mode.reset();
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m_bclk.reset();
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m_lrclk.reset(32);
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m_wclk = 0;
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m_wclk_lr = false;
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m_output_bit = 0;
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for (auto &elem : m_ch)
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{
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elem.reset();
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}
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for (auto &elem : m_output)
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{
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elem.reset();
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}
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for (auto &elem : m_output_temp)
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{
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elem.reset();
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}
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for (auto &elem : m_output_latch)
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{
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elem.reset();
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}
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}
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void es5506_core::voice_t::reset()
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{
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es550x_shared_core::es550x_voice_t::reset();
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m_lvol = 0;
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m_rvol = 0;
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m_lvramp = 0;
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m_rvramp = 0;
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m_ecount = 0;
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m_k2ramp.reset();
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m_k1ramp.reset();
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m_filtcount = 0;
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m_ch.reset();
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m_mute = false;
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m_output[0] = m_output[1] = 0;
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}
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// Accessors
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u8 es5506_core::host_r(u8 address)
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{
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m_ha = address;
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m_hd = read(m_ha, true);
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return m_hd;
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}
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void es5506_core::host_w(u8 address, u8 data)
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{
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m_ha = address;
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m_hd = data;
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write(m_ha, m_hd);
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}
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u8 es5506_core::read(u8 address, bool cpu_access)
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{
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const u8 byte = bitfield(address, 0, 2); // byte select
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const u8 shift = 24 - (byte << 3);
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if (byte != 0)
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{ // Return already latched register if not highest byte is accessing
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return bitfield(m_read_latch, shift, 8);
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}
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address = bitfield(address, 2, 4); // 4 bit address for CPU access
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// get read register
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m_read_latch = regs_r(m_page, address, cpu_access);
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return bitfield(m_read_latch, 24, 8);
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}
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void es5506_core::write(u8 address, u8 data)
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{
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const u8 byte = bitfield(address, 0, 2); // byte select
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const u8 shift = 24 - (byte << 3);
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address = bitfield(address, 2, 4); // 4 bit address for CPU access
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// Update register latch
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m_write_latch = (m_write_latch & ~(0xff << shift)) | (u32(data) << shift);
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if (byte != 3)
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{ // Wait until lowest byte is writed
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return;
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}
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regs_w(m_page, address, m_write_latch);
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// Reset latch
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m_write_latch = 0;
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}
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u32 es5506_core::regs_r(u8 page, u8 address, bool cpu_access)
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{
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u32 read_latch = 0xffffffff;
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// Global registers
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if (address >= 13)
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{
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switch (address)
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{
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case 13: // POT (Pot A/D Register)
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read_latch = (read_latch & ~0x3ff) | bitfield(m_intf.adc_r(), 0, 10);
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break;
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case 14: // IRQV (Interrupting voice vector)
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read_latch = (read_latch & ~0x9f) | (m_irqv.irqb() ? 0x80 : 0) |
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bitfield(m_irqv.voice(), 0, 5);
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if (cpu_access)
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{
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m_irqv.clear();
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if (bool(bitfield(read_latch, 7)) != m_irqv.irqb())
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{
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m_voice[m_irqv.voice()].irq_update(m_intf, m_irqv);
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}
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}
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break;
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case 15: // PAGE (Page select register)
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read_latch = (read_latch & ~0x7f) | bitfield(m_page, 0, 7);
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break;
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}
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}
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else
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{
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// Channel registers are Write only
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if (bitfield(page, 6))
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{
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if (!cpu_access) // CPU can't read here
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{
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switch (address)
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{
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case 0: // CH0L (Channel 0 Left)
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case 2: // CH1L (Channel 1 Left)
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case 4: // CH2L (Channel 2 Left)
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case 6: // CH3L (Channel 3 Left)
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case 8: // CH4L (Channel 4 Left)
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case 10: // CH5L (Channel 5 Left)
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read_latch = m_ch[bitfield(address, 1, 3)].left();
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break;
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case 1: // CH0R (Channel 0 Right)
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case 3: // CH1R (Channel 1 Right)
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case 5: // CH2R (Channel 2 Right)
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case 7: // CH3R (Channel 3 Right)
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case 9: // CH4R (Channel 4 Right)
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case 11: // CH5R (Channel 5 Right)
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read_latch = m_ch[bitfield(address, 1, 3)].right();
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break;
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}
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}
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}
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else
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{
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const u8 voice = bitfield(page, 0, 5); // Voice select
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voice_t &v = m_voice[voice];
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if (bitfield(page, 5)) // Page 32 - 63
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{
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switch (address)
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{
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case 0: // CR (Control Register)
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read_latch = (read_latch & ~0xffff) | (v.alu().stop() << 0) |
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(v.alu().lei() ? 0x0004 : 0x0000) | (v.alu().loop() << 3) |
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(v.alu().irqe() ? 0x0020 : 0x0000) |
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(v.alu().dir() ? 0x0040 : 0x0000) |
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(v.alu().irq() ? 0x0080 : 0x0000) |
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(bitfield(v.filter().lp(), 0, 2) << 8) | (v.cr().ca() << 10) |
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(v.cr().cmpd() ? 0x2000 : 0x0000) | (v.cr().bs() << 14);
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break;
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case 1: // START (Loop Start Register)
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read_latch = (read_latch & ~0xfffff800) | (v.alu().start() & 0xfffff800);
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break;
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case 2: // END (Loop End Register)
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read_latch = (read_latch & ~0xffffff80) | (v.alu().end() & 0xffffff80);
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break;
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case 3: // ACCUM (Accumulator Register)
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read_latch = v.alu().accum();
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break;
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case 4: // O4(n-1) (Filter 4 Temp Register)
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if (cpu_access)
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{
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read_latch =
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(read_latch & ~0x3ffff) | bitfield(v.filter().o4_1(), 0, 18);
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}
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else
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{
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read_latch = v.filter().o4_1();
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}
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break;
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case 5: // O3(n-2) (Filter 3 Temp Register #2)
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if (cpu_access)
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{
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read_latch =
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(read_latch & ~0x3ffff) | bitfield(v.filter().o3_2(), 0, 18);
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}
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else
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{
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read_latch = v.filter().o3_2();
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}
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break;
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case 6: // O3(n-1) (Filter 3 Temp Register #1)
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if (cpu_access)
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{
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read_latch =
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(read_latch & ~0x3ffff) | bitfield(v.filter().o3_1(), 0, 18);
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}
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else
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{
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read_latch = v.filter().o3_1();
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}
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break;
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case 7: // O2(n-2) (Filter 2 Temp Register #2)
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if (cpu_access)
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{
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read_latch =
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(read_latch & ~0x3ffff) | bitfield(v.filter().o2_2(), 0, 18);
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}
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else
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{
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read_latch = v.filter().o2_2();
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}
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break;
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case 8: // O2(n-1) (Filter 2 Temp Register #1)
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if (cpu_access)
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{
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read_latch =
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(read_latch & ~0x3ffff) | bitfield(v.filter().o2_1(), 0, 18);
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}
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else
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{
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read_latch = v.filter().o2_1();
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}
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break;
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case 9: // O1(n-1) (Filter 1 Temp Register)
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if (cpu_access)
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{
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read_latch =
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(read_latch & ~0x3ffff) | bitfield(v.filter().o1_1(), 0, 18);
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}
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else
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{
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read_latch = v.filter().o1_1();
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}
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break;
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case 10: // W_ST (Word Clock Start Register)
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read_latch = (read_latch & ~0x7f) | bitfield(m_w_st, 0, 7);
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break;
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case 11: // W_END (Word Clock End Register)
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read_latch = (read_latch & ~0x7f) | bitfield(m_w_end, 0, 7);
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break;
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case 12: // LR_END (Left/Right Clock End Register)
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read_latch = (read_latch & ~0x7f) | bitfield(m_lr_end, 0, 7);
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break;
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}
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}
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else // Page 0 - 31
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{
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switch (address)
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{
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case 0: // CR (Control Register)
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read_latch = (read_latch & ~0xffff) | (v.alu().stop() << 0) |
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(v.alu().lei() ? 0x0004 : 0x0000) | (v.alu().loop() << 3) |
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(v.alu().irqe() ? 0x0020 : 0x0000) |
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(v.alu().dir() ? 0x0040 : 0x0000) |
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(v.alu().irq() ? 0x0080 : 0x0000) |
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(bitfield(v.filter().lp(), 0, 2) << 8) | (v.cr().ca() << 10) |
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(v.cr().cmpd() ? 0x2000 : 0x0000) | (v.cr().bs() << 14);
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break;
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case 1: // FC (Frequency Control)
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read_latch = (read_latch & ~0x1ffff) | bitfield(v.alu().fc(), 0, 17);
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break;
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case 2: // LVOL (Left Volume)
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read_latch = (read_latch & ~0xffff) | bitfield(v.lvol(), 0, 16);
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break;
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case 3: // LVRAMP (Left Volume Ramp)
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read_latch = (read_latch & ~0xff00) | (bitfield(v.lvramp(), 0, 8) << 8);
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break;
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case 4: // RVOL (Right Volume)
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read_latch = (read_latch & ~0xffff) | bitfield(v.rvol(), 0, 16);
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break;
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case 5: // RVRAMP (Right Volume Ramp)
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read_latch = (read_latch & ~0xff00) | (bitfield(v.rvramp(), 0, 8) << 8);
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break;
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case 6: // ECOUNT (Envelope Counter)
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read_latch = (read_latch & ~0x01ff) | bitfield(v.ecount(), 0, 9);
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break;
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case 7: // K2 (Filter Cutoff Coefficient #2)
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read_latch = (read_latch & ~0xffff) | bitfield(v.filter().k2(), 0, 16);
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break;
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case 8: // K2RAMP (Filter Cutoff Coefficient #2 Ramp)
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read_latch = (read_latch & ~0xff01) |
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(bitfield(v.k2ramp().ramp(), 0, 8) << 8) |
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(v.k2ramp().slow() ? 0x0001 : 0x0000);
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break;
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|
case 9: // K1 (Filter Cutoff Coefficient #1)
|
|
read_latch = (read_latch & ~0xffff) | bitfield(v.filter().k1(), 0, 16);
|
|
break;
|
|
case 10: // K1RAMP (Filter Cutoff Coefficient #1 Ramp)
|
|
read_latch = (read_latch & ~0xff01) |
|
|
(bitfield(v.k1ramp().ramp(), 0, 8) << 8) |
|
|
(v.k1ramp().slow() ? 0x0001 : 0x0000);
|
|
break;
|
|
case 11: // ACT (Number of voices)
|
|
read_latch = (read_latch & ~0x1f) | bitfield(m_active, 0, 5);
|
|
break;
|
|
case 12: // MODE (Global Mode)
|
|
read_latch =
|
|
(read_latch & ~0x1f) | (m_mode.lrclk_en() ? 0x01 : 0x00) |
|
|
(m_mode.wclk_en() ? 0x02 : 0x00) | (m_mode.bclk_en() ? 0x04 : 0x00) |
|
|
(m_mode.master() ? 0x08 : 0x00) | (m_mode.dual() ? 0x10 : 0x00);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
return read_latch;
|
|
}
|
|
|
|
void es5506_core::regs_w(u8 page, u8 address, u32 data)
|
|
{
|
|
// Global registers
|
|
if (address >= 13)
|
|
{
|
|
switch (address)
|
|
{
|
|
case 13: // POT (Pot A/D Register)
|
|
// Read only
|
|
break;
|
|
case 14: // IRQV (Interrupting voice vector)
|
|
// Read only
|
|
break;
|
|
case 15: // PAGE (Page select register)
|
|
m_page = bitfield(data, 0, 7);
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
// Channel registers are Write only, and for test purposes
|
|
if (bitfield(page, 6))
|
|
{
|
|
switch (address)
|
|
{
|
|
case 0: // CH0L (Channel 0 Left)
|
|
case 2: // CH1L (Channel 1 Left)
|
|
case 4: // CH2L (Channel 2 Left)
|
|
case 6: // CH3L (Channel 3 Left)
|
|
case 8: // CH4L (Channel 4 Left)
|
|
case 10: // CH5L (Channel 5 Left)
|
|
m_ch[bitfield(address, 1, 3)].set_left(
|
|
sign_ext_nomax<s32>(bitfield(data, 0, 23), 23));
|
|
break;
|
|
case 1: // CH0R (Channel 0 Right)
|
|
case 3: // CH1R (Channel 1 Right)
|
|
case 5: // CH2R (Channel 2 Right)
|
|
case 7: // CH3R (Channel 3 Right)
|
|
case 9: // CH4R (Channel 4 Right)
|
|
case 11: // CH5R (Channel 5 Right)
|
|
m_ch[bitfield(address, 1, 3)].set_right(
|
|
sign_ext_nomax<s32>(bitfield(data, 0, 23), 23));
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
const u8 voice = bitfield(page, 0, 5); // Voice select
|
|
voice_t &v = m_voice[voice];
|
|
if (bitfield(page, 5)) // Page 32 - 63
|
|
{
|
|
switch (address)
|
|
{
|
|
case 0: // CR (Control Register)
|
|
v.alu().set_stop(bitfield(data, 0, 2));
|
|
v.alu().set_lei(bitfield(data, 2));
|
|
v.alu().set_loop(bitfield(data, 3, 2));
|
|
v.alu().set_irqe(bitfield(data, 5));
|
|
v.alu().set_dir(bitfield(data, 6));
|
|
v.alu().set_irq(bitfield(data, 7));
|
|
v.filter().set_lp(bitfield(data, 8, 2));
|
|
v.cr().set_ca(std::min<u8>(5, bitfield(data, 10, 3)));
|
|
v.cr().set_cmpd(bitfield(data, 13));
|
|
v.cr().set_bs(bitfield(data, 14, 2));
|
|
break;
|
|
case 1: // START (Loop Start Register)
|
|
v.alu().set_start(data & 0xfffff800);
|
|
break;
|
|
case 2: // END (Loop End Register)
|
|
v.alu().set_end(data & 0xffffff80);
|
|
break;
|
|
case 3: // ACCUM (Accumulator Register)
|
|
v.alu().set_accum(data);
|
|
break;
|
|
case 4: // O4(n-1) (Filter 4 Temp Register)
|
|
v.filter().set_o4_1(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
|
|
break;
|
|
case 5: // O3(n-2) (Filter 3 Temp Register #2)
|
|
v.filter().set_o3_2(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
|
|
break;
|
|
case 6: // O3(n-1) (Filter 3 Temp Register #1)
|
|
v.filter().set_o3_1(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
|
|
break;
|
|
case 7: // O2(n-2) (Filter 2 Temp Register #2)
|
|
v.filter().set_o2_2(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
|
|
break;
|
|
case 8: // O2(n-1) (Filter 2 Temp Register #1)
|
|
v.filter().set_o2_1(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
|
|
break;
|
|
case 9: // O1(n-1) (Filter 1 Temp Register)
|
|
v.filter().set_o1_1(sign_ext_nomax<s32>(bitfield(data, 0, 18), 18));
|
|
break;
|
|
case 10: // W_ST (Word Clock Start Register)
|
|
m_w_st = bitfield(data, 0, 7);
|
|
break;
|
|
case 11: // W_END (Word Clock End Register)
|
|
m_w_end = bitfield(data, 0, 7);
|
|
break;
|
|
case 12: // LR_END (Left/Right Clock End Register)
|
|
m_lr_end = bitfield(data, 0, 7);
|
|
m_lrclk.set_width(m_lr_end);
|
|
break;
|
|
}
|
|
}
|
|
else // Page 0 - 31
|
|
{
|
|
switch (address)
|
|
{
|
|
case 0: // CR (Control Register)
|
|
v.alu().set_stop(bitfield(data, 0, 2));
|
|
v.alu().set_lei(bitfield(data, 2));
|
|
v.alu().set_loop(bitfield(data, 3, 2));
|
|
v.alu().set_irqe(bitfield(data, 5));
|
|
v.alu().set_dir(bitfield(data, 6));
|
|
v.alu().set_irq(bitfield(data, 7));
|
|
v.filter().set_lp(bitfield(data, 8, 2));
|
|
v.cr().set_ca(std::min<u8>(5, bitfield(data, 10, 3)));
|
|
v.cr().set_cmpd(bitfield(data, 13));
|
|
v.cr().set_bs(bitfield(data, 14, 2));
|
|
break;
|
|
case 1: // FC (Frequency Control)
|
|
v.alu().set_fc(bitfield(data, 0, 17));
|
|
break;
|
|
case 2: // LVOL (Left Volume)
|
|
v.set_lvol(bitfield(data, 0, 16));
|
|
break;
|
|
case 3: // LVRAMP (Left Volume Ramp)
|
|
v.set_lvramp(bitfield(data, 8, 8));
|
|
break;
|
|
case 4: // RVOL (Right Volume)
|
|
v.set_rvol(bitfield(data, 0, 16));
|
|
break;
|
|
case 5: // RVRAMP (Right Volume Ramp)
|
|
v.set_rvramp(bitfield(data, 8, 8));
|
|
break;
|
|
case 6: // ECOUNT (Envelope Counter)
|
|
v.set_ecount(bitfield(data, 0, 9));
|
|
break;
|
|
case 7: // K2 (Filter Cutoff Coefficient #2)
|
|
v.filter().set_k2(bitfield(data, 0, 16));
|
|
break;
|
|
case 8: // K2RAMP (Filter Cutoff Coefficient #2 Ramp)
|
|
v.k2ramp().write(data);
|
|
break;
|
|
case 9: // K1 (Filter Cutoff Coefficient #1)
|
|
v.filter().set_k1(bitfield(data, 0, 16));
|
|
break;
|
|
case 10: // K1RAMP (Filter Cutoff Coefficient #1 Ramp)
|
|
v.k1ramp().write(data);
|
|
break;
|
|
case 11: // ACT (Number of voices)
|
|
m_active = std::max<u8>(4, bitfield(data, 0, 5));
|
|
break;
|
|
case 12: // MODE (Global Mode)
|
|
m_mode.write(data);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|