2022-05-26 05:24:21 +00:00
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/**
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* Furnace Tracker - multi-system chiptune tracker
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2023-01-20 00:18:40 +00:00
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* Copyright (C) 2021-2023 tildearrow and contributors
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2022-05-26 05:24:21 +00:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "zsm.h"
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#include "../ta-log.h"
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#include "../utfutils.h"
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#include "song.h"
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2022-09-24 04:23:03 +00:00
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DivZSM::DivZSM() {
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2023-06-06 04:24:34 +00:00
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w=NULL;
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2022-05-26 05:24:21 +00:00
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init();
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}
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2022-09-24 04:23:03 +00:00
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DivZSM::~DivZSM() {
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2022-05-26 05:24:21 +00:00
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}
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2022-09-24 04:23:03 +00:00
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void DivZSM::init(unsigned int rate) {
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2023-06-06 04:24:34 +00:00
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if (w!=NULL) delete w;
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w=new SafeWriter;
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2022-05-26 05:24:21 +00:00
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w->init();
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// write default ZSM data header
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w->write("zm",2); // magic header
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2022-09-24 04:23:03 +00:00
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w->writeC(ZSM_VERSION);
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2022-05-26 05:24:21 +00:00
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// no loop offset
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w->writeS(0);
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w->writeC(0);
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// no PCM
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w->writeS(0x00);
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w->writeC(0x00);
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// FM channel mask
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w->writeC(0x00);
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// PSG channel mask
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w->writeS(0x00);
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w->writeS((unsigned short)rate);
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// 2 reserved bytes (set to zero)
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w->writeS(0x00);
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2023-06-06 04:24:34 +00:00
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tickRate=rate;
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2022-05-26 05:24:21 +00:00
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loopOffset=-1;
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numWrites=0;
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2023-07-04 03:24:49 +00:00
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ticks=0;
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// Initialize YM/PSG states
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2022-05-26 05:24:21 +00:00
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memset(&ymState,-1,sizeof(ymState));
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memset(&psgState,-1,sizeof(psgState));
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2023-07-04 03:24:49 +00:00
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// Initialize PCM states
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pcmRateCache=-1;
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pcmCtrlRVCache=-1;
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pcmCtrlDCCache=-1;
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// Channel masks
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ymMask=0;
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psgMask=0;
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2022-05-26 05:24:21 +00:00
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}
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2022-09-24 04:23:03 +00:00
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int DivZSM::getoffset() {
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2022-05-26 05:24:21 +00:00
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return w->tell();
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}
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2022-09-24 04:23:03 +00:00
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void DivZSM::writeYM(unsigned char a, unsigned char v) {
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2023-06-06 04:24:34 +00:00
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int lastMask=ymMask;
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2022-05-26 05:24:21 +00:00
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if (a==0x19 && v>=0x80) a=0x1a; // AMD/PSD use same reg addr. store PMD as 0x1a
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2023-06-06 04:24:34 +00:00
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if (a==0x08 && (v&0xf8)) ymMask|=(1<<(v&0x07)); // mark chan as in-use if keyDN
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if (a!=0x08) ymState[ym_NEW][a]=v; // cache the newly-written value
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2022-05-26 05:24:21 +00:00
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bool writeit=false; // used to suppress spurious writes to unused channels
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2023-06-06 04:24:34 +00:00
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if (a<0x20) {
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if (a==0x08) {
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2022-05-26 05:24:21 +00:00
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// write keyUPDN messages if channel is active.
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2023-06-06 04:24:34 +00:00
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writeit=(ymMask&(1<<(v&0x07)))>0;
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} else {
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2022-05-26 05:24:21 +00:00
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// do not suppress global registers
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2023-06-06 04:24:34 +00:00
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writeit=true;
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2022-05-26 05:24:21 +00:00
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}
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} else {
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2023-06-06 04:24:34 +00:00
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writeit=(ymMask&(1<<(a&0x07)))>0; // a&0x07 = chan ID for regs >=0x20
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2022-05-26 05:24:21 +00:00
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}
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2023-06-06 04:24:34 +00:00
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if (lastMask!=ymMask) {
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2022-05-26 05:24:21 +00:00
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// if the ymMask just changed, then the channel has become active.
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2023-06-06 04:24:34 +00:00
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// This can only happen on a KeyDN event, so voice=v&0x07
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2022-05-26 05:24:21 +00:00
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// insert a keyUP just to be safe.
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ymwrites.push_back(DivRegWrite(0x08,v&0x07));
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numWrites++;
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// flush the ym_NEW cached states for this channel into the ZSM....
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2023-06-06 04:24:34 +00:00
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for (int i=0x20+(v&0x07); i<=0xff; i+=8) {
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if (ymState[ym_NEW][i]!=ymState[ym_PREV][i]) {
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2022-05-26 05:24:21 +00:00
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ymwrites.push_back(DivRegWrite(i,ymState[ym_NEW][i]));
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numWrites++;
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// ...and update the shadow
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2023-06-06 04:24:34 +00:00
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ymState[ym_PREV][i]=ymState[ym_NEW][i];
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2022-05-26 05:24:21 +00:00
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}
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}
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}
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// Handle the current write if channel is active
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2023-06-06 04:24:34 +00:00
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if (writeit && ((ymState[ym_NEW][a]!=ymState[ym_PREV][a]) || a==0x08)) {
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2022-05-26 05:24:21 +00:00
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// update YM shadow if not the KeyUPDN register.
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2023-06-06 04:24:34 +00:00
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if (a!=8) ymState[ym_PREV][a]=ymState[ym_NEW][a];
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// if reg=PMD, then change back to real register 0x19
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2022-05-26 05:24:21 +00:00
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if (a==0x1a) a=0x19;
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ymwrites.push_back(DivRegWrite(a,v));
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numWrites++;
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}
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}
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2022-09-24 04:23:03 +00:00
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void DivZSM::writePSG(unsigned char a, unsigned char v) {
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2022-05-26 05:24:21 +00:00
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// TODO: suppress writes to PSG voice that is not audible (volume=0)
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2023-07-04 03:24:49 +00:00
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// ^ Let's leave these alone, ZSMKit has a feature that can benefit
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// from silent channels.
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2023-07-05 22:07:44 +00:00
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if (a>=69) {
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logD("ZSM: ignoring VERA PSG write a=%02x v=%02x",a,v);
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2022-09-24 07:31:10 +00:00
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return;
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2023-07-05 22:07:44 +00:00
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} else if (a==68) {
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// Sync event
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numWrites++;
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return syncCache.push_back(v);
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2023-07-04 03:24:49 +00:00
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} else if (a>=64) {
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return writePCM(a-64,v);
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2022-05-26 05:24:21 +00:00
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}
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2023-06-06 04:24:34 +00:00
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if (psgState[psg_PREV][a]==v) {
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if (psgState[psg_NEW][a]!=v) {
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2022-05-26 05:24:21 +00:00
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// NEW value is being reset to the same as PREV value
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// so it is no longer a new write.
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2022-09-24 07:31:10 +00:00
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numWrites--;
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2023-06-06 04:24:34 +00:00
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}
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2022-05-26 05:24:21 +00:00
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} else {
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2023-06-06 04:24:34 +00:00
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if (psgState[psg_PREV][a]==psgState[psg_NEW][a]) {
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2022-05-26 05:24:21 +00:00
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// if this write changes the NEW cached value to something other
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// than the PREV value, then this is a new write.
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numWrites++;
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2023-06-06 04:24:34 +00:00
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}
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2022-05-26 05:24:21 +00:00
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}
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2023-06-06 04:24:34 +00:00
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psgState[psg_NEW][a]=v;
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// mark channel as used in the psgMask if volume is set>0.
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if ((a%4==2) && (v&0x3f)) psgMask|=(1<<(a>>2));
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2022-05-26 05:24:21 +00:00
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}
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2022-09-24 04:23:03 +00:00
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void DivZSM::writePCM(unsigned char a, unsigned char v) {
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2023-07-04 03:24:49 +00:00
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if (a==0) { // PCM Ctrl
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// cache the depth and channels but don't write it to the
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// register queue
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pcmCtrlDCCache=v&0x30;
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// save only the reset bit and volume (if it isn't a dupe)
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if (pcmCtrlRVCache!=(v&0x8f)) {
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pcmMeta.push_back(DivRegWrite(a,(v&0x8f)));
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pcmCtrlRVCache=v&0x8f;
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numWrites++;
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}
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} else if (a==1) { // PCM Rate
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if (pcmRateCache!=v) {
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pcmMeta.push_back(DivRegWrite(a,v));
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pcmRateCache=v;
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numWrites++;
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}
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} else if (a==2) { // PCM data
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pcmCache.push_back(v);
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numWrites++;
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}
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2022-05-26 05:24:21 +00:00
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}
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2022-09-24 04:23:03 +00:00
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void DivZSM::tick(int numticks) {
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2022-05-26 05:24:21 +00:00
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flushWrites();
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2023-06-06 04:24:34 +00:00
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ticks+=numticks;
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2022-05-26 05:24:21 +00:00
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}
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2022-09-24 04:23:03 +00:00
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void DivZSM::setLoopPoint() {
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2022-05-26 05:24:21 +00:00
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tick(0); // flush any ticks+writes
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flushTicks(); // flush ticks incase no writes were pending
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logI("ZSM: loop at file offset %d bytes",w->tell());
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loopOffset=w->tell();
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2022-09-24 07:31:10 +00:00
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// update the ZSM header's loop offset value
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2022-05-26 05:24:21 +00:00
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w->seek(0x03,SEEK_SET);
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w->writeS((short)(loopOffset&0xffff));
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2022-09-24 04:23:03 +00:00
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w->writeC((unsigned char)((loopOffset>>16)&0xff));
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2022-05-26 05:24:21 +00:00
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w->seek(loopOffset,SEEK_SET);
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// reset the PSG shadow and write cache
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memset(&psgState,-1,sizeof(psgState));
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2023-07-04 03:24:49 +00:00
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// reset the PCM caches that would inhibit dupes
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pcmRateCache=-1;
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pcmCtrlRVCache=-1;
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2022-05-26 05:24:21 +00:00
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// reset the YM shadow....
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memset(&ymState[ym_PREV],-1,sizeof(ymState[ym_PREV]));
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// ... and cache (except for unused channels)
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memset(&ymState[ym_NEW],-1,0x20);
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2023-06-06 04:24:34 +00:00
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for (int chan=0; chan<8; chan++) {
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2022-09-24 07:31:10 +00:00
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// do not clear state for as-yet-unused channels
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2023-06-06 04:24:34 +00:00
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if (!(ymMask&(1<<chan))) continue;
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2022-05-26 05:24:21 +00:00
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// clear the state for channels in use so they match the unknown state
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// of the YM shadow.
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2023-06-06 04:24:34 +00:00
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for (int i=0x20+chan; i<=0xff; i+=8) {
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ymState[ym_NEW][i]=-1;
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}
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2022-05-26 05:24:21 +00:00
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}
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}
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2022-09-24 04:23:03 +00:00
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SafeWriter* DivZSM::finish() {
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2022-05-26 05:24:21 +00:00
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tick(0); // flush any pending writes / ticks
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flushTicks(); // flush ticks in case there were no writes pending
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2022-09-24 04:23:03 +00:00
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w->writeC(ZSM_EOF);
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2023-07-04 03:24:49 +00:00
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if (pcmInsts.size()>256) {
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logE("ZSM: more than the maximum number of PCM instruments exist. Skipping PCM export entirely.");
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pcmData.clear();
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pcmInsts.clear();
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} else if (pcmData.size()) { // if exists, write PCM instruments and blob to the end of file
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int pcmOff=w->tell();
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w->writeC('P');
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w->writeC('C');
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w->writeC('M');
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w->writeC((unsigned char)pcmInsts.size()-1);
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int i=0;
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for (S_pcmInst& inst: pcmInsts) {
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// write out the instruments
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// PCM playback location follows:
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// <instrument number>
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// <geometry (depth and channel)>
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// <l m h> of PCM data offset
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// <l m h> of length
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w->writeC((unsigned char)i&0xff);
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w->writeC((unsigned char)inst.geometry&0x30);
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w->writeC((unsigned char)inst.offset&0xff);
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w->writeC((unsigned char)(inst.offset>>8)&0xff);
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w->writeC((unsigned char)(inst.offset>>16)&0xff);
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w->writeC((unsigned char)inst.length&0xff);
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w->writeC((unsigned char)(inst.length>>8)&0xff);
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w->writeC((unsigned char)(inst.length>>16)&0xff);
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// Feature mask: Lxxxxxxx
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// L = Loop enabled
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w->writeC(0);
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// Loop point (not yet implemented)
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w->writeC(0);
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w->writeS(0);
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// Reserved for future use
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w->writeS(0);
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w->writeS(0);
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i++;
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}
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for (unsigned char& c: pcmData) {
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w->writeC(c);
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}
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pcmData.clear();
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// update PCM offset in file
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w->seek(0x06,SEEK_SET);
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w->writeC((unsigned char)pcmOff&0xff);
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w->writeC((unsigned char)(pcmOff>>8)&0xff);
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w->writeC((unsigned char)(pcmOff>>16)&0xff);
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}
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2022-05-26 05:24:21 +00:00
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// update channel use masks.
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w->seek(0x09,SEEK_SET);
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2023-06-06 04:24:34 +00:00
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w->writeC((unsigned char)(ymMask&0xff));
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w->writeS((short)(psgMask&0xffff));
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2022-05-26 05:24:21 +00:00
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return w;
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}
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2022-09-24 04:23:03 +00:00
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void DivZSM::flushWrites() {
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2023-07-05 22:07:44 +00:00
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logD("ZSM: flushWrites.... numwrites=%d ticks=%d ymwrites=%d pcmMeta=%d pcmCache=%d pcmData=%d syncCache=%d",numWrites,ticks,ymwrites.size(),pcmMeta.size(),pcmCache.size(),pcmData.size(),syncCache.size());
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2022-05-26 05:24:21 +00:00
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if (numWrites==0) return;
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flushTicks(); // only flush ticks if there are writes pending.
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2023-06-06 04:24:34 +00:00
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for (unsigned char i=0; i<64; i++) {
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if (psgState[psg_NEW][i]==psgState[psg_PREV][i]) continue;
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2022-05-26 05:24:21 +00:00
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psgState[psg_PREV][i]=psgState[psg_NEW][i];
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2022-09-24 04:23:03 +00:00
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w->writeC(i);
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|
w->writeC(psgState[psg_NEW][i]);
|
2022-05-26 05:24:21 +00:00
|
|
|
}
|
2023-06-06 04:24:34 +00:00
|
|
|
int n=0; // n=completed YM writes. used to determine when to write the CMD byte...
|
2022-05-26 05:24:21 +00:00
|
|
|
for (DivRegWrite& write: ymwrites) {
|
2023-06-06 04:24:34 +00:00
|
|
|
if (n%ZSM_YM_MAX_WRITES==0) {
|
|
|
|
if (ymwrites.size()-n>ZSM_YM_MAX_WRITES) {
|
2022-09-24 07:31:10 +00:00
|
|
|
w->writeC((unsigned char)(ZSM_YM_CMD+ZSM_YM_MAX_WRITES));
|
|
|
|
logD("ZSM: YM-write: %d (%02x) [max]",ZSM_YM_MAX_WRITES,ZSM_YM_MAX_WRITES+ZSM_YM_CMD);
|
2022-05-26 05:24:21 +00:00
|
|
|
} else {
|
2022-09-24 07:31:10 +00:00
|
|
|
w->writeC((unsigned char)(ZSM_YM_CMD+ymwrites.size()-n));
|
|
|
|
logD("ZSM: YM-write: %d (%02x)",ymwrites.size()-n,ZSM_YM_CMD+ymwrites.size()-n);
|
2022-05-26 05:24:21 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
n++;
|
2022-09-24 04:23:03 +00:00
|
|
|
w->writeC(write.addr);
|
|
|
|
w->writeC(write.val);
|
2022-05-26 05:24:21 +00:00
|
|
|
}
|
|
|
|
ymwrites.clear();
|
2023-07-04 03:24:49 +00:00
|
|
|
unsigned int pcmInst=0;
|
|
|
|
int pcmOff=0;
|
|
|
|
int pcmLen=0;
|
2023-07-05 22:07:44 +00:00
|
|
|
int extCmd0Len=pcmMeta.size()*2;
|
2023-07-04 03:24:49 +00:00
|
|
|
if (pcmCache.size()) {
|
|
|
|
// collapse stereo data to mono if both channels are fully identical
|
|
|
|
// which cuts PCM data size in half for center-panned PCM events
|
2023-07-05 22:07:44 +00:00
|
|
|
if (pcmCtrlDCCache&0x10) { // stereo bit is on
|
2023-07-04 03:24:49 +00:00
|
|
|
unsigned int e;
|
2023-07-05 22:07:44 +00:00
|
|
|
if (pcmCtrlDCCache&0x20) { // 16-bit
|
2023-07-04 03:24:49 +00:00
|
|
|
// for 16-bit PCM data, the size must be a multiple of 4
|
|
|
|
if (pcmCache.size()%4==0) {
|
|
|
|
// check for identical L+R channels
|
2023-07-05 22:07:44 +00:00
|
|
|
for (e=0; e<pcmCache.size(); e+=4) {
|
2023-07-04 03:24:49 +00:00
|
|
|
if (pcmCache[e]!=pcmCache[e+2] || pcmCache[e+1]!=pcmCache[e+3]) break;
|
|
|
|
}
|
|
|
|
if (e==pcmCache.size()) { // did not find a mismatch
|
|
|
|
// collapse the data to mono 16-bit
|
2023-07-05 22:07:44 +00:00
|
|
|
for (e=0; e<pcmCache.size()>>1; e+=2) {
|
2023-07-04 03:24:49 +00:00
|
|
|
pcmCache[e]=pcmCache[e<<1];
|
|
|
|
pcmCache[e+1]=pcmCache[(e<<1)+1];
|
|
|
|
}
|
|
|
|
pcmCache.resize(pcmCache.size()>>1);
|
2023-07-05 22:07:44 +00:00
|
|
|
pcmCtrlDCCache&=(unsigned char)~0x10; // clear stereo bit
|
2023-07-04 03:24:49 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
} else { // 8-bit
|
|
|
|
// for 8-bit PCM data, the size must be a multiple of 2
|
|
|
|
if (pcmCache.size()%2==0) {
|
|
|
|
// check for identical L+R channels
|
2023-07-05 22:07:44 +00:00
|
|
|
for (e=0; e<pcmCache.size(); e+=2) {
|
2023-07-04 03:24:49 +00:00
|
|
|
if (pcmCache[e]!=pcmCache[e+1]) break;
|
|
|
|
}
|
|
|
|
if (e==pcmCache.size()) { // did not find a mismatch
|
|
|
|
// collapse the data to mono 8-bit
|
2023-07-05 22:07:44 +00:00
|
|
|
for (e=0; e<pcmCache.size()>>1; e++) {
|
2023-07-04 03:24:49 +00:00
|
|
|
pcmCache[e]=pcmCache[e<<1];
|
|
|
|
}
|
|
|
|
pcmCache.resize(pcmCache.size()>>1);
|
2023-07-05 22:07:44 +00:00
|
|
|
pcmCtrlDCCache&=(unsigned char)~0x10; // clear stereo bit
|
2023-07-04 03:24:49 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// check to see if the most recent received blob matches any of the previous data
|
|
|
|
// and reuse it if there is a match, otherwise append the cache to the rest of
|
|
|
|
// the PCM data
|
|
|
|
std::vector<unsigned char>::iterator it;
|
|
|
|
it=std::search(pcmData.begin(),pcmData.end(),pcmCache.begin(),pcmCache.end());
|
|
|
|
pcmOff=std::distance(pcmData.begin(),it);
|
|
|
|
pcmLen=pcmCache.size();
|
|
|
|
logD("ZSM: pcmOff: %d pcmLen: %d",pcmOff,pcmLen);
|
|
|
|
if (it==pcmData.end()) {
|
|
|
|
pcmData.insert(pcmData.end(),pcmCache.begin(),pcmCache.end());
|
|
|
|
}
|
|
|
|
pcmCache.clear();
|
2023-07-05 22:07:44 +00:00
|
|
|
extCmd0Len+=2;
|
2023-07-04 03:24:49 +00:00
|
|
|
// search for a matching PCM instrument definition
|
|
|
|
for (S_pcmInst& inst: pcmInsts) {
|
|
|
|
if (inst.offset==pcmOff && inst.length==pcmLen && inst.geometry==pcmCtrlDCCache)
|
|
|
|
break;
|
|
|
|
pcmInst++;
|
|
|
|
}
|
|
|
|
if (pcmInst==pcmInsts.size()) {
|
|
|
|
S_pcmInst inst;
|
|
|
|
inst.geometry=pcmCtrlDCCache;
|
|
|
|
inst.offset=pcmOff;
|
|
|
|
inst.length=pcmLen;
|
|
|
|
pcmInsts.push_back(inst);
|
|
|
|
}
|
|
|
|
}
|
2023-07-05 22:07:44 +00:00
|
|
|
if (extCmd0Len>63) { // this would be bad, but will almost certainly never happen
|
|
|
|
logE("ZSM: extCmd 0 exceeded maximum length of 63: %d",extCmd0Len);
|
|
|
|
extCmd0Len=0;
|
2023-07-04 03:24:49 +00:00
|
|
|
pcmMeta.clear();
|
|
|
|
}
|
2023-07-05 22:07:44 +00:00
|
|
|
if (extCmd0Len) { // we have some PCM events to write
|
|
|
|
w->writeC(ZSM_EXT);
|
|
|
|
w->writeC(ZSM_EXT_PCM|(unsigned char)extCmd0Len);
|
2023-07-04 03:24:49 +00:00
|
|
|
for (DivRegWrite& write: pcmMeta) {
|
|
|
|
w->writeC(write.addr);
|
|
|
|
w->writeC(write.val);
|
|
|
|
}
|
|
|
|
pcmMeta.clear();
|
|
|
|
if (pcmLen) {
|
|
|
|
w->writeC(0x02); // 0x02 = Instrument trigger
|
|
|
|
w->writeC((unsigned char)pcmInst&0xff);
|
|
|
|
}
|
|
|
|
}
|
2023-07-05 22:07:44 +00:00
|
|
|
n=0;
|
|
|
|
while (n<(long)syncCache.size()) { // we have one or more sync events to write
|
|
|
|
int writes=syncCache.size()-n;
|
|
|
|
w->writeC(ZSM_EXT);
|
|
|
|
if (writes>ZSM_SYNC_MAX_WRITES) writes=ZSM_SYNC_MAX_WRITES;
|
|
|
|
w->writeC(ZSM_EXT_SYNC|(writes<<1));
|
|
|
|
for (; writes>0; writes--) {
|
|
|
|
w->writeC(0x00); // 0x00 = Arbitrary sync message
|
|
|
|
w->writeC(syncCache[n++]);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
syncCache.clear();
|
2022-05-26 05:24:21 +00:00
|
|
|
numWrites=0;
|
|
|
|
}
|
|
|
|
|
2022-09-24 04:23:03 +00:00
|
|
|
void DivZSM::flushTicks() {
|
2023-06-06 04:24:34 +00:00
|
|
|
while (ticks>ZSM_DELAY_MAX) {
|
2022-09-24 07:31:10 +00:00
|
|
|
logD("ZSM: write delay %d (max)",ZSM_DELAY_MAX);
|
|
|
|
w->writeC((unsigned char)(ZSM_DELAY_CMD+ZSM_DELAY_MAX));
|
2023-06-06 04:24:34 +00:00
|
|
|
ticks-=ZSM_DELAY_MAX;
|
2022-05-26 05:24:21 +00:00
|
|
|
}
|
|
|
|
if (ticks>0) {
|
2022-09-24 07:31:10 +00:00
|
|
|
logD("ZSM: write delay %d",ticks);
|
|
|
|
w->writeC(ZSM_DELAY_CMD+ticks);
|
2022-05-26 05:24:21 +00:00
|
|
|
}
|
|
|
|
ticks=0;
|
|
|
|
}
|