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This commit is contained in:
tildearrow 2022-09-24 02:31:10 -05:00
parent 98cebf92f2
commit 5e2a247b77
3 changed files with 62 additions and 62 deletions
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28
src/engine/zsm.cpp
View File

@ -110,14 +110,14 @@ void DivZSM::writeYM(unsigned char a, unsigned char v) {
void DivZSM::writePSG(unsigned char a, unsigned char v) {
// TODO: suppress writes to PSG voice that is not audible (volume=0)
if (a >= 64) {
logD ("ZSM: ignoring VERA PSG write a=%02x v=%02x",a,v);
return;
logD ("ZSM: ignoring VERA PSG write a=%02x v=%02x",a,v);
return;
}
if(psgState[psg_PREV][a] == v) {
if (psgState[psg_NEW][a] != v)
// NEW value is being reset to the same as PREV value
// so it is no longer a new write.
numWrites--;
numWrites--;
} else {
if (psgState[psg_PREV][a] == psgState[psg_NEW][a])
// if this write changes the NEW cached value to something other
@ -143,7 +143,7 @@ void DivZSM::setLoopPoint() {
flushTicks(); // flush ticks incase no writes were pending
logI("ZSM: loop at file offset %d bytes",w->tell());
loopOffset=w->tell();
//update the ZSM header's loop offset value
// update the ZSM header's loop offset value
w->seek(0x03,SEEK_SET);
w->writeS((short)(loopOffset&0xffff));
w->writeC((unsigned char)((loopOffset>>16)&0xff));
@ -155,7 +155,7 @@ void DivZSM::setLoopPoint() {
// ... and cache (except for unused channels)
memset(&ymState[ym_NEW],-1,0x20);
for (int chan=0; chan<8 ; chan++) {
//do not clear state for as-yet-unused channels
// do not clear state for as-yet-unused channels
if (!(ymMask & (1<<chan))) continue;
// clear the state for channels in use so they match the unknown state
// of the YM shadow.
@ -189,11 +189,11 @@ void DivZSM::flushWrites() {
for (DivRegWrite& write: ymwrites) {
if (n%ZSM_YM_MAX_WRITES == 0) {
if(ymwrites.size()-n > ZSM_YM_MAX_WRITES) {
w->writeC((unsigned char)(ZSM_YM_CMD+ZSM_YM_MAX_WRITES));
logD("ZSM: YM-write: %d (%02x) [max]",ZSM_YM_MAX_WRITES,ZSM_YM_MAX_WRITES+ZSM_YM_CMD);
w->writeC((unsigned char)(ZSM_YM_CMD+ZSM_YM_MAX_WRITES));
logD("ZSM: YM-write: %d (%02x) [max]",ZSM_YM_MAX_WRITES,ZSM_YM_MAX_WRITES+ZSM_YM_CMD);
} else {
w->writeC((unsigned char)(ZSM_YM_CMD+ymwrites.size()-n));
logD("ZSM: YM-write: %d (%02x)",ymwrites.size()-n,ZSM_YM_CMD+ymwrites.size()-n);
w->writeC((unsigned char)(ZSM_YM_CMD+ymwrites.size()-n));
logD("ZSM: YM-write: %d (%02x)",ymwrites.size()-n,ZSM_YM_CMD+ymwrites.size()-n);
}
}
n++;
@ -206,13 +206,13 @@ void DivZSM::flushWrites() {
void DivZSM::flushTicks() {
while (ticks > ZSM_DELAY_MAX) {
logD("ZSM: write delay %d (max)",ZSM_DELAY_MAX);
w->writeC((unsigned char)(ZSM_DELAY_CMD+ZSM_DELAY_MAX));
ticks -= ZSM_DELAY_MAX;
logD("ZSM: write delay %d (max)",ZSM_DELAY_MAX);
w->writeC((unsigned char)(ZSM_DELAY_CMD+ZSM_DELAY_MAX));
ticks -= ZSM_DELAY_MAX;
}
if (ticks>0) {
logD("ZSM: write delay %d",ticks);
w->writeC(ZSM_DELAY_CMD+ticks);
logD("ZSM: write delay %d",ticks);
w->writeC(ZSM_DELAY_CMD+ticks);
}
ticks=0;
}

36
src/engine/zsm.h
View File

@ -38,27 +38,27 @@ enum PSG_STATE { psg_PREV, psg_NEW, psg_STATES };
class DivZSM {
private:
SafeWriter* w;
int ymState[ym_STATES][256];
int psgState[psg_STATES][64];
std::vector<DivRegWrite> ymwrites;
int loopOffset;
int numWrites;
int ticks;
int tickRate;
SafeWriter* w;
int ymState[ym_STATES][256];
int psgState[psg_STATES][64];
std::vector<DivRegWrite> ymwrites;
int loopOffset;
int numWrites;
int ticks;
int tickRate;
int ymMask = 0;
int psgMask = 0;
public:
DivZSM();
~DivZSM();
void init(unsigned int rate = 60);
int getoffset();
void writeYM(unsigned char a, unsigned char v);
void writePSG(unsigned char a, unsigned char v);
void writePCM(unsigned char a, unsigned char v);
void tick(int numticks = 1);
void setLoopPoint();
SafeWriter* finish();
DivZSM();
~DivZSM();
void init(unsigned int rate = 60);
int getoffset();
void writeYM(unsigned char a, unsigned char v);
void writePSG(unsigned char a, unsigned char v);
void writePCM(unsigned char a, unsigned char v);
void tick(int numticks = 1);
void setLoopPoint();
SafeWriter* finish();
private:
void flushWrites();
void flushTicks();

60
src/engine/zsmOps.cpp
View File

@ -35,25 +35,25 @@ SafeWriter* DivEngine::saveZSM(unsigned int zsmrate, bool loop) {
//loop = false;
// find indexes for YM and VERA. Ignore other systems.
for (int i=0; i<song.systemLen; i++) {
switch (song.system[i]) {
case DIV_SYSTEM_VERA:
if (VERA >= 0) { IGNORED++;break; }
VERA = i;
logD("VERA detected as chip id %d",i);
break;
case DIV_SYSTEM_YM2151:
if (YM >= 0) { IGNORED++;break; }
YM = i;
logD("YM detected as chip id %d",i);
break;
default:
IGNORED++;
logD("Ignoring chip %d systemID %d",i,song.system[i]);
}
switch (song.system[i]) {
case DIV_SYSTEM_VERA:
if (VERA >= 0) { IGNORED++;break; }
VERA = i;
logD("VERA detected as chip id %d",i);
break;
case DIV_SYSTEM_YM2151:
if (YM >= 0) { IGNORED++;break; }
YM = i;
logD("YM detected as chip id %d",i);
break;
default:
IGNORED++;
logD("Ignoring chip %d systemID %d",i,song.system[i]);
}
}
if (VERA < 0 && YM < 0) {
logE("No supported systems for ZSM");
return NULL;
logE("No supported systems for ZSM");
return NULL;
}
if (IGNORED > 0)
logW("ZSM export ignoring %d unsupported system%c",IGNORED,IGNORED>1?'s':' ');
@ -121,22 +121,22 @@ SafeWriter* DivEngine::saveZSM(unsigned int zsmrate, bool loop) {
}
// get register dumps
for (int j=0; j<2; j++) {
int i=0;
int i=0;
// dump YM writes first
if (j==0) {
if (YM < 0)
continue;
else
i=YM;
}
if (j==0) {
if (YM < 0)
continue;
else
i=YM;
}
// dump VERA writes second
if (j==1) {
if (VERA < 0)
continue;
else {
if (j==1) {
if (VERA < 0)
continue;
else {
i=VERA;
}
}
}
}
std::vector<DivRegWrite>& writes=disCont[i].dispatch->getRegisterWrites();
if (writes.size() > 0)
logD("zsmOps: Writing %d messages to chip %d",writes.size(), i);