2022-03-22 07:48:48 +00:00
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/**
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* Furnace Tracker - multi-system chiptune tracker
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2023-01-20 00:18:40 +00:00
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* Copyright (C) 2021-2023 tildearrow and contributors
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2022-03-22 07:48:48 +00:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "vic20.h"
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#include "../engine.h"
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2023-03-17 23:00:38 +00:00
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#include "../../ta-log.h"
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2022-03-22 07:48:48 +00:00
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#include <math.h>
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#define rWrite(a,v) {regPool[(a)]=(v)&0xff; vic_sound_machine_store(vic,a,(v)&0xff);}
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2022-03-26 18:47:13 +00:00
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#define CHIP_DIVIDER 32
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#define SAMP_DIVIDER 4
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2022-03-25 07:52:41 +00:00
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2022-03-22 07:48:48 +00:00
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const char* regCheatSheetVIC[]={
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"CH1_Pitch", "0A",
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"CH2_Pitch", "0B",
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"CH3_Pitch", "0C",
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"Noise_Pitch", "0D",
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"Volume", "0E",
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NULL
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};
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const char** DivPlatformVIC20::getRegisterSheet() {
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return regCheatSheetVIC;
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}
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2023-01-02 09:53:37 +00:00
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void DivPlatformVIC20::acquire(short** buf, size_t len) {
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2022-03-22 07:48:48 +00:00
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const unsigned char loadFreq[3] = {0x7e, 0x7d, 0x7b};
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const unsigned char wavePatterns[16] = {
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0b0, 0b10, 0b100, 0b110, 0b1000, 0b1010, 0b1011, 0b1110,
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0b10010, 0b10100, 0b10110, 0b11000, 0b11010, 0b100100, 0b101010, 0b101100
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};
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2023-01-03 06:09:46 +00:00
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for (size_t h=0; h<len; h++) {
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2022-03-22 07:48:48 +00:00
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if (hasWaveWrite) {
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hasWaveWrite=false;
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for (int i=0; i<3; i++) {
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if (chan[i].waveWriteCycle>=0) {
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if (chan[i].waveWriteCycle>=16*7) {
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// empty shift register first
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rWrite(10+i,126);
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} else if (chan[i].waveWriteCycle>=16) {
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unsigned bit=8-(chan[i].waveWriteCycle/16);
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rWrite(10+i,loadFreq[i]|((wavePatterns[chan[i].wave]<<bit)&0x80));
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} else {
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rWrite(10+i,255-chan[i].freq);
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}
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chan[i].waveWriteCycle-=SAMP_DIVIDER;
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hasWaveWrite=true;
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}
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}
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}
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short samp;
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vic_sound_machine_calculate_samples(vic,&samp,1,1,0,SAMP_DIVIDER);
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2023-01-02 09:53:37 +00:00
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buf[0][h]=samp;
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per-channel oscilloscope, part 5
SAA1099 (SAASound and MAME), Lynx, MMC5, N163, PC Engine, PC Speaker,
PET, QSound, WonderSwan, VERA, VIC-20, VRC6 and X1-010!
2022-05-01 07:40:03 +00:00
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for (int i=0; i<4; i++) {
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oscBuf[i]->data[oscBuf[i]->needle++]=vic->ch[i].out?(vic->volume<<11):0;
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}
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2022-03-22 07:48:48 +00:00
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}
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}
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void DivPlatformVIC20::calcAndWriteOutVol(int ch, int env) {
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chan[ch].outVol=MIN(chan[ch].vol*env/15,15);
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writeOutVol(ch);
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}
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void DivPlatformVIC20::writeOutVol(int ch) {
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2023-03-17 23:16:04 +00:00
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rWrite(14,chan[ch].outVol);
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2022-03-22 07:48:48 +00:00
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}
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2022-04-15 20:01:11 +00:00
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void DivPlatformVIC20::tick(bool sysTick) {
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2022-03-22 07:48:48 +00:00
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for (int i=0; i<4; i++) {
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chan[i].std.next();
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2022-04-10 05:01:55 +00:00
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if (chan[i].std.vol.had) {
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int env=chan[i].std.vol.val;
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2022-03-22 07:48:48 +00:00
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calcAndWriteOutVol(i,env);
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}
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2022-12-17 06:21:08 +00:00
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if (NEW_ARP_STRAT) {
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chan[i].handleArp();
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} else if (chan[i].std.arp.had) {
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2022-03-22 07:48:48 +00:00
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if (!chan[i].inPorta) {
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2022-08-22 20:59:45 +00:00
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chan[i].baseFreq=NOTE_PERIODIC(parent->calcArp(chan[i].note,chan[i].std.arp.val));
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2022-03-22 07:48:48 +00:00
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}
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chan[i].freqChanged=true;
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}
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2023-03-17 21:50:42 +00:00
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if (chan[i].std.duty.had) {
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2023-03-17 23:00:38 +00:00
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if (chan[i].onOff!=(bool)chan[i].std.duty.val) {
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chan[i].onOff=(bool)chan[i].std.duty.val;
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2023-03-17 21:50:42 +00:00
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if (chan[i].active) {
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if (chan[i].onOff) {
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chan[i].keyOn=true;
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chan[i].keyOff=false;
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} else {
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chan[i].keyOn=false;
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chan[i].keyOff=true;
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}
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}
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}
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}
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2022-04-10 05:01:55 +00:00
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if (chan[i].std.wave.had) {
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if (chan[i].wave!=chan[i].std.wave.val) {
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chan[i].wave=chan[i].std.wave.val&0x0f;
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2022-03-22 07:48:48 +00:00
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chan[i].keyOn=true;
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}
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}
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2022-04-16 06:39:40 +00:00
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if (chan[i].std.pitch.had) {
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2022-04-28 06:31:16 +00:00
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if (chan[i].std.pitch.mode) {
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chan[i].pitch2+=chan[i].std.pitch.val;
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2022-05-23 03:47:40 +00:00
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CLAMP_VAR(chan[i].pitch2,-32768,32767);
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2022-04-28 06:31:16 +00:00
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} else {
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chan[i].pitch2=chan[i].std.pitch.val;
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}
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2022-04-16 06:39:40 +00:00
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chan[i].freqChanged=true;
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}
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2022-03-22 07:48:48 +00:00
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if (chan[i].freqChanged || chan[i].keyOn || chan[i].keyOff) {
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2022-12-17 07:07:24 +00:00
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chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,chan[i].fixedArp?chan[i].baseNoteOverride:chan[i].arpOff,chan[i].fixedArp,true,0,chan[i].pitch2,chipClock,CHIP_DIVIDER);
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2022-03-26 18:47:13 +00:00
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if (i<3) {
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chan[i].freq>>=(2-i);
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} else {
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chan[i].freq>>=1;
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}
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2022-03-22 07:48:48 +00:00
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if (chan[i].freq<1) chan[i].freq=1;
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2022-03-26 18:47:13 +00:00
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if (chan[i].freq>127) chan[i].freq=0;
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2022-03-22 07:48:48 +00:00
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if (isMuted[i]) chan[i].keyOn=false;
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if (chan[i].keyOn) {
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if (i<3) {
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// 128*16 cycles for lowest channel to finish counting at lowest freq
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// 2*16 cycles for lowest channel to empty first 2 bits
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// 7*16 cycles to write 7 bits
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chan[i].waveWriteCycle=137*16-1;
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hasWaveWrite=true;
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} else {
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rWrite(10+i,255-chan[i].freq);
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}
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chan[i].keyOn=false;
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} else if (chan[i].freqChanged && chan[i].active && !isMuted[i]) {
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rWrite(10+i,255-chan[i].freq);
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}
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if (chan[i].keyOff) {
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rWrite(10+i,0);
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chan[i].keyOff=false;
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}
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chan[i].freqChanged=false;
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}
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}
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}
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int DivPlatformVIC20::dispatch(DivCommand c) {
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switch (c.cmd) {
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case DIV_CMD_NOTE_ON: {
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2022-04-21 07:24:06 +00:00
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DivInstrument* ins=parent->getIns(chan[c.chan].ins,DIV_INS_VIC);
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2022-03-22 07:48:48 +00:00
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if (c.value!=DIV_NOTE_NULL) {
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chan[c.chan].baseFreq=NOTE_PERIODIC(c.value);
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chan[c.chan].freqChanged=true;
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chan[c.chan].note=c.value;
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}
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2023-03-17 21:50:42 +00:00
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chan[c.chan].onOff=true;
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2022-03-22 07:48:48 +00:00
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chan[c.chan].active=true;
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chan[c.chan].keyOn=true;
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2022-04-28 06:31:16 +00:00
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chan[c.chan].macroInit(ins);
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2022-03-22 07:48:48 +00:00
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break;
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}
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case DIV_CMD_NOTE_OFF:
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chan[c.chan].active=false;
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chan[c.chan].keyOff=true;
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2022-04-28 06:31:16 +00:00
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chan[c.chan].macroInit(NULL);
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2022-03-22 07:48:48 +00:00
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break;
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case DIV_CMD_NOTE_OFF_ENV:
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case DIV_CMD_ENV_RELEASE:
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chan[c.chan].std.release();
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break;
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case DIV_CMD_INSTRUMENT:
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if (chan[c.chan].ins!=c.value || c.value2==1) {
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chan[c.chan].ins=c.value;
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}
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break;
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case DIV_CMD_VOLUME:
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if (chan[c.chan].vol!=c.value) {
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chan[c.chan].vol=c.value;
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2022-06-16 20:06:07 +00:00
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if (!chan[c.chan].std.vol.has) {
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2022-03-22 07:48:48 +00:00
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calcAndWriteOutVol(c.chan,15);
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}
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}
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break;
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case DIV_CMD_GET_VOLUME:
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return chan[c.chan].vol;
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break;
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case DIV_CMD_PITCH:
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chan[c.chan].pitch=c.value;
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chan[c.chan].freqChanged=true;
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break;
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case DIV_CMD_WAVE:
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chan[c.chan].wave=c.value&0x0f;
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chan[c.chan].keyOn=true;
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break;
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case DIV_CMD_NOTE_PORTA: {
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int destFreq=NOTE_PERIODIC(c.value2);
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bool return2=false;
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if (destFreq>chan[c.chan].baseFreq) {
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chan[c.chan].baseFreq+=c.value;
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if (chan[c.chan].baseFreq>=destFreq) {
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chan[c.chan].baseFreq=destFreq;
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return2=true;
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}
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} else {
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chan[c.chan].baseFreq-=c.value;
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if (chan[c.chan].baseFreq<=destFreq) {
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chan[c.chan].baseFreq=destFreq;
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return2=true;
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}
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}
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chan[c.chan].freqChanged=true;
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if (return2) {
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chan[c.chan].inPorta=false;
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return 2;
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}
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break;
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}
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case DIV_CMD_LEGATO:
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2022-12-17 07:07:24 +00:00
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chan[c.chan].baseFreq=NOTE_PERIODIC(c.value+((HACKY_LEGATO_MESS)?(chan[c.chan].std.arp.val):(0)));
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2022-03-22 07:48:48 +00:00
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chan[c.chan].freqChanged=true;
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chan[c.chan].note=c.value;
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break;
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case DIV_CMD_PRE_PORTA:
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if (chan[c.chan].active && c.value2) {
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2022-04-28 06:31:16 +00:00
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if (parent->song.resetMacroOnPorta) chan[c.chan].macroInit(parent->getIns(chan[c.chan].ins,DIV_INS_VIC));
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2022-03-22 07:48:48 +00:00
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}
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2022-12-17 07:10:20 +00:00
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if (!chan[c.chan].inPorta && c.value && !parent->song.brokenPortaArp && chan[c.chan].std.arp.will && !NEW_ARP_STRAT) chan[c.chan].baseFreq=NOTE_PERIODIC(chan[c.chan].note);
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2022-03-22 07:48:48 +00:00
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chan[c.chan].inPorta=c.value;
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break;
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case DIV_CMD_GET_VOLMAX:
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return 15;
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break;
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2022-12-17 05:09:56 +00:00
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case DIV_CMD_MACRO_OFF:
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chan[c.chan].std.mask(c.value,true);
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break;
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case DIV_CMD_MACRO_ON:
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chan[c.chan].std.mask(c.value,false);
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break;
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2022-03-22 07:48:48 +00:00
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case DIV_ALWAYS_SET_VOLUME:
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return 1;
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break;
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default:
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break;
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}
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return 1;
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}
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void DivPlatformVIC20::muteChannel(int ch, bool mute) {
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isMuted[ch]=mute;
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if (mute) {
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chan[ch].keyOff=true;
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} else if (chan[ch].active) {
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chan[ch].keyOn=true;
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}
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}
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void DivPlatformVIC20::forceIns() {
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for (int i=0; i<4; i++) {
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chan[i].insChanged=true;
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chan[i].freqChanged=true;
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writeOutVol(i);
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}
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}
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void* DivPlatformVIC20::getChanState(int ch) {
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return &chan[ch];
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}
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2022-06-05 23:17:00 +00:00
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DivMacroInt* DivPlatformVIC20::getChanMacroInt(int ch) {
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return &chan[ch].std;
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}
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per-channel oscilloscope, part 5
SAA1099 (SAASound and MAME), Lynx, MMC5, N163, PC Engine, PC Speaker,
PET, QSound, WonderSwan, VERA, VIC-20, VRC6 and X1-010!
2022-05-01 07:40:03 +00:00
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DivDispatchOscBuffer* DivPlatformVIC20::getOscBuffer(int ch) {
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return oscBuf[ch];
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}
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2022-03-22 07:48:48 +00:00
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unsigned char* DivPlatformVIC20::getRegisterPool() {
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return regPool;
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}
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int DivPlatformVIC20::getRegisterPoolSize() {
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return 16;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformVIC20::reset() {
|
|
|
|
memset(regPool,0,16);
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
chan[i]=Channel();
|
2022-04-15 10:37:23 +00:00
|
|
|
chan[i].std.setEngine(parent);
|
2022-03-22 07:48:48 +00:00
|
|
|
}
|
|
|
|
vic_sound_machine_init(vic,rate,chipClock);
|
|
|
|
hasWaveWrite=false;
|
|
|
|
rWrite(14,15);
|
2022-04-06 12:11:45 +00:00
|
|
|
// hack: starting noise channel right away after this would result in a dead
|
|
|
|
// channel as the LFSR state is 0, so clock it a bit
|
|
|
|
vic_sound_clock(vic,4);
|
2022-03-22 07:48:48 +00:00
|
|
|
}
|
|
|
|
|
2023-01-02 00:46:08 +00:00
|
|
|
int DivPlatformVIC20::getOutputCount() {
|
|
|
|
return 1;
|
2022-03-22 07:48:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformVIC20::notifyInsDeletion(void* ins) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
chan[i].std.notifyInsDeletion((DivInstrument*)ins);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-09-30 01:13:40 +00:00
|
|
|
void DivPlatformVIC20::setFlags(const DivConfig& flags) {
|
|
|
|
if (flags.getInt("clockSel",0)) {
|
2022-03-22 07:48:48 +00:00
|
|
|
chipClock=COLOR_PAL/4.0;
|
|
|
|
} else {
|
|
|
|
chipClock=COLOR_NTSC*2.0/7.0;
|
|
|
|
}
|
2022-12-04 07:04:42 +00:00
|
|
|
CHECK_CUSTOM_CLOCK;
|
2022-03-22 07:48:48 +00:00
|
|
|
rate=chipClock/4;
|
per-channel oscilloscope, part 5
SAA1099 (SAASound and MAME), Lynx, MMC5, N163, PC Engine, PC Speaker,
PET, QSound, WonderSwan, VERA, VIC-20, VRC6 and X1-010!
2022-05-01 07:40:03 +00:00
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
oscBuf[i]->rate=rate;
|
|
|
|
}
|
2022-03-22 07:48:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformVIC20::poke(unsigned int addr, unsigned short val) {
|
|
|
|
rWrite(addr,val);
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformVIC20::poke(std::vector<DivRegWrite>& wlist) {
|
|
|
|
for (DivRegWrite& i: wlist) rWrite(i.addr,i.val);
|
|
|
|
}
|
|
|
|
|
2022-09-30 01:13:40 +00:00
|
|
|
int DivPlatformVIC20::init(DivEngine* p, int channels, int sugRate, const DivConfig& flags) {
|
2022-03-22 07:48:48 +00:00
|
|
|
parent=p;
|
|
|
|
dumpWrites=false;
|
|
|
|
skipRegisterWrites=false;
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
isMuted[i]=false;
|
per-channel oscilloscope, part 5
SAA1099 (SAASound and MAME), Lynx, MMC5, N163, PC Engine, PC Speaker,
PET, QSound, WonderSwan, VERA, VIC-20, VRC6 and X1-010!
2022-05-01 07:40:03 +00:00
|
|
|
oscBuf[i]=new DivDispatchOscBuffer;
|
2022-03-22 07:48:48 +00:00
|
|
|
}
|
|
|
|
setFlags(flags);
|
|
|
|
vic=new sound_vic20_t();
|
|
|
|
reset();
|
|
|
|
return 4;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformVIC20::quit() {
|
per-channel oscilloscope, part 5
SAA1099 (SAASound and MAME), Lynx, MMC5, N163, PC Engine, PC Speaker,
PET, QSound, WonderSwan, VERA, VIC-20, VRC6 and X1-010!
2022-05-01 07:40:03 +00:00
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
delete oscBuf[i];
|
|
|
|
}
|
2022-03-22 07:48:48 +00:00
|
|
|
delete vic;
|
|
|
|
}
|
|
|
|
|
|
|
|
DivPlatformVIC20::~DivPlatformVIC20() {
|
|
|
|
}
|