add ability to select custom clock rates

This commit is contained in:
tildearrow 2022-12-04 02:04:42 -05:00
parent d6d6743740
commit c6604ff581
43 changed files with 113 additions and 50 deletions

View File

@ -453,18 +453,6 @@ class DivDispatch {
*/
virtual bool getWantPreNote();
/**
* get minimum chip clock.
* @return clock in Hz, or 0 if custom clocks are not supported.
*/
virtual unsigned int getClockRangeMin();
/**
* get maximum chip clock.
* @return clock in Hz, or 0 if custom clocks are not supported.
*/
virtual unsigned int getClockRangeMax();
/**
* set the chip flags.
* @param flags a DivConfig containing chip flags.
@ -591,6 +579,14 @@ class DivDispatch {
virtual ~DivDispatch();
};
// custom chip clock helper define. put in setFlags, but before rate is set.
#define CHECK_CUSTOM_CLOCK \
if (flags.getInt("customClock",0)>0) { \
chipClock=flags.getInt("customClock",1000000); \
if (chipClock>20000000) chipClock=20000000; \
if (chipClock<100000) chipClock=100000; \
}
// pitch calculation:
// - a DivDispatch usually contains four variables per channel:
// - baseFreq: this changes on new notes, legato, arpeggio and slides.

View File

@ -97,14 +97,6 @@ bool DivDispatch::getWantPreNote() {
return false;
}
unsigned int DivDispatch::getClockRangeMin() {
return 0;
}
unsigned int DivDispatch::getClockRangeMax() {
return 0;
}
void DivDispatch::setFlags(const DivConfig& flags) {
}

View File

@ -826,6 +826,7 @@ void DivPlatformAY8910::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC/2.0;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/8;
}
for (int i=0; i<3; i++) {

View File

@ -804,6 +804,7 @@ void DivPlatformAY8930::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC/2.0;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/4;
for (int i=0; i<3; i++) {
oscBuf[i]->rate=rate;

View File

@ -323,6 +323,7 @@ void DivPlatformBubSysWSG::notifyInsDeletion(void* ins) {
void DivPlatformBubSysWSG::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC;
CHECK_CUSTOM_CLOCK;
rate=chipClock;
for (int i=0; i<2; i++) {
oscBuf[i]->rate=rate/64;

View File

@ -535,17 +535,18 @@ void DivPlatformC64::setFP(bool fp) {
void DivPlatformC64::setFlags(const DivConfig& flags) {
switch (flags.getInt("clockSel",0)) {
case 0x0: // NTSC C64
rate=COLOR_NTSC*2.0/7.0;
chipClock=COLOR_NTSC*2.0/7.0;
break;
case 0x1: // PAL C64
rate=COLOR_PAL*2.0/9.0;
chipClock=COLOR_PAL*2.0/9.0;
break;
case 0x2: // SSI 2001
default:
rate=14318180.0/16.0;
chipClock=14318180.0/16.0;
break;
}
chipClock=rate;
CHECK_CUSTOM_CLOCK;
rate=chipClock;
for (int i=0; i<3; i++) {
oscBuf[i]->rate=rate/16;
}

View File

@ -454,13 +454,14 @@ void DivPlatformFDS::setNSFPlay(bool use) {
void DivPlatformFDS::setFlags(const DivConfig& flags) {
int clockSel=flags.getInt("clockSel",0);
if (clockSel==2) { // Dendy
rate=COLOR_PAL*2.0/5.0;
chipClock=COLOR_PAL*2.0/5.0;
} else if (clockSel==1) { // PAL
rate=COLOR_PAL*3.0/8.0;
chipClock=COLOR_PAL*3.0/8.0;
} else { // NTSC
rate=COLOR_NTSC/2.0;
chipClock=COLOR_NTSC/2.0;
}
chipClock=rate;
CHECK_CUSTOM_CLOCK;
rate=chipClock;
oscBuf->rate=rate/32;
if (useNP) {
fds_NP->SetClock(rate);

View File

@ -655,6 +655,7 @@ void DivPlatformGB::setFlags(const DivConfig& flags) {
int DivPlatformGB::init(DivEngine* p, int channels, int sugRate, const DivConfig& flags) {
chipClock=4194304;
CHECK_CUSTOM_CLOCK;
rate=chipClock/16;
for (int i=0; i<4; i++) {
isMuted[i]=false;

View File

@ -1221,6 +1221,7 @@ void DivPlatformGenesis::setFlags(const DivConfig& flags) {
ladder=flags.getBool("ladderEffect",false);
noExtMacros=flags.getBool("noExtMacros",false);
OPN2_SetChipType(ladder?ym3438_mode_ym2612:0);
CHECK_CUSTOM_CLOCK;
if (useYMFM) {
if (fm_ymfm!=NULL) delete fm_ymfm;
if (ladder) {

View File

@ -471,6 +471,7 @@ int DivPlatformLynx::init(DivEngine* p, int channels, int sugRate, const DivConf
}
chipClock = 16000000;
CHECK_CUSTOM_CLOCK;
rate = chipClock/128;
for (int i=0; i<4; i++) {

View File

@ -389,13 +389,14 @@ bool DivPlatformMMC5::keyOffAffectsArp(int ch) {
void DivPlatformMMC5::setFlags(const DivConfig& flags) {
int clockSel=flags.getInt("clockSel",0);
if (clockSel==2) { // Dendy
rate=COLOR_PAL*2.0/5.0;
chipClock=COLOR_PAL*2.0/5.0;
} else if (clockSel==1) { // PAL
rate=COLOR_PAL*3.0/8.0;
chipClock=COLOR_PAL*3.0/8.0;
} else { // NTSC
rate=COLOR_NTSC/2.0;
chipClock=COLOR_NTSC/2.0;
}
chipClock=rate;
CHECK_CUSTOM_CLOCK;
rate=chipClock;
for (int i=0; i<3; i++) {
oscBuf[i]->rate=rate/32;
}

View File

@ -372,6 +372,7 @@ void DivPlatformMSM5232::notifyInsDeletion(void* ins) {
void DivPlatformMSM5232::setFlags(const DivConfig& flags) {
chipClock=2119040;
CHECK_CUSTOM_CLOCK;
detune=flags.getInt("detune",0);
msm->set_clock(chipClock+detune*1024);
rate=msm->get_rate();

View File

@ -412,6 +412,7 @@ void DivPlatformMSM6258::setFlags(const DivConfig& flags) {
chipClock=4000000;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/256;
for (int i=0; i<1; i++) {
oscBuf[i]->rate=rate;

View File

@ -438,6 +438,7 @@ void DivPlatformMSM6295::setFlags(const DivConfig& flags) {
chipClock=4000000/4;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/3;
for (int i=0; i<4; i++) {
oscBuf[i]->rate=rate/22;

View File

@ -624,18 +624,19 @@ void DivPlatformN163::poke(std::vector<DivRegWrite>& wlist) {
void DivPlatformN163::setFlags(const DivConfig& flags) {
switch (flags.getInt("clockSel",0)) {
case 1: // PAL
rate=COLOR_PAL*3.0/8.0;
chipClock=COLOR_PAL*3.0/8.0;
break;
case 2: // Dendy
rate=COLOR_PAL*2.0/5.0;
chipClock=COLOR_PAL*2.0/5.0;
break;
default: // NTSC
rate=COLOR_NTSC/2.0;
chipClock=COLOR_NTSC/2.0;
break;
}
CHECK_CUSTOM_CLOCK;
initChanMax=chanMax=flags.getInt("channels",0)&7;
multiplex=!flags.getBool("multiplex",false); // not accurate in real hardware
chipClock=rate;
rate=chipClock;
rate/=15;
n163.set_multiplex(multiplex);
rWrite(0x7f,initChanMax<<4);

View File

@ -532,6 +532,7 @@ void DivPlatformNamcoWSG::setDeviceType(int type) {
void DivPlatformNamcoWSG::setFlags(const DivConfig& flags) {
chipClock=3072000;
CHECK_CUSTOM_CLOCK;
rate=chipClock/32;
namco->device_clock_changed(rate);
for (int i=0; i<chans; i++) {

View File

@ -663,13 +663,13 @@ bool DivPlatformNES::keyOffAffectsArp(int ch) {
void DivPlatformNES::setFlags(const DivConfig& flags) {
int clockSel=flags.getInt("clockSel",0);
if (clockSel==2) { // Dendy
rate=COLOR_PAL*2.0/5.0;
chipClock=COLOR_PAL*2.0/5.0;
apuType=2;
} else if (clockSel==1) { // PAL
rate=COLOR_PAL*3.0/8.0;
chipClock=COLOR_PAL*3.0/8.0;
apuType=1;
} else { // NTSC
rate=COLOR_NTSC/2.0;
chipClock=COLOR_NTSC/2.0;
apuType=0;
}
if (useNP) {
@ -681,7 +681,8 @@ void DivPlatformNES::setFlags(const DivConfig& flags) {
} else {
nes->apu.type=apuType;
}
chipClock=rate;
CHECK_CUSTOM_CLOCK;
rate=chipClock;
for (int i=0; i<5; i++) {
oscBuf[i]->rate=rate/32;
}

View File

@ -1694,6 +1694,7 @@ void DivPlatformOPL::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/72;
chipRateBase=rate;
break;
@ -1715,6 +1716,7 @@ void DivPlatformOPL::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC*4.0;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/288;
chipRateBase=rate;
break;
@ -1730,6 +1732,7 @@ void DivPlatformOPL::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC*8.0;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/768;
chipRateBase=chipClock/684;
break;

View File

@ -958,6 +958,7 @@ void DivPlatformOPLL::setFlags(const DivConfig& flags) {
} else {
chipClock=COLOR_NTSC;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/36;
patchSet=flags.getInt("patchSet",0);
for (int i=0; i<11; i++) {

View File

@ -565,6 +565,7 @@ void DivPlatformPCE::setFlags(const DivConfig& flags) {
} else {
chipClock=COLOR_NTSC;
}
CHECK_CUSTOM_CLOCK;
antiClickEnabled=!flags.getBool("noAntiClick",false);
rate=chipClock/12;
for (int i=0; i<6; i++) {

View File

@ -598,6 +598,7 @@ void DivPlatformPCSpeaker::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC/3.0;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/PCSPKR_DIVIDER;
speakerType=flags.getInt("speakerType",0)&3;
oscBuf->rate=rate;

View File

@ -300,6 +300,7 @@ int DivPlatformPET::init(DivEngine* p, int channels, int sugRate, const DivConfi
dumpWrites=false;
skipRegisterWrites=false;
chipClock=1000000;
CHECK_CUSTOM_CLOCK;
rate=chipClock/SAMP_DIVIDER; // = 250000kHz
isMuted=false;
oscBuf=new DivDispatchOscBuffer;

View File

@ -21,7 +21,7 @@
#include "../engine.h"
#include "../../ta-log.h"
#define CHIP_DIVIDER 16
#define CHIP_DIVIDER 1024
void DivPlatformPong::acquire(short* bufL, short* bufR, size_t start, size_t len) {
int out=0;
@ -226,8 +226,9 @@ bool DivPlatformPong::keyOffAffectsArp(int ch) {
}
void DivPlatformPong::setFlags(const DivConfig& flags) {
chipClock=15625;
rate=chipClock;
chipClock=1000000;
CHECK_CUSTOM_CLOCK;
rate=chipClock/64;
oscBuf->rate=rate;
}

View File

@ -348,6 +348,7 @@ void DivPlatformRF5C68::setFlags(const DivConfig& flags) {
case 2: chipClock=12500000; break;
default: chipClock=8000000; break;
}
CHECK_CUSTOM_CLOCK;
chipType=flags.getInt("chipType",0);
rate=chipClock/384;
for (int i=0; i<8; i++) {

View File

@ -438,6 +438,7 @@ void DivPlatformSAA1099::setFlags(const DivConfig& flags) {
} else {
chipClock=8000000;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/32;
for (int i=0; i<6; i++) {

View File

@ -375,6 +375,7 @@ void DivPlatformSCC::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC/2.0;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/8;
for (int i=0; i<5; i++) {
oscBuf[i]->rate=rate;

View File

@ -486,7 +486,8 @@ void DivPlatformSegaPCM::reset() {
void DivPlatformSegaPCM::setFlags(const DivConfig& flags) {
chipClock=8000000.0;
rate=31250;
CHECK_CUSTOM_CLOCK;
rate=chipClock/256;
for (int i=0; i<16; i++) {
oscBuf[i]->rate=rate;
}

View File

@ -568,6 +568,7 @@ void DivPlatformSMS::setFlags(const DivConfig& flags) {
stereo=false;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/divider;
for (int i=0; i<4; i++) {
oscBuf[i]->rate=rate;

View File

@ -511,6 +511,7 @@ void DivPlatformSoundUnit::setFlags(const DivConfig& flags) {
} else {
chipClock=1236000;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/4;
for (int i=0; i<8; i++) {
oscBuf[i]->rate=rate;

View File

@ -514,6 +514,7 @@ int DivPlatformSwan::init(DivEngine* p, int channels, int sugRate, const DivConf
dumpWrites=false;
skipRegisterWrites=false;
chipClock=3072000;
CHECK_CUSTOM_CLOCK;
rate=chipClock/16; // = 192000kHz, should be enough
for (int i=0; i<4; i++) {
isMuted[i]=false;

View File

@ -343,6 +343,7 @@ void DivPlatformT6W28::notifyInsDeletion(void* ins) {
void DivPlatformT6W28::setFlags(const DivConfig& flags) {
chipClock=3072000.0;
CHECK_CUSTOM_CLOCK;
rate=chipClock/16;
for (int i=0; i<4; i++) {
oscBuf[i]->rate=rate;

View File

@ -356,6 +356,7 @@ void DivPlatformTIA::setFlags(const DivConfig& flags) {
} else {
rate=COLOR_NTSC;
}
CHECK_CUSTOM_CLOCK;
chipClock=rate;
mixingType=flags.getInt("mixingType",0)&3;
for (int i=0; i<2; i++) {

View File

@ -486,6 +486,7 @@ void DivPlatformVB::notifyInsDeletion(void* ins) {
void DivPlatformVB::setFlags(const DivConfig& flags) {
chipClock=5000000.0;
CHECK_CUSTOM_CLOCK;
rate=chipClock/16;
for (int i=0; i<6; i++) {
oscBuf[i]->rate=rate;

View File

@ -438,6 +438,7 @@ int DivPlatformVERA::init(DivEngine* p, int channels, int sugRate, const DivConf
dumpWrites=false;
skipRegisterWrites=false;
chipClock=25000000;
CHECK_CUSTOM_CLOCK;
rate=chipClock/512;
for (int i=0; i<17; i++) {
oscBuf[i]->rate=rate;

View File

@ -307,6 +307,7 @@ void DivPlatformVIC20::setFlags(const DivConfig& flags) {
} else {
chipClock=COLOR_NTSC*2.0/7.0;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/4;
for (int i=0; i<4; i++) {
oscBuf[i]->rate=rate;

View File

@ -482,13 +482,14 @@ bool DivPlatformVRC6::keyOffAffectsArp(int ch) {
void DivPlatformVRC6::setFlags(const DivConfig& flags) {
int clockSel=flags.getInt("clockSel",0);
if (clockSel==2) { // Dendy
rate=COLOR_PAL*2.0/5.0;
chipClock=COLOR_PAL*2.0/5.0;
} else if (clockSel==1) { // PAL
rate=COLOR_PAL*3.0/8.0;
chipClock=COLOR_PAL*3.0/8.0;
} else { // NTSC
rate=COLOR_NTSC/2.0;
chipClock=COLOR_NTSC/2.0;
}
chipClock=rate;
CHECK_CUSTOM_CLOCK;
rate=chipClock;
for (int i=0; i<3; i++) {
oscBuf[i]->rate=rate/32;
}

View File

@ -922,6 +922,7 @@ void DivPlatformX1_010::setFlags(const DivConfig& flags) {
chipClock=16000000;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/512;
stereo=flags.getBool("stereo",false);
for (int i=0; i<16; i++) {

View File

@ -952,6 +952,7 @@ void DivPlatformYM2203::setFlags(const DivConfig& flags) {
ayDiv=16;
break;
}
CHECK_CUSTOM_CLOCK;
noExtMacros=flags.getBool("noExtMacros",false);
rate=fm->sample_rate(chipClock);
for (int i=0; i<6; i++) {

View File

@ -1407,6 +1407,7 @@ void DivPlatformYM2608::setFlags(const DivConfig& flags) {
ayDiv=32;
break;
}
CHECK_CUSTOM_CLOCK;
noExtMacros=flags.getBool("noExtMacros",false);
rate=fm->sample_rate(chipClock);
for (int i=0; i<16; i++) {

View File

@ -294,6 +294,7 @@ template<int ChanNum> class DivPlatformYM2610Base: public DivPlatformOPN {
chipClock=8000000.0;
break;
}
CHECK_CUSTOM_CLOCK;
noExtMacros=flags.getBool("noExtMacros",false);
rate=chipClock/16;
for (int i=0; i<ChanNum; i++) {

View File

@ -494,6 +494,7 @@ void DivPlatformYMZ280B::setFlags(const DivConfig& flags) {
chipClock=16934400;
break;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/384;
break;
case 759:

View File

@ -293,6 +293,7 @@ void DivPlatformZXBeeper::setFlags(const DivConfig& flags) {
} else {
chipClock=COLOR_NTSC;
}
CHECK_CUSTOM_CLOCK;
rate=chipClock/4;
for (int i=0; i<6; i++) {
oscBuf[i]->rate=rate;

View File

@ -24,6 +24,7 @@
bool FurnaceGUI::drawSysConf(int chan, DivSystem type, DivConfig& flags, bool modifyOnChange) {
bool altered=false;
bool restart=settings.restartOnFlagChange && modifyOnChange;
bool supportsCustomRate=true;
switch (type) {
case DIV_SYSTEM_YM2612:
@ -765,6 +766,8 @@ bool FurnaceGUI::drawSysConf(int chan, DivSystem type, DivConfig& flags, bool mo
flags.set("echoFeedback",echoFeedback);
});
}
supportsCustomRate=false;
break;
}
case DIV_SYSTEM_X1_010: {
@ -1401,6 +1404,8 @@ bool FurnaceGUI::drawSysConf(int chan, DivSystem type, DivConfig& flags, bool mo
});
}
supportsCustomRate=false;
break;
}
case DIV_SYSTEM_MSM5232: {
@ -1542,13 +1547,15 @@ bool FurnaceGUI::drawSysConf(int chan, DivSystem type, DivConfig& flags, bool mo
break;
}
case DIV_SYSTEM_SWAN:
case DIV_SYSTEM_VERA:
case DIV_SYSTEM_BUBSYS_WSG:
case DIV_SYSTEM_YMU759:
case DIV_SYSTEM_PET:
case DIV_SYSTEM_VBOY:
ImGui::Text("nothing to configure");
break;
case DIV_SYSTEM_VERA:
case DIV_SYSTEM_YMU759:
supportsCustomRate=false;
break;
default: {
bool sysPal=flags.getInt("clockSel",0);
@ -1565,6 +1572,32 @@ bool FurnaceGUI::drawSysConf(int chan, DivSystem type, DivConfig& flags, bool mo
}
}
if (supportsCustomRate) {
ImGui::Separator();
int customClock=flags.getInt("customClock",0);
bool usingCustomClock=customClock>=100000;
if (ImGui::Checkbox("Custom clock rate",&usingCustomClock)) {
if (usingCustomClock) {
customClock=1000000;
} else {
customClock=0;
}
altered=true;
}
if (ImGui::InputInt("Hz",&customClock)) {
if (customClock<100000) customClock=0;
if (customClock>20000000) customClock=20000000;
altered=true;
}
if (altered) {
e->lockSave([&]() {
flags.set("customClock",customClock);
});
}
}
if (altered) {
if (chan>=0) {
e->updateSysFlags(chan,restart);