mirror of
https://github.com/tildearrow/furnace.git
synced 2024-11-16 09:45:06 +00:00
54e93db207
not reliable yet
392 lines
13 KiB
C
392 lines
13 KiB
C
/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:45:59 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_twiddle.native -fma -simd -compact -variables 4 -pipeline-latency 8 -twiddle-log3 -precompute-twiddles -n 8 -name t2sv_8 -include dft/simd/ts.h */
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/*
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* This function contains 74 FP additions, 50 FP multiplications,
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* (or, 44 additions, 20 multiplications, 30 fused multiply/add),
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* 48 stack variables, 1 constants, and 32 memory accesses
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*/
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#include "dft/simd/ts.h"
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static void t2sv_8(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP707106781, +0.707106781186547524400844362104849039284835938);
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{
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INT m;
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for (m = mb, W = W + (mb * 6); m < me; m = m + (2 * VL), ri = ri + ((2 * VL) * ms), ii = ii + ((2 * VL) * ms), W = W + ((2 * VL) * 6), MAKE_VOLATILE_STRIDE(16, rs)) {
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V T2, T3, Tl, Tn, T5, T6, Tf, T7, Ts, Tb, To, Ti, TC, TG;
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{
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V T4, Tm, Tr, Ta, TB, TF;
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T2 = LDW(&(W[0]));
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T3 = LDW(&(W[TWVL * 2]));
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T4 = VMUL(T2, T3);
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Tl = LDW(&(W[TWVL * 4]));
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Tm = VMUL(T2, Tl);
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Tn = LDW(&(W[TWVL * 5]));
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Tr = VMUL(T2, Tn);
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T5 = LDW(&(W[TWVL * 1]));
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T6 = LDW(&(W[TWVL * 3]));
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Ta = VMUL(T2, T6);
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Tf = VFMA(T5, T6, T4);
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T7 = VFNMS(T5, T6, T4);
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Ts = VFNMS(T5, Tl, Tr);
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Tb = VFMA(T5, T3, Ta);
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To = VFMA(T5, Tn, Tm);
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TB = VMUL(Tf, Tl);
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TF = VMUL(Tf, Tn);
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Ti = VFNMS(T5, T3, Ta);
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TC = VFMA(Ti, Tn, TB);
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TG = VFNMS(Ti, Tl, TF);
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}
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{
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V T1, T1s, Td, T1r, Tu, TY, Tk, TW, TN, TR, T18, T1a, T1c, T1d, TA;
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V TI, T11, T13, T15, T16;
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T1 = LD(&(ri[0]), ms, &(ri[0]));
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T1s = LD(&(ii[0]), ms, &(ii[0]));
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{
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V T8, T9, Tc, T1q;
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T8 = LD(&(ri[WS(rs, 4)]), ms, &(ri[0]));
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T9 = VMUL(T7, T8);
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Tc = LD(&(ii[WS(rs, 4)]), ms, &(ii[0]));
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T1q = VMUL(T7, Tc);
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Td = VFMA(Tb, Tc, T9);
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T1r = VFNMS(Tb, T8, T1q);
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}
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{
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V Tp, Tq, Tt, TX;
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Tp = LD(&(ri[WS(rs, 6)]), ms, &(ri[0]));
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Tq = VMUL(To, Tp);
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Tt = LD(&(ii[WS(rs, 6)]), ms, &(ii[0]));
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TX = VMUL(To, Tt);
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Tu = VFMA(Ts, Tt, Tq);
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TY = VFNMS(Ts, Tp, TX);
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}
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{
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V Tg, Th, Tj, TV;
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Tg = LD(&(ri[WS(rs, 2)]), ms, &(ri[0]));
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Th = VMUL(Tf, Tg);
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Tj = LD(&(ii[WS(rs, 2)]), ms, &(ii[0]));
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TV = VMUL(Tf, Tj);
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Tk = VFMA(Ti, Tj, Th);
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TW = VFNMS(Ti, Tg, TV);
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}
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{
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V TK, TL, TM, T19, TO, TP, TQ, T1b;
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TK = LD(&(ri[WS(rs, 7)]), ms, &(ri[WS(rs, 1)]));
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TL = VMUL(Tl, TK);
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TM = LD(&(ii[WS(rs, 7)]), ms, &(ii[WS(rs, 1)]));
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T19 = VMUL(Tl, TM);
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TO = LD(&(ri[WS(rs, 3)]), ms, &(ri[WS(rs, 1)]));
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TP = VMUL(T3, TO);
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TQ = LD(&(ii[WS(rs, 3)]), ms, &(ii[WS(rs, 1)]));
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T1b = VMUL(T3, TQ);
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TN = VFMA(Tn, TM, TL);
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TR = VFMA(T6, TQ, TP);
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T18 = VSUB(TN, TR);
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T1a = VFNMS(Tn, TK, T19);
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T1c = VFNMS(T6, TO, T1b);
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T1d = VSUB(T1a, T1c);
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}
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{
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V Tx, Ty, Tz, T12, TD, TE, TH, T14;
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Tx = LD(&(ri[WS(rs, 1)]), ms, &(ri[WS(rs, 1)]));
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Ty = VMUL(T2, Tx);
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Tz = LD(&(ii[WS(rs, 1)]), ms, &(ii[WS(rs, 1)]));
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T12 = VMUL(T2, Tz);
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TD = LD(&(ri[WS(rs, 5)]), ms, &(ri[WS(rs, 1)]));
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TE = VMUL(TC, TD);
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TH = LD(&(ii[WS(rs, 5)]), ms, &(ii[WS(rs, 1)]));
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T14 = VMUL(TC, TH);
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TA = VFMA(T5, Tz, Ty);
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TI = VFMA(TG, TH, TE);
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T11 = VSUB(TA, TI);
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T13 = VFNMS(T5, Tx, T12);
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T15 = VFNMS(TG, TD, T14);
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T16 = VSUB(T13, T15);
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}
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{
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V T10, T1g, T1z, T1B, T1f, T1C, T1j, T1A;
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{
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V TU, TZ, T1x, T1y;
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TU = VSUB(T1, Td);
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TZ = VSUB(TW, TY);
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T10 = VADD(TU, TZ);
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T1g = VSUB(TU, TZ);
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T1x = VSUB(T1s, T1r);
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T1y = VSUB(Tk, Tu);
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T1z = VSUB(T1x, T1y);
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T1B = VADD(T1y, T1x);
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}
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{
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V T17, T1e, T1h, T1i;
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T17 = VADD(T11, T16);
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T1e = VSUB(T18, T1d);
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T1f = VADD(T17, T1e);
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T1C = VSUB(T1e, T17);
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T1h = VSUB(T16, T11);
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T1i = VADD(T18, T1d);
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T1j = VSUB(T1h, T1i);
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T1A = VADD(T1h, T1i);
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}
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ST(&(ri[WS(rs, 5)]), VFNMS(LDK(KP707106781), T1f, T10), ms, &(ri[WS(rs, 1)]));
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ST(&(ii[WS(rs, 5)]), VFNMS(LDK(KP707106781), T1A, T1z), ms, &(ii[WS(rs, 1)]));
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ST(&(ri[WS(rs, 1)]), VFMA(LDK(KP707106781), T1f, T10), ms, &(ri[WS(rs, 1)]));
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ST(&(ii[WS(rs, 1)]), VFMA(LDK(KP707106781), T1A, T1z), ms, &(ii[WS(rs, 1)]));
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ST(&(ri[WS(rs, 7)]), VFNMS(LDK(KP707106781), T1j, T1g), ms, &(ri[WS(rs, 1)]));
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ST(&(ii[WS(rs, 7)]), VFNMS(LDK(KP707106781), T1C, T1B), ms, &(ii[WS(rs, 1)]));
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ST(&(ri[WS(rs, 3)]), VFMA(LDK(KP707106781), T1j, T1g), ms, &(ri[WS(rs, 1)]));
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ST(&(ii[WS(rs, 3)]), VFMA(LDK(KP707106781), T1C, T1B), ms, &(ii[WS(rs, 1)]));
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}
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{
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V Tw, T1k, T1u, T1w, TT, T1v, T1n, T1o;
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{
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V Te, Tv, T1p, T1t;
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Te = VADD(T1, Td);
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Tv = VADD(Tk, Tu);
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Tw = VADD(Te, Tv);
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T1k = VSUB(Te, Tv);
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T1p = VADD(TW, TY);
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T1t = VADD(T1r, T1s);
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T1u = VADD(T1p, T1t);
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T1w = VSUB(T1t, T1p);
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}
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{
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V TJ, TS, T1l, T1m;
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TJ = VADD(TA, TI);
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TS = VADD(TN, TR);
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TT = VADD(TJ, TS);
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T1v = VSUB(TS, TJ);
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T1l = VADD(T13, T15);
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T1m = VADD(T1a, T1c);
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T1n = VSUB(T1l, T1m);
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T1o = VADD(T1l, T1m);
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}
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ST(&(ri[WS(rs, 4)]), VSUB(Tw, TT), ms, &(ri[0]));
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ST(&(ii[WS(rs, 4)]), VSUB(T1u, T1o), ms, &(ii[0]));
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ST(&(ri[0]), VADD(Tw, TT), ms, &(ri[0]));
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ST(&(ii[0]), VADD(T1o, T1u), ms, &(ii[0]));
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ST(&(ri[WS(rs, 6)]), VSUB(T1k, T1n), ms, &(ri[0]));
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ST(&(ii[WS(rs, 6)]), VSUB(T1w, T1v), ms, &(ii[0]));
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ST(&(ri[WS(rs, 2)]), VADD(T1k, T1n), ms, &(ri[0]));
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ST(&(ii[WS(rs, 2)]), VADD(T1v, T1w), ms, &(ii[0]));
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}
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 3),
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VTW(0, 7),
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{ TW_NEXT, (2 * VL), 0 }
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};
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static const ct_desc desc = { 8, XSIMD_STRING("t2sv_8"), twinstr, &GENUS, { 44, 20, 30, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t2sv_8) (planner *p) {
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X(kdft_dit_register) (p, t2sv_8, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_twiddle.native -simd -compact -variables 4 -pipeline-latency 8 -twiddle-log3 -precompute-twiddles -n 8 -name t2sv_8 -include dft/simd/ts.h */
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/*
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* This function contains 74 FP additions, 44 FP multiplications,
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* (or, 56 additions, 26 multiplications, 18 fused multiply/add),
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* 42 stack variables, 1 constants, and 32 memory accesses
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*/
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#include "dft/simd/ts.h"
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static void t2sv_8(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP707106781, +0.707106781186547524400844362104849039284835938);
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{
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INT m;
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for (m = mb, W = W + (mb * 6); m < me; m = m + (2 * VL), ri = ri + ((2 * VL) * ms), ii = ii + ((2 * VL) * ms), W = W + ((2 * VL) * 6), MAKE_VOLATILE_STRIDE(16, rs)) {
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V T2, T5, T3, T6, T8, Tc, Tg, Ti, Tl, Tm, Tn, Tz, Tp, Tx;
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{
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V T4, Tb, T7, Ta;
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T2 = LDW(&(W[0]));
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T5 = LDW(&(W[TWVL * 1]));
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T3 = LDW(&(W[TWVL * 2]));
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T6 = LDW(&(W[TWVL * 3]));
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T4 = VMUL(T2, T3);
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Tb = VMUL(T5, T3);
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T7 = VMUL(T5, T6);
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Ta = VMUL(T2, T6);
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T8 = VSUB(T4, T7);
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Tc = VADD(Ta, Tb);
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Tg = VADD(T4, T7);
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Ti = VSUB(Ta, Tb);
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Tl = LDW(&(W[TWVL * 4]));
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Tm = LDW(&(W[TWVL * 5]));
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Tn = VFMA(T2, Tl, VMUL(T5, Tm));
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Tz = VFNMS(Ti, Tl, VMUL(Tg, Tm));
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Tp = VFNMS(T5, Tl, VMUL(T2, Tm));
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Tx = VFMA(Tg, Tl, VMUL(Ti, Tm));
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}
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{
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V Tf, T1i, TL, T1d, TJ, T17, TV, TY, Ts, T1j, TO, T1a, TC, T16, TQ;
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V TT;
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{
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V T1, T1c, Te, T1b, T9, Td;
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T1 = LD(&(ri[0]), ms, &(ri[0]));
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T1c = LD(&(ii[0]), ms, &(ii[0]));
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T9 = LD(&(ri[WS(rs, 4)]), ms, &(ri[0]));
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Td = LD(&(ii[WS(rs, 4)]), ms, &(ii[0]));
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Te = VFMA(T8, T9, VMUL(Tc, Td));
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T1b = VFNMS(Tc, T9, VMUL(T8, Td));
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Tf = VADD(T1, Te);
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T1i = VSUB(T1c, T1b);
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TL = VSUB(T1, Te);
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T1d = VADD(T1b, T1c);
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}
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{
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V TF, TW, TI, TX;
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{
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V TD, TE, TG, TH;
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TD = LD(&(ri[WS(rs, 7)]), ms, &(ri[WS(rs, 1)]));
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TE = LD(&(ii[WS(rs, 7)]), ms, &(ii[WS(rs, 1)]));
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TF = VFMA(Tl, TD, VMUL(Tm, TE));
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TW = VFNMS(Tm, TD, VMUL(Tl, TE));
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TG = LD(&(ri[WS(rs, 3)]), ms, &(ri[WS(rs, 1)]));
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TH = LD(&(ii[WS(rs, 3)]), ms, &(ii[WS(rs, 1)]));
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TI = VFMA(T3, TG, VMUL(T6, TH));
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TX = VFNMS(T6, TG, VMUL(T3, TH));
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}
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TJ = VADD(TF, TI);
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T17 = VADD(TW, TX);
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TV = VSUB(TF, TI);
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TY = VSUB(TW, TX);
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}
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{
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V Tk, TM, Tr, TN;
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{
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V Th, Tj, To, Tq;
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Th = LD(&(ri[WS(rs, 2)]), ms, &(ri[0]));
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Tj = LD(&(ii[WS(rs, 2)]), ms, &(ii[0]));
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Tk = VFMA(Tg, Th, VMUL(Ti, Tj));
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TM = VFNMS(Ti, Th, VMUL(Tg, Tj));
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To = LD(&(ri[WS(rs, 6)]), ms, &(ri[0]));
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Tq = LD(&(ii[WS(rs, 6)]), ms, &(ii[0]));
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Tr = VFMA(Tn, To, VMUL(Tp, Tq));
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TN = VFNMS(Tp, To, VMUL(Tn, Tq));
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}
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Ts = VADD(Tk, Tr);
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T1j = VSUB(Tk, Tr);
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TO = VSUB(TM, TN);
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T1a = VADD(TM, TN);
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}
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{
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V Tw, TR, TB, TS;
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{
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V Tu, Tv, Ty, TA;
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Tu = LD(&(ri[WS(rs, 1)]), ms, &(ri[WS(rs, 1)]));
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Tv = LD(&(ii[WS(rs, 1)]), ms, &(ii[WS(rs, 1)]));
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Tw = VFMA(T2, Tu, VMUL(T5, Tv));
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TR = VFNMS(T5, Tu, VMUL(T2, Tv));
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Ty = LD(&(ri[WS(rs, 5)]), ms, &(ri[WS(rs, 1)]));
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TA = LD(&(ii[WS(rs, 5)]), ms, &(ii[WS(rs, 1)]));
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TB = VFMA(Tx, Ty, VMUL(Tz, TA));
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TS = VFNMS(Tz, Ty, VMUL(Tx, TA));
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}
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TC = VADD(Tw, TB);
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T16 = VADD(TR, TS);
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TQ = VSUB(Tw, TB);
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TT = VSUB(TR, TS);
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}
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{
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V Tt, TK, T1f, T1g;
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Tt = VADD(Tf, Ts);
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TK = VADD(TC, TJ);
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ST(&(ri[WS(rs, 4)]), VSUB(Tt, TK), ms, &(ri[0]));
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ST(&(ri[0]), VADD(Tt, TK), ms, &(ri[0]));
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{
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V T19, T1e, T15, T18;
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T19 = VADD(T16, T17);
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T1e = VADD(T1a, T1d);
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ST(&(ii[0]), VADD(T19, T1e), ms, &(ii[0]));
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ST(&(ii[WS(rs, 4)]), VSUB(T1e, T19), ms, &(ii[0]));
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T15 = VSUB(Tf, Ts);
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T18 = VSUB(T16, T17);
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ST(&(ri[WS(rs, 6)]), VSUB(T15, T18), ms, &(ri[0]));
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ST(&(ri[WS(rs, 2)]), VADD(T15, T18), ms, &(ri[0]));
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}
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T1f = VSUB(TJ, TC);
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T1g = VSUB(T1d, T1a);
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ST(&(ii[WS(rs, 2)]), VADD(T1f, T1g), ms, &(ii[0]));
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ST(&(ii[WS(rs, 6)]), VSUB(T1g, T1f), ms, &(ii[0]));
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{
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V T11, T1k, T14, T1h, T12, T13;
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T11 = VSUB(TL, TO);
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T1k = VSUB(T1i, T1j);
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T12 = VSUB(TT, TQ);
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T13 = VADD(TV, TY);
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T14 = VMUL(LDK(KP707106781), VSUB(T12, T13));
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T1h = VMUL(LDK(KP707106781), VADD(T12, T13));
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ST(&(ri[WS(rs, 7)]), VSUB(T11, T14), ms, &(ri[WS(rs, 1)]));
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ST(&(ii[WS(rs, 5)]), VSUB(T1k, T1h), ms, &(ii[WS(rs, 1)]));
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ST(&(ri[WS(rs, 3)]), VADD(T11, T14), ms, &(ri[WS(rs, 1)]));
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ST(&(ii[WS(rs, 1)]), VADD(T1h, T1k), ms, &(ii[WS(rs, 1)]));
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}
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{
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V TP, T1m, T10, T1l, TU, TZ;
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TP = VADD(TL, TO);
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T1m = VADD(T1j, T1i);
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TU = VADD(TQ, TT);
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TZ = VSUB(TV, TY);
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|
T10 = VMUL(LDK(KP707106781), VADD(TU, TZ));
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|
T1l = VMUL(LDK(KP707106781), VSUB(TZ, TU));
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|
ST(&(ri[WS(rs, 5)]), VSUB(TP, T10), ms, &(ri[WS(rs, 1)]));
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|
ST(&(ii[WS(rs, 7)]), VSUB(T1m, T1l), ms, &(ii[WS(rs, 1)]));
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|
ST(&(ri[WS(rs, 1)]), VADD(TP, T10), ms, &(ri[WS(rs, 1)]));
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|
ST(&(ii[WS(rs, 3)]), VADD(T1l, T1m), ms, &(ii[WS(rs, 1)]));
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|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
VLEAVE();
|
|
}
|
|
|
|
static const tw_instr twinstr[] = {
|
|
VTW(0, 1),
|
|
VTW(0, 3),
|
|
VTW(0, 7),
|
|
{ TW_NEXT, (2 * VL), 0 }
|
|
};
|
|
|
|
static const ct_desc desc = { 8, XSIMD_STRING("t2sv_8"), twinstr, &GENUS, { 56, 26, 18, 0 }, 0, 0, 0 };
|
|
|
|
void XSIMD(codelet_t2sv_8) (planner *p) {
|
|
X(kdft_dit_register) (p, t2sv_8, &desc);
|
|
}
|
|
#endif
|