mirror of
https://github.com/tildearrow/furnace.git
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948 lines
27 KiB
C++
948 lines
27 KiB
C++
/**
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* Furnace Tracker - multi-system chiptune tracker
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* Copyright (C) 2021-2022 tildearrow and contributors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "opl.h"
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#include "../engine.h"
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#include <string.h>
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#include <math.h>
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#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
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#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
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#define CHIP_FREQBASE chipFreqBase
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// N = invalid
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#define N 255
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const unsigned char slotsOPL2i[4][20]={
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{0, 1, 2, 6, 7, 8, 12, 13, 14}, // OP1
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{3, 4, 5, 9, 10, 11, 15, 16, 17}, // OP2
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{N, N, N, N, N, N, N, N, N},
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{N, N, N, N, N, N, N, N, N}
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};
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const unsigned char slotsOPL2Drumsi[4][20]={
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{0, 1, 2, 6, 7, 8, 12, 16, 14, 17, 13}, // OP1
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{3, 4, 5, 9, 10, 11, 15, N, N, N, N}, // OP2
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{N, N, N, N, N, N, N, N, N, N, N},
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{N, N, N, N, N, N, N, N, N, N, N}
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};
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const unsigned short chanMapOPL2[20]={
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0, 1, 2, 3, 4, 5, 6, 7, 8, N, N, N, N, N, N, N, N, N, N, N
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};
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const unsigned char* slotsOPL2[4]={
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slotsOPL2i[0],
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slotsOPL2i[1],
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slotsOPL2i[2],
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slotsOPL2i[3]
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};
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const unsigned char* slotsOPL2Drums[4]={
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slotsOPL2Drumsi[0],
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slotsOPL2Drumsi[1],
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slotsOPL2Drumsi[2],
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slotsOPL2Drumsi[3]
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};
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const unsigned char slotsOPL3i[4][20]={
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{0, 6, 1, 7, 2, 8, 18, 24, 19, 25, 20, 26, 30, 31, 32, 12, 13, 14}, // OP1
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{3, 9, 4, 10, 5, 11, 21, 27, 22, 28, 23, 29, 33, 34, 35, 15, 16, 17}, // OP2
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{6, N, 7, N, 8, N, 24, N, 25, N, 26, N, N, N, N, N, N, N}, // OP3
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{9, N, 10, N, 11, N, 27, N, 28, N, 29, N, N, N, N, N, N, N} // OP4
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};
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const unsigned char slotsOPL3Drumsi[4][20]={
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{0, 6, 1, 7, 2, 8, 18, 24, 19, 25, 20, 26, 30, 31, 32, 12, 16, 14, 17, 13}, // OP1
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{3, 9, 4, 10, 5, 11, 21, 27, 22, 28, 23, 29, 33, 34, 35, N, N, N, N, N}, // OP2
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{6, N, 7, N, 8, N, 24, N, 25, N, 26, N, N, N, N, N, N, N, N, N}, // OP3
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{9, N, 10, N, 11, N, 27, N, 28, N, 29, N, N, N, N, N, N, N, N, N} // OP4
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};
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const unsigned short chanMapOPL3[20]={
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0, 3, 1, 4, 2, 5, 0x100, 0x103, 0x101, 0x104, 0x102, 0x105, 0x106, 0x107, 0x108, 6, 7, 8, N, N
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};
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const unsigned char* slotsOPL3[4]={
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slotsOPL3i[0],
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slotsOPL3i[1],
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slotsOPL3i[2],
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slotsOPL3i[3]
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};
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const unsigned char* slotsOPL3Drums[4]={
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slotsOPL3Drumsi[0],
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slotsOPL3Drumsi[1],
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slotsOPL3Drumsi[2],
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slotsOPL3Drumsi[3]
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};
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const unsigned int slotMap[36]={
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
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0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d,
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0x10, 0x11, 0x12, 0x13, 0x14, 0x15,
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0x100, 0x101, 0x102, 0x103, 0x104, 0x105,
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0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10d,
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0x110, 0x111, 0x112, 0x113, 0x114, 0x115,
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};
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const bool isOutputL[2][4][4]={
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{ // 2-op
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{false, true, false, false}, // 1 > 2
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{ true, true, false, false}, // 1 + 2
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{false, true, false, false}, // ditto, 0
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{ true, true, false, false}, // ditto, 1
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},
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{ // 4-op
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{false, false, false, true}, // 1 > 2 > 3 > 4
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{ true, false, false, true}, // 1 + (2 > 3 > 4)
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{false, true, false, true}, // (1 > 2) + (3 > 4)
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{ true, false, true, true} // 1 + (2 > 3) + 4
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}
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};
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#undef N
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const int orderedOpsL[4]={
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0,2,1,3
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};
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#define ADDR_AM_VIB_SUS_KSR_MULT 0x20
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#define ADDR_KSL_TL 0x40
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#define ADDR_AR_DR 0x60
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#define ADDR_SL_RR 0x80
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#define ADDR_WS 0xe0
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#define ADDR_FREQ 0xa0
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#define ADDR_FREQH 0xb0
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#define ADDR_LR_FB_ALG 0xc0
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const char* DivPlatformOPL::getEffectName(unsigned char effect) {
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switch (effect) {
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case 0x10:
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return "10xy: Setup LFO (x: enable; y: speed)";
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break;
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case 0x11:
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return "11xx: Set feedback (0 to 7)";
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break;
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case 0x12:
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return "12xx: Set level of operator 1 (0 highest, 3F lowest)";
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break;
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case 0x13:
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return "13xx: Set level of operator 2 (0 highest, 3F lowest)";
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break;
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case 0x14:
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return "14xx: Set level of operator 3 (0 highest, 3F lowest; 4-op only)";
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break;
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case 0x15:
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return "15xx: Set level of operator 4 (0 highest, 3F lowest; 4-op only)";
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break;
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case 0x16:
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return "16xy: Set operator multiplier (x: operator from 1 to 4; y: multiplier)";
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break;
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case 0x17:
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return "17xx: Enable channel 6 DAC";
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break;
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case 0x18:
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return "18xx: Toggle extended channel 3 mode";
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break;
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case 0x19:
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return "19xx: Set attack of all operators (0 to F)";
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break;
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case 0x1a:
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return "1Axx: Set attack of operator 1 (0 to F)";
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break;
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case 0x1b:
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return "1Bxx: Set attack of operator 2 (0 to F)";
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break;
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case 0x1c:
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return "1Cxx: Set attack of operator 3 (0 to F; 4-op only)";
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break;
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case 0x1d:
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return "1Dxx: Set attack of operator 4 (0 to F; 4-op only)";
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break;
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case 0x20:
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return "20xy: Set PSG noise mode (x: preset freq/ch3 freq; y: thin pulse/noise)";
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break;
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}
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return NULL;
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}
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void DivPlatformOPL::acquire_nuked(short* bufL, short* bufR, size_t start, size_t len) {
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static short o[2];
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static int os[2];
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for (size_t h=start; h<start+len; h++) {
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os[0]=0; os[1]=0;
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if (!writes.empty() && --delay<0) {
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delay=1;
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QueuedWrite& w=writes.front();
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OPL3_WriteReg(&fm,w.addr,w.val);
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regPool[w.addr&511]=w.val;
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writes.pop();
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}
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OPL3_Generate(&fm,o); os[0]+=o[0]; os[1]+=o[1];
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if (os[0]<-32768) os[0]=-32768;
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if (os[0]>32767) os[0]=32767;
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if (os[1]<-32768) os[1]=-32768;
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if (os[1]>32767) os[1]=32767;
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bufL[h]=os[0];
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bufR[h]=os[1];
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}
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}
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void DivPlatformOPL::acquire(short* bufL, short* bufR, size_t start, size_t len) {
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//if (useYMFM) {
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// acquire_ymfm(bufL,bufR,start,len);
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//} else {
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acquire_nuked(bufL,bufR,start,len);
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//}
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}
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void DivPlatformOPL::tick() {
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for (int i=0; i<melodicChans; i++) {
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chan[i].std.next();
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/*
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if (chan[i].std.hadVol) {
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chan[i].outVol=(chan[i].vol*MIN(127,chan[i].std.vol))/127;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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}
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}
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if (chan[i].std.hadArp) {
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if (!chan[i].inPorta) {
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if (chan[i].std.arpMode) {
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].std.arp);
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} else {
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].note+(signed char)chan[i].std.arp);
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}
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}
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chan[i].freqChanged=true;
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} else {
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if (chan[i].std.arpMode && chan[i].std.finishedArp) {
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].note);
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chan[i].freqChanged=true;
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}
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}
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if (chan[i].std.hadAlg) {
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chan[i].state.alg=chan[i].std.alg;
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rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
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if (!parent->song.algMacroBehavior) for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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}
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}
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if (chan[i].std.hadFb) {
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chan[i].state.fb=chan[i].std.fb;
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rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
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}
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if (chan[i].std.hadFms) {
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chan[i].state.fms=chan[i].std.fms;
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rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
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}
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if (chan[i].std.hadAms) {
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chan[i].state.ams=chan[i].std.ams;
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rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
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}
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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DivMacroInt::IntOp& m=chan[i].std.op[j];
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if (m.hadAm) {
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op.am=m.am;
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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if (m.hadAr) {
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op.ar=m.ar;
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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if (m.hadDr) {
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op.dr=m.dr;
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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if (m.hadMult) {
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op.mult=m.mult;
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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}
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if (m.hadRr) {
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op.rr=m.rr;
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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if (m.hadSl) {
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op.sl=m.sl;
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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if (m.hadTl) {
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op.tl=127-m.tl;
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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}
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if (m.hadRs) {
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op.rs=m.rs;
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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if (m.hadDt) {
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op.dt=m.dt;
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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}
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if (m.hadD2r) {
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op.d2r=m.d2r;
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rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
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}
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if (m.hadSsg) {
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op.ssgEnv=m.ssg;
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rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
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}
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}
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*/
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if (chan[i].keyOn || chan[i].keyOff) {
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immWrite(chanMap[i]+ADDR_FREQH,0x00|(chan[i].freqH&31));
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if (chan[i].state.ops==4 && i<6) {
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immWrite(chanMap[i+1]+ADDR_FREQH,0x00|(chan[i].freqH&31));
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}
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chan[i].keyOff=false;
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}
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}
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if (update4OpMask) {
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update4OpMask=false;
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if (oplType==3) {
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unsigned char opMask=chan[0].fourOp|(chan[2].fourOp<<1)|(chan[4].fourOp<<2)|(chan[6].fourOp<<3)|(chan[8].fourOp<<4)|(chan[10].fourOp<<5);
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immWrite(0x104,opMask);
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//printf("updating opMask to %.2x\n",opMask);
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}
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}
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for (int i=0; i<512; i++) {
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if (pendingWrites[i]!=oldWrites[i]) {
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immWrite(i,pendingWrites[i]&0xff);
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oldWrites[i]=pendingWrites[i];
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}
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}
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for (int i=0; i<melodicChans; i++) {
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if (chan[i].freqChanged) {
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chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,false,octave(chan[i].baseFreq));
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if (chan[i].freq>131071) chan[i].freq=131071;
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int freqt=toFreq(chan[i].freq);
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chan[i].freqH=freqt>>8;
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chan[i].freqL=freqt&0xff;
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immWrite(chanMap[i]+ADDR_FREQ,chan[i].freqL);
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if (chan[i].state.ops==4 && i<6) {
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immWrite(chanMap[i+1]+ADDR_FREQ,chan[i].freqL);
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}
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}
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if (chan[i].keyOn) {
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immWrite(chanMap[i]+ADDR_FREQH,chan[i].freqH|(0x20));
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if (chan[i].state.ops==4 && i<6) {
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immWrite(chanMap[i+1]+ADDR_FREQH,chan[i].freqH|(0x20));
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}
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chan[i].keyOn=false;
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} else if (chan[i].freqChanged) {
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immWrite(chanMap[i]+ADDR_FREQH,chan[i].freqH|(chan[i].active<<5));
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if (chan[i].state.ops==4 && i<6) {
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immWrite(chanMap[i+1]+ADDR_FREQH,chan[i].freqH|(chan[i].active<<5));
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}
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}
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chan[i].freqChanged=false;
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}
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}
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#define OPLL_C_NUM 686
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int DivPlatformOPL::octave(int freq) {
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if (freq>=OPLL_C_NUM*64) {
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return 128;
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} else if (freq>=OPLL_C_NUM*32) {
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return 64;
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} else if (freq>=OPLL_C_NUM*16) {
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return 32;
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} else if (freq>=OPLL_C_NUM*8) {
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return 16;
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} else if (freq>=OPLL_C_NUM*4) {
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return 8;
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} else if (freq>=OPLL_C_NUM*2) {
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return 4;
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} else if (freq>=OPLL_C_NUM) {
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return 2;
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} else {
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return 1;
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}
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return 1;
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}
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int DivPlatformOPL::toFreq(int freq) {
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if (freq>=OPLL_C_NUM*64) {
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return 0x1c00|((freq>>7)&0x3ff);
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} else if (freq>=OPLL_C_NUM*32) {
|
|
return 0x1800|((freq>>6)&0x3ff);
|
|
} else if (freq>=OPLL_C_NUM*16) {
|
|
return 0x1400|((freq>>5)&0x3ff);
|
|
} else if (freq>=OPLL_C_NUM*8) {
|
|
return 0x1000|((freq>>4)&0x3ff);
|
|
} else if (freq>=OPLL_C_NUM*4) {
|
|
return 0xc00|((freq>>3)&0x3ff);
|
|
} else if (freq>=OPLL_C_NUM*2) {
|
|
return 0x800|((freq>>2)&0x3ff);
|
|
} else if (freq>=OPLL_C_NUM) {
|
|
return 0x400|((freq>>1)&0x3ff);
|
|
} else {
|
|
return freq&0x3ff;
|
|
}
|
|
}
|
|
|
|
void DivPlatformOPL::muteChannel(int ch, bool mute) {
|
|
isMuted[ch]=mute;
|
|
int ops=(slots[3][ch]!=255 && chan[ch].state.ops==4 && oplType==3)?4:2;
|
|
chan[ch].fourOp=(ops==4);
|
|
update4OpMask=true;
|
|
for (int i=0; i<ops; i++) {
|
|
unsigned char slot=slots[i][ch];
|
|
if (slot==255) continue;
|
|
unsigned short baseAddr=slotMap[slot];
|
|
DivInstrumentFM::Operator& op=chan[ch].state.op[(ops==4)?orderedOpsL[i]:i];
|
|
|
|
if (isMuted[ch]) {
|
|
rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
|
|
} else {
|
|
if (isOutputL[ops==4][chan[ch].state.alg][i]) {
|
|
rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[ch].outVol&0x3f))/63))|(op.ksl<<6));
|
|
} else {
|
|
rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
|
|
}
|
|
}
|
|
}
|
|
|
|
if (isMuted[ch]) {
|
|
rWrite(chanMap[ch]+ADDR_LR_FB_ALG,(chan[ch].state.alg&1)|(chan[ch].state.fb<<1));
|
|
if (ops==4) {
|
|
rWrite(chanMap[ch+1]+ADDR_LR_FB_ALG,((chan[ch].state.alg>>1)&1)|(chan[ch].state.fb<<1));
|
|
}
|
|
} else {
|
|
rWrite(chanMap[ch]+ADDR_LR_FB_ALG,(chan[ch].state.alg&1)|(chan[ch].state.fb<<1)|((chan[ch].pan&3)<<4));
|
|
if (ops==4) {
|
|
rWrite(chanMap[ch+1]+ADDR_LR_FB_ALG,((chan[ch].state.alg>>1)&1)|(chan[ch].state.fb<<1)|((chan[ch].pan&3)<<4));
|
|
}
|
|
}
|
|
}
|
|
|
|
int DivPlatformOPL::dispatch(DivCommand c) {
|
|
// TODO: drums mode!
|
|
if (c.chan>=melodicChans) return 0;
|
|
switch (c.cmd) {
|
|
case DIV_CMD_NOTE_ON: {
|
|
DivInstrument* ins=parent->getIns(chan[c.chan].ins);
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
chan[c.chan].state=ins->fm;
|
|
}
|
|
|
|
chan[c.chan].std.init(ins);
|
|
if (!chan[c.chan].std.willVol) {
|
|
chan[c.chan].outVol=chan[c.chan].vol;
|
|
}
|
|
if (chan[c.chan].insChanged) {
|
|
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
|
chan[c.chan].fourOp=(ops==4);
|
|
update4OpMask=true;
|
|
for (int i=0; i<ops; i++) {
|
|
unsigned char slot=slots[i][c.chan];
|
|
if (slot==255) continue;
|
|
unsigned short baseAddr=slotMap[slot];
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[(ops==4)?orderedOpsL[i]:i];
|
|
|
|
if (isMuted[c.chan]) {
|
|
rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
|
|
} else {
|
|
if (isOutputL[ops==4][chan[c.chan].state.alg][i]) {
|
|
rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[c.chan].outVol&0x3f))/63))|(op.ksl<<6));
|
|
} else {
|
|
rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
|
|
}
|
|
}
|
|
|
|
rWrite(baseAddr+ADDR_AM_VIB_SUS_KSR_MULT,(op.am<<7)|(op.vib<<6)|(op.sus<<5)|(op.ksr<<4)|op.mult);
|
|
rWrite(baseAddr+ADDR_AR_DR,(op.ar<<4)|op.dr);
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.sl<<4)|op.rr);
|
|
if (oplType>1) {
|
|
rWrite(baseAddr+ADDR_WS,op.ws&((oplType==3)?7:3));
|
|
}
|
|
}
|
|
|
|
if (isMuted[c.chan]) {
|
|
rWrite(chanMap[c.chan]+ADDR_LR_FB_ALG,(chan[c.chan].state.alg&1)|(chan[c.chan].state.fb<<1));
|
|
if (ops==4) {
|
|
rWrite(chanMap[c.chan+1]+ADDR_LR_FB_ALG,((chan[c.chan].state.alg>>1)&1)|(chan[c.chan].state.fb<<1));
|
|
}
|
|
} else {
|
|
rWrite(chanMap[c.chan]+ADDR_LR_FB_ALG,(chan[c.chan].state.alg&1)|(chan[c.chan].state.fb<<1)|((chan[c.chan].pan&3)<<4));
|
|
if (ops==4) {
|
|
rWrite(chanMap[c.chan+1]+ADDR_LR_FB_ALG,((chan[c.chan].state.alg>>1)&1)|(chan[c.chan].state.fb<<1)|((chan[c.chan].pan&3)<<4));
|
|
}
|
|
}
|
|
}
|
|
|
|
chan[c.chan].insChanged=false;
|
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
|
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
|
chan[c.chan].note=c.value;
|
|
chan[c.chan].freqChanged=true;
|
|
}
|
|
chan[c.chan].keyOn=true;
|
|
chan[c.chan].active=true;
|
|
break;
|
|
}
|
|
case DIV_CMD_NOTE_OFF:
|
|
chan[c.chan].keyOff=true;
|
|
chan[c.chan].keyOn=false;
|
|
chan[c.chan].active=false;
|
|
break;
|
|
case DIV_CMD_NOTE_OFF_ENV:
|
|
chan[c.chan].keyOff=true;
|
|
chan[c.chan].keyOn=false;
|
|
chan[c.chan].active=false;
|
|
chan[c.chan].std.release();
|
|
break;
|
|
case DIV_CMD_ENV_RELEASE:
|
|
chan[c.chan].std.release();
|
|
break;
|
|
case DIV_CMD_VOLUME: {
|
|
chan[c.chan].vol=c.value;
|
|
if (!chan[c.chan].std.hasVol) {
|
|
chan[c.chan].outVol=c.value;
|
|
}
|
|
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
|
for (int i=0; i<ops; i++) {
|
|
unsigned char slot=slots[i][c.chan];
|
|
if (slot==255) continue;
|
|
unsigned short baseAddr=slotMap[slot];
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[(ops==4)?orderedOpsL[i]:i];
|
|
|
|
if (isMuted[c.chan]) {
|
|
rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
|
|
} else {
|
|
if (isOutputL[ops==4][chan[c.chan].state.alg][i]) {
|
|
rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[c.chan].outVol&0x3f))/63))|(op.ksl<<6));
|
|
} else {
|
|
rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
case DIV_CMD_GET_VOLUME: {
|
|
return chan[c.chan].vol;
|
|
break;
|
|
}
|
|
case DIV_CMD_INSTRUMENT:
|
|
if (chan[c.chan].ins!=c.value || c.value2==1) {
|
|
chan[c.chan].insChanged=true;
|
|
}
|
|
chan[c.chan].ins=c.value;
|
|
break;
|
|
case DIV_CMD_PANNING: {
|
|
if (c.value==0) {
|
|
chan[c.chan].pan=3;
|
|
} else {
|
|
chan[c.chan].pan=(((c.value&15)>0)<<1)|((c.value>>4)>0);
|
|
}
|
|
int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
|
|
if (isMuted[c.chan]) {
|
|
rWrite(chanMap[c.chan]+ADDR_LR_FB_ALG,(chan[c.chan].state.alg&1)|(chan[c.chan].state.fb<<1));
|
|
if (ops==4) {
|
|
rWrite(chanMap[c.chan+1]+ADDR_LR_FB_ALG,((chan[c.chan].state.alg>>1)&1)|(chan[c.chan].state.fb<<1));
|
|
}
|
|
} else {
|
|
rWrite(chanMap[c.chan]+ADDR_LR_FB_ALG,(chan[c.chan].state.alg&1)|(chan[c.chan].state.fb<<1)|((chan[c.chan].pan&3)<<4));
|
|
if (ops==4) {
|
|
rWrite(chanMap[c.chan+1]+ADDR_LR_FB_ALG,((chan[c.chan].state.alg>>1)&1)|(chan[c.chan].state.fb<<1)|((chan[c.chan].pan&3)<<4));
|
|
}
|
|
}
|
|
//rWrite(chanOffs[c.chan]+ADDR_LRAF,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
|
|
break;
|
|
}
|
|
case DIV_CMD_PITCH: {
|
|
chan[c.chan].pitch=c.value;
|
|
chan[c.chan].freqChanged=true;
|
|
break;
|
|
}
|
|
case DIV_CMD_NOTE_PORTA: {
|
|
int destFreq=NOTE_FREQUENCY(c.value2);
|
|
int newFreq;
|
|
bool return2=false;
|
|
if (destFreq>chan[c.chan].baseFreq) {
|
|
newFreq=chan[c.chan].baseFreq+c.value*octave(chan[c.chan].baseFreq);
|
|
if (newFreq>=destFreq) {
|
|
newFreq=destFreq;
|
|
return2=true;
|
|
}
|
|
} else {
|
|
newFreq=chan[c.chan].baseFreq-c.value*octave(chan[c.chan].baseFreq);
|
|
if (newFreq<=destFreq) {
|
|
newFreq=destFreq;
|
|
return2=true;
|
|
}
|
|
}
|
|
if (!chan[c.chan].portaPause) {
|
|
if (octave(chan[c.chan].baseFreq)!=octave(newFreq)) {
|
|
chan[c.chan].portaPause=true;
|
|
break;
|
|
}
|
|
}
|
|
chan[c.chan].baseFreq=newFreq;
|
|
chan[c.chan].portaPause=false;
|
|
chan[c.chan].freqChanged=true;
|
|
if (return2) {
|
|
chan[c.chan].inPorta=false;
|
|
return 2;
|
|
}
|
|
break;
|
|
}
|
|
case DIV_CMD_LEGATO: {
|
|
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
|
chan[c.chan].note=c.value;
|
|
chan[c.chan].freqChanged=true;
|
|
break;
|
|
}
|
|
case DIV_CMD_FM_LFO: {
|
|
lfoValue=(c.value&7)|((c.value>>4)<<3);
|
|
rWrite(0x22,lfoValue);
|
|
break;
|
|
}
|
|
case DIV_CMD_FM_FB: {
|
|
chan[c.chan].state.fb=c.value&7;
|
|
//rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
|
break;
|
|
}
|
|
case DIV_CMD_FM_MULT: {
|
|
/*
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
op.mult=c.value2&15;
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
*/
|
|
break;
|
|
}
|
|
case DIV_CMD_FM_TL: {
|
|
/*
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
op.tl=c.value2;
|
|
if (isMuted[c.chan]) {
|
|
rWrite(baseAddr+ADDR_TL,127);
|
|
} else {
|
|
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
|
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
|
|
} else {
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
}
|
|
}
|
|
*/
|
|
break;
|
|
}
|
|
case DIV_CMD_FM_AR: {
|
|
/*
|
|
if (c.value<0) {
|
|
for (int i=0; i<4; i++) {
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
op.ar=c.value2&31;
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
}
|
|
} else {
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
op.ar=c.value2&31;
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
}
|
|
*/
|
|
|
|
break;
|
|
}
|
|
case DIV_ALWAYS_SET_VOLUME:
|
|
return 0;
|
|
break;
|
|
case DIV_CMD_GET_VOLMAX:
|
|
return 63;
|
|
break;
|
|
case DIV_CMD_PRE_PORTA:
|
|
chan[c.chan].inPorta=c.value;
|
|
break;
|
|
case DIV_CMD_PRE_NOTE:
|
|
break;
|
|
default:
|
|
//printf("WARNING: unimplemented command %d\n",c.cmd);
|
|
break;
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
void DivPlatformOPL::forceIns() {
|
|
for (int i=0; i<melodicChans; i++) {
|
|
int ops=(slots[3][i]!=255 && chan[i].state.ops==4 && oplType==3)?4:2;
|
|
chan[i].fourOp=(ops==4);
|
|
for (int j=0; j<ops; j++) {
|
|
unsigned char slot=slots[j][i];
|
|
if (slot==255) continue;
|
|
unsigned short baseAddr=slotMap[slot];
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[(ops==4)?orderedOpsL[j]:j];
|
|
|
|
if (isMuted[i]) {
|
|
rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
|
|
} else {
|
|
if (isOutputL[ops==4][chan[i].state.alg][j]) {
|
|
rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[i].outVol&0x3f))/63))|(op.ksl<<6));
|
|
} else {
|
|
rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
|
|
}
|
|
}
|
|
|
|
rWrite(baseAddr+ADDR_AM_VIB_SUS_KSR_MULT,(op.am<<7)|(op.vib<<6)|(op.sus<<5)|(op.ksr<<4)|op.mult);
|
|
rWrite(baseAddr+ADDR_AR_DR,(op.ar<<4)|op.dr);
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.sl<<4)|op.rr);
|
|
if (oplType>1) {
|
|
rWrite(baseAddr+ADDR_WS,op.ws&((oplType==3)?7:3));
|
|
}
|
|
}
|
|
|
|
if (isMuted[i]) {
|
|
rWrite(chanMap[i]+ADDR_LR_FB_ALG,(chan[i].state.alg&1)|(chan[i].state.fb<<1));
|
|
if (ops==4) {
|
|
rWrite(chanMap[i+1]+ADDR_LR_FB_ALG,((chan[i].state.alg>>1)&1)|(chan[i].state.fb<<1));
|
|
}
|
|
} else {
|
|
rWrite(chanMap[i]+ADDR_LR_FB_ALG,(chan[i].state.alg&1)|(chan[i].state.fb<<1)|((chan[i].pan&3)<<4));
|
|
if (ops==4) {
|
|
rWrite(chanMap[i+1]+ADDR_LR_FB_ALG,((chan[i].state.alg>>1)&1)|(chan[i].state.fb<<1)|((chan[i].pan&3)<<4));
|
|
}
|
|
}
|
|
}
|
|
update4OpMask=true;
|
|
}
|
|
|
|
void DivPlatformOPL::toggleRegisterDump(bool enable) {
|
|
DivDispatch::toggleRegisterDump(enable);
|
|
}
|
|
|
|
void* DivPlatformOPL::getChanState(int ch) {
|
|
return &chan[ch];
|
|
}
|
|
|
|
unsigned char* DivPlatformOPL::getRegisterPool() {
|
|
return regPool;
|
|
}
|
|
|
|
int DivPlatformOPL::getRegisterPoolSize() {
|
|
return 512;
|
|
}
|
|
|
|
void DivPlatformOPL::reset() {
|
|
while (!writes.empty()) writes.pop();
|
|
memset(regPool,0,512);
|
|
/*
|
|
if (useYMFM) {
|
|
fm_ymfm->reset();
|
|
}
|
|
*/
|
|
OPL3_Reset(&fm,rate);
|
|
if (dumpWrites) {
|
|
addWrite(0xffffffff,0);
|
|
}
|
|
for (int i=0; i<totalChans; i++) {
|
|
chan[i]=DivPlatformOPL::Channel();
|
|
chan[i].vol=0x3f;
|
|
chan[i].outVol=0x3f;
|
|
}
|
|
|
|
for (int i=0; i<512; i++) {
|
|
oldWrites[i]=-1;
|
|
pendingWrites[i]=-1;
|
|
}
|
|
|
|
lastBusy=60;
|
|
lfoValue=8;
|
|
properDrums=properDrumsSys;
|
|
|
|
if (oplType==1) { // disable waveforms
|
|
immWrite(0x01,0x20);
|
|
}
|
|
|
|
if (oplType==3) { // enable OPL3 features
|
|
immWrite(0x105,1);
|
|
}
|
|
|
|
update4OpMask=true;
|
|
delay=0;
|
|
}
|
|
|
|
bool DivPlatformOPL::isStereo() {
|
|
return true;
|
|
}
|
|
|
|
bool DivPlatformOPL::keyOffAffectsArp(int ch) {
|
|
return (ch>5);
|
|
}
|
|
|
|
bool DivPlatformOPL::keyOffAffectsPorta(int ch) {
|
|
return (ch>5);
|
|
}
|
|
|
|
void DivPlatformOPL::notifyInsChange(int ins) {
|
|
for (int i=0; i<totalChans; i++) {
|
|
if (chan[i].ins==ins) {
|
|
chan[i].insChanged=true;
|
|
}
|
|
}
|
|
}
|
|
|
|
void DivPlatformOPL::notifyInsDeletion(void* ins) {
|
|
}
|
|
|
|
void DivPlatformOPL::poke(unsigned int addr, unsigned short val) {
|
|
immWrite(addr,val);
|
|
}
|
|
|
|
void DivPlatformOPL::poke(std::vector<DivRegWrite>& wlist) {
|
|
for (DivRegWrite& i: wlist) immWrite(i.addr,i.val);
|
|
}
|
|
|
|
int DivPlatformOPL::getPortaFloor(int ch) {
|
|
return (ch>5)?12:0;
|
|
}
|
|
|
|
void DivPlatformOPL::setYMFM(bool use) {
|
|
useYMFM=use;
|
|
}
|
|
|
|
void DivPlatformOPL::setOPLType(int type, bool drums) {
|
|
switch (type) {
|
|
case 1: case 2:
|
|
slotsNonDrums=slotsOPL2;
|
|
slotsDrums=slotsOPL2Drums;
|
|
slots=drums?slotsDrums:slotsNonDrums;
|
|
chanMap=chanMapOPL2;
|
|
chipFreqBase=9440540*0.25;
|
|
chans=9;
|
|
melodicChans=drums?6:9;
|
|
totalChans=drums?11:9;
|
|
break;
|
|
case 3:
|
|
slotsNonDrums=slotsOPL3;
|
|
slotsDrums=slotsOPL3Drums;
|
|
slots=drums?slotsDrums:slotsNonDrums;
|
|
chanMap=chanMapOPL3;
|
|
chipFreqBase=9440540;
|
|
chans=18;
|
|
melodicChans=drums?15:18;
|
|
totalChans=drums?20:18;
|
|
break;
|
|
}
|
|
oplType=type;
|
|
properDrumsSys=drums;
|
|
}
|
|
|
|
void DivPlatformOPL::setFlags(unsigned int flags) {
|
|
/*
|
|
if (flags==3) {
|
|
chipClock=COLOR_NTSC*12.0/7.0;
|
|
} else if (flags==2) {
|
|
chipClock=8000000.0;
|
|
} else if (flags==1) {
|
|
chipClock=COLOR_PAL*12.0/7.0;
|
|
} else {
|
|
chipClock=COLOR_NTSC*15.0/7.0;
|
|
}
|
|
ladder=flags&0x80000000;
|
|
OPN2_SetChipType(ladder?ym3438_mode_ym2612:0);
|
|
if (useYMFM) {
|
|
if (fm_ymfm!=NULL) delete fm_ymfm;
|
|
if (ladder) {
|
|
fm_ymfm=new ymfm::ym2612(iface);
|
|
} else {
|
|
fm_ymfm=new ymfm::ym3438(iface);
|
|
}
|
|
rate=chipClock/144;
|
|
} else {
|
|
rate=chipClock/36;
|
|
}*/
|
|
|
|
if (oplType==3) {
|
|
chipClock=COLOR_NTSC*4.0;
|
|
rate=chipClock/288;
|
|
} else {
|
|
chipClock=COLOR_NTSC;
|
|
rate=chipClock/72;
|
|
}
|
|
}
|
|
|
|
int DivPlatformOPL::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
|
|
parent=p;
|
|
dumpWrites=false;
|
|
skipRegisterWrites=false;
|
|
for (int i=0; i<20; i++) {
|
|
isMuted[i]=false;
|
|
}
|
|
setFlags(flags);
|
|
|
|
reset();
|
|
return 10;
|
|
}
|
|
|
|
void DivPlatformOPL::quit() {
|
|
}
|
|
|
|
DivPlatformOPL::~DivPlatformOPL() {
|
|
}
|