furnace/extern/fftw/dft/simd/common/n1bv_5.c
2022-05-31 03:24:29 -05:00

150 lines
5.5 KiB
C

/*
* Copyright (c) 2003, 2007-14 Matteo Frigo
* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
*/
/* This file was automatically generated --- DO NOT EDIT */
/* Generated on Tue Sep 14 10:45:02 EDT 2021 */
#include "dft/codelet-dft.h"
#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
/* Generated by: ../../../genfft/gen_notw_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -sign 1 -n 5 -name n1bv_5 -include dft/simd/n1b.h */
/*
* This function contains 16 FP additions, 11 FP multiplications,
* (or, 7 additions, 2 multiplications, 9 fused multiply/add),
* 18 stack variables, 4 constants, and 10 memory accesses
*/
#include "dft/simd/n1b.h"
static void n1bv_5(const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs)
{
DVK(KP559016994, +0.559016994374947424102293417182819058860154590);
DVK(KP250000000, +0.250000000000000000000000000000000000000000000);
DVK(KP618033988, +0.618033988749894848204586834365638117720309180);
DVK(KP951056516, +0.951056516295153572116439333379382143405698634);
{
INT i;
const R *xi;
R *xo;
xi = ii;
xo = io;
for (i = v; i > 0; i = i - VL, xi = xi + (VL * ivs), xo = xo + (VL * ovs), MAKE_VOLATILE_STRIDE(10, is), MAKE_VOLATILE_STRIDE(10, os)) {
V T1, T8, Td, Ta, Tc;
T1 = LD(&(xi[0]), ivs, &(xi[0]));
{
V T2, T3, T4, T5, T6, T7;
T2 = LD(&(xi[WS(is, 1)]), ivs, &(xi[WS(is, 1)]));
T3 = LD(&(xi[WS(is, 4)]), ivs, &(xi[0]));
T4 = VADD(T2, T3);
T5 = LD(&(xi[WS(is, 2)]), ivs, &(xi[0]));
T6 = LD(&(xi[WS(is, 3)]), ivs, &(xi[WS(is, 1)]));
T7 = VADD(T5, T6);
T8 = VADD(T4, T7);
Td = VSUB(T5, T6);
Ta = VSUB(T4, T7);
Tc = VSUB(T2, T3);
}
ST(&(xo[0]), VADD(T1, T8), ovs, &(xo[0]));
{
V Te, Tg, Tb, Tf, T9;
Te = VMUL(LDK(KP951056516), VFMA(LDK(KP618033988), Td, Tc));
Tg = VMUL(LDK(KP951056516), VFNMS(LDK(KP618033988), Tc, Td));
T9 = VFNMS(LDK(KP250000000), T8, T1);
Tb = VFMA(LDK(KP559016994), Ta, T9);
Tf = VFNMS(LDK(KP559016994), Ta, T9);
ST(&(xo[WS(os, 1)]), VFMAI(Te, Tb), ovs, &(xo[WS(os, 1)]));
ST(&(xo[WS(os, 3)]), VFMAI(Tg, Tf), ovs, &(xo[WS(os, 1)]));
ST(&(xo[WS(os, 4)]), VFNMSI(Te, Tb), ovs, &(xo[0]));
ST(&(xo[WS(os, 2)]), VFNMSI(Tg, Tf), ovs, &(xo[0]));
}
}
}
VLEAVE();
}
static const kdft_desc desc = { 5, XSIMD_STRING("n1bv_5"), { 7, 2, 9, 0 }, &GENUS, 0, 0, 0, 0 };
void XSIMD(codelet_n1bv_5) (planner *p) { X(kdft_register) (p, n1bv_5, &desc);
}
#else
/* Generated by: ../../../genfft/gen_notw_c.native -simd -compact -variables 4 -pipeline-latency 8 -sign 1 -n 5 -name n1bv_5 -include dft/simd/n1b.h */
/*
* This function contains 16 FP additions, 6 FP multiplications,
* (or, 13 additions, 3 multiplications, 3 fused multiply/add),
* 18 stack variables, 4 constants, and 10 memory accesses
*/
#include "dft/simd/n1b.h"
static void n1bv_5(const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs)
{
DVK(KP250000000, +0.250000000000000000000000000000000000000000000);
DVK(KP587785252, +0.587785252292473129168705954639072768597652438);
DVK(KP951056516, +0.951056516295153572116439333379382143405698634);
DVK(KP559016994, +0.559016994374947424102293417182819058860154590);
{
INT i;
const R *xi;
R *xo;
xi = ii;
xo = io;
for (i = v; i > 0; i = i - VL, xi = xi + (VL * ivs), xo = xo + (VL * ovs), MAKE_VOLATILE_STRIDE(10, is), MAKE_VOLATILE_STRIDE(10, os)) {
V Tb, T3, Tc, T6, Ta;
Tb = LD(&(xi[0]), ivs, &(xi[0]));
{
V T1, T2, T8, T4, T5, T9;
T1 = LD(&(xi[WS(is, 1)]), ivs, &(xi[WS(is, 1)]));
T2 = LD(&(xi[WS(is, 4)]), ivs, &(xi[0]));
T8 = VADD(T1, T2);
T4 = LD(&(xi[WS(is, 2)]), ivs, &(xi[0]));
T5 = LD(&(xi[WS(is, 3)]), ivs, &(xi[WS(is, 1)]));
T9 = VADD(T4, T5);
T3 = VSUB(T1, T2);
Tc = VADD(T8, T9);
T6 = VSUB(T4, T5);
Ta = VMUL(LDK(KP559016994), VSUB(T8, T9));
}
ST(&(xo[0]), VADD(Tb, Tc), ovs, &(xo[0]));
{
V T7, Tf, Te, Tg, Td;
T7 = VBYI(VFMA(LDK(KP951056516), T3, VMUL(LDK(KP587785252), T6)));
Tf = VBYI(VFNMS(LDK(KP951056516), T6, VMUL(LDK(KP587785252), T3)));
Td = VFNMS(LDK(KP250000000), Tc, Tb);
Te = VADD(Ta, Td);
Tg = VSUB(Td, Ta);
ST(&(xo[WS(os, 1)]), VADD(T7, Te), ovs, &(xo[WS(os, 1)]));
ST(&(xo[WS(os, 3)]), VSUB(Tg, Tf), ovs, &(xo[WS(os, 1)]));
ST(&(xo[WS(os, 4)]), VSUB(Te, T7), ovs, &(xo[0]));
ST(&(xo[WS(os, 2)]), VADD(Tf, Tg), ovs, &(xo[0]));
}
}
}
VLEAVE();
}
static const kdft_desc desc = { 5, XSIMD_STRING("n1bv_5"), { 13, 3, 3, 0 }, &GENUS, 0, 0, 0, 0 };
void XSIMD(codelet_n1bv_5) (planner *p) { X(kdft_register) (p, n1bv_5, &desc);
}
#endif