mirror of
https://github.com/tildearrow/furnace.git
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335 lines
9.3 KiB
C
335 lines
9.3 KiB
C
/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* Double-precision support added by Romain Dolbeau.
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* Romain Dolbeau hereby places his modifications in the public domain.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#if !defined(FFTW_SINGLE) && !defined( __aarch64__)
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#error "NEON only works in single precision on 32 bits ARM"
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#endif
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#if defined(FFTW_LDOUBLE) || defined(FFTW_QUAD)
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#error "NEON only works in single or double precision"
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#endif
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#ifdef FFTW_SINGLE
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# define DS(d,s) s /* single-precision option */
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# define SUFF(name) name ## _f32
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#else
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# define DS(d,s) d /* double-precision option */
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# define SUFF(name) name ## _f64
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#endif
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/* define these unconditionally, because they are used by
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taint.c which is compiled without neon */
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#define SIMD_SUFFIX _neon /* for renaming */
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#define VL DS(1,2) /* SIMD complex vector length */
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#define SIMD_VSTRIDE_OKA(x) DS(SIMD_STRIDE_OKA(x),((x) == 2))
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#define SIMD_STRIDE_OKPAIR SIMD_STRIDE_OK
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#if defined(__GNUC__) && !defined(__ARM_NEON__) && !defined(__ARM_NEON)
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#error "compiling simd-neon.h requires -mfpu=neon or equivalent"
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#endif
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#include <arm_neon.h>
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/* FIXME: I am not sure whether this code assumes little-endian
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ordering. VLIT may or may not be wrong for big-endian systems. */
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typedef DS(float64x2_t, float32x4_t) V;
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#ifdef FFTW_SINGLE
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# define VLIT(x0, x1) {x0, x1, x0, x1}
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#else
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# define VLIT(x0, x1) {x0, x1}
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#endif
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#define LDK(x) x
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#define DVK(var, val) const V var = VLIT(val, val)
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/* NEON has FMA, but a three-operand FMA is not too useful
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for FFT purposes. We normally compute
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t0=a+b*c
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t1=a-b*c
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In a three-operand instruction set this translates into
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t0=a
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t0+=b*c
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t1=a
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t1-=b*c
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At least one move must be implemented, negating the advantage of
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the FMA in the first place. At least some versions of gcc generate
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both moves. So we are better off generating t=b*c;t0=a+t;t1=a-t;*/
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#if ARCH_PREFERS_FMA
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#warning "--enable-fma on NEON is probably a bad idea (see source code)"
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#endif
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#define VADD(a, b) SUFF(vaddq)(a, b)
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#define VSUB(a, b) SUFF(vsubq)(a, b)
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#define VMUL(a, b) SUFF(vmulq)(a, b)
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#define VFMA(a, b, c) SUFF(vmlaq)(c, a, b) /* a*b+c */
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#define VFNMS(a, b, c) SUFF(vmlsq)(c, a, b) /* FNMS=-(a*b-c) in powerpc terminology; MLS=c-a*b
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in ARM terminology */
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#define VFMS(a, b, c) VSUB(VMUL(a, b), c) /* FMS=a*b-c in powerpc terminology; no equivalent
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arm instruction (?) */
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#define STOREH(a, v) SUFF(vst1)((a), SUFF(vget_high)(v))
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#define STOREL(a, v) SUFF(vst1)((a), SUFF(vget_low)(v))
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static inline V LDA(const R *x, INT ivs, const R *aligned_like)
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{
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(void) aligned_like; /* UNUSED */
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return SUFF(vld1q)(x);
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}
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static inline void STA(R *x, V v, INT ovs, const R *aligned_like)
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{
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(void) aligned_like; /* UNUSED */
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SUFF(vst1q)(x, v);
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}
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#ifdef FFTW_SINGLE
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static inline V LD(const R *x, INT ivs, const R *aligned_like)
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{
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(void) aligned_like; /* UNUSED */
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return SUFF(vcombine)(SUFF(vld1)(x), SUFF(vld1)((x + ivs)));
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}
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static inline void ST(R *x, V v, INT ovs, const R *aligned_like)
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{
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(void) aligned_like; /* UNUSED */
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/* WARNING: the extra_iter hack depends upon store-low occurring
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after store-high */
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STOREH(x + ovs, v);
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STOREL(x,v);
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}
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#else /* !FFTW_SINGLE */
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# define LD LDA
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# define ST STA
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#endif
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/* 2x2 complex transpose and store */
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#define STM2 DS(STA,ST)
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#define STN2(x, v0, v1, ovs) /* nop */
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#ifdef FFTW_SINGLE
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/* store and 4x4 real transpose */
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static inline void STM4(R *x, V v, INT ovs, const R *aligned_like)
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{
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(void) aligned_like; /* UNUSED */
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SUFF(vst1_lane)((x) , SUFF(vget_low)(v), 0);
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SUFF(vst1_lane)((x + ovs), SUFF(vget_low)(v), 1);
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SUFF(vst1_lane)((x + 2 * ovs), SUFF(vget_high)(v), 0);
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SUFF(vst1_lane)((x + 3 * ovs), SUFF(vget_high)(v), 1);
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}
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#define STN4(x, v0, v1, v2, v3, ovs) /* use STM4 */
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#else /* !FFTW_SINGLE */
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static inline void STM4(R *x, V v, INT ovs, const R *aligned_like)
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{
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(void)aligned_like; /* UNUSED */
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STOREL(x, v);
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STOREH(x + ovs, v);
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}
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# define STN4(x, v0, v1, v2, v3, ovs) /* nothing */
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#endif
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#ifdef FFTW_SINGLE
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#define FLIP_RI(x) SUFF(vrev64q)(x)
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#else
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/* FIXME */
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#define FLIP_RI(x) SUFF(vcombine)(SUFF(vget_high)(x), SUFF(vget_low)(x))
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#endif
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static inline V VCONJ(V x)
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{
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#ifdef FFTW_SINGLE
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static const uint32x4_t pm = {0, 0x80000000u, 0, 0x80000000u};
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return vreinterpretq_f32_u32(veorq_u32(vreinterpretq_u32_f32(x), pm));
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#else
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static const uint64x2_t pm = {0, 0x8000000000000000ull};
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/* Gcc-4.9.2 still does not include vreinterpretq_f64_u64, but simple
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* casts generate the correct assembly.
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*/
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return (float64x2_t)(veorq_u64((uint64x2_t)(x), (uint64x2_t)(pm)));
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#endif
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}
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static inline V VBYI(V x)
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{
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return FLIP_RI(VCONJ(x));
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}
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static inline V VFMAI(V b, V c)
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{
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const V mp = VLIT(-1.0, 1.0);
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return VFMA(FLIP_RI(b), mp, c);
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}
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static inline V VFNMSI(V b, V c)
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{
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const V mp = VLIT(-1.0, 1.0);
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return VFNMS(FLIP_RI(b), mp, c);
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}
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static inline V VFMACONJ(V b, V c)
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{
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const V pm = VLIT(1.0, -1.0);
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return VFMA(b, pm, c);
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}
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static inline V VFNMSCONJ(V b, V c)
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{
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const V pm = VLIT(1.0, -1.0);
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return VFNMS(b, pm, c);
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}
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static inline V VFMSCONJ(V b, V c)
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{
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return VSUB(VCONJ(b), c);
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}
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#ifdef FFTW_SINGLE
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#if 1
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#define VEXTRACT_REIM(tr, ti, tx) \
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{ \
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tr = SUFF(vcombine)(SUFF(vdup_lane)(SUFF(vget_low)(tx), 0), \
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SUFF(vdup_lane)(SUFF(vget_high)(tx), 0)); \
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ti = SUFF(vcombine)(SUFF(vdup_lane)(SUFF(vget_low)(tx), 1), \
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SUFF(vdup_lane)(SUFF(vget_high)(tx), 1)); \
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}
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#else
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/* this alternative might be faster in an ideal world, but gcc likes
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to spill VVV onto the stack */
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#define VEXTRACT_REIM(tr, ti, tx) \
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{ \
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float32x4x2_t vvv = SUFF(vtrnq)(tx, tx); \
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tr = vvv.val[0]; \
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ti = vvv.val[1]; \
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}
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#endif
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#else
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#define VEXTRACT_REIM(tr, ti, tx) \
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{ \
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tr = SUFF(vtrn1q)(tx, tx); \
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ti = SUFF(vtrn2q)(tx, tx); \
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}
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#endif
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static inline V VZMUL(V tx, V sr)
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{
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V tr, ti;
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VEXTRACT_REIM(tr, ti, tx);
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tr = VMUL(sr, tr);
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sr = VBYI(sr);
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return VFMA(ti, sr, tr);
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}
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static inline V VZMULJ(V tx, V sr)
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{
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V tr, ti;
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VEXTRACT_REIM(tr, ti, tx);
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tr = VMUL(sr, tr);
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sr = VBYI(sr);
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return VFNMS(ti, sr, tr);
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}
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static inline V VZMULI(V tx, V sr)
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{
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V tr, ti;
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VEXTRACT_REIM(tr, ti, tx);
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ti = VMUL(ti, sr);
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sr = VBYI(sr);
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return VFMS(tr, sr, ti);
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}
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static inline V VZMULIJ(V tx, V sr)
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{
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V tr, ti;
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VEXTRACT_REIM(tr, ti, tx);
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ti = VMUL(ti, sr);
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sr = VBYI(sr);
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return VFMA(tr, sr, ti);
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}
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/* twiddle storage #1: compact, slower */
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#ifdef FFTW_SINGLE
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#define VTW1(v,x) {TW_CEXP, v, x}, {TW_CEXP, v+1, x}
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#else
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#define VTW1(v,x) {TW_CEXP, v, x}
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#endif
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#define TWVL1 VL
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static inline V BYTW1(const R *t, V sr)
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{
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V tx = LDA(t, 2, 0);
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return VZMUL(tx, sr);
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}
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static inline V BYTWJ1(const R *t, V sr)
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{
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V tx = LDA(t, 2, 0);
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return VZMULJ(tx, sr);
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}
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/* twiddle storage #2: twice the space, faster (when in cache) */
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#ifdef FFTW_SINGLE
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# define VTW2(v,x) \
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{TW_COS, v, x}, {TW_COS, v, x}, {TW_COS, v+1, x}, {TW_COS, v+1, x}, \
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{TW_SIN, v, -x}, {TW_SIN, v, x}, {TW_SIN, v+1, -x}, {TW_SIN, v+1, x}
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#else
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# define VTW2(v,x) \
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{TW_COS, v, x}, {TW_COS, v, x}, {TW_SIN, v, -x}, {TW_SIN, v, x}
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#endif
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#define TWVL2 (2 * VL)
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static inline V BYTW2(const R *t, V sr)
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{
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V si = FLIP_RI(sr);
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V tr = LDA(t, 2, 0), ti = LDA(t+2*VL, 2, 0);
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return VFMA(ti, si, VMUL(tr, sr));
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}
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static inline V BYTWJ2(const R *t, V sr)
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{
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V si = FLIP_RI(sr);
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V tr = LDA(t, 2, 0), ti = LDA(t+2*VL, 2, 0);
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return VFNMS(ti, si, VMUL(tr, sr));
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}
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/* twiddle storage #3 */
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#ifdef FFTW_SINGLE
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# define VTW3(v,x) {TW_CEXP, v, x}, {TW_CEXP, v+1, x}
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#else
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# define VTW3(v,x) {TW_CEXP, v, x}
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#endif
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# define TWVL3 (VL)
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/* twiddle storage for split arrays */
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#ifdef FFTW_SINGLE
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# define VTWS(v,x) \
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{TW_COS, v, x}, {TW_COS, v+1, x}, {TW_COS, v+2, x}, {TW_COS, v+3, x}, \
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{TW_SIN, v, x}, {TW_SIN, v+1, x}, {TW_SIN, v+2, x}, {TW_SIN, v+3, x}
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#else
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# define VTWS(v,x) \
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{TW_COS, v, x}, {TW_COS, v+1, x}, {TW_SIN, v, x}, {TW_SIN, v+1, x}
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#endif
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#define TWVLS (2 * VL)
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#define VLEAVE() /* nothing */
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#include "simd-common.h"
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