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Updating ESFMu to version v1.1.1 (envelope delay patch)
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parent
3cb8190258
commit
cb38cf8f67
3 changed files with 41 additions and 6 deletions
34
extern/ESFMu/esfm.c
vendored
34
extern/ESFMu/esfm.c
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@ -374,7 +374,6 @@ ESFM_envelope_calc(esfm_slot *slot)
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bool reset = 0;
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bool key_on;
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bool key_on_signal;
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uint16 delay_counter_compare;
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key_on = *slot->in.key_on;
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if (!slot->chip->native_mode)
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@ -421,19 +420,42 @@ ESFM_envelope_calc(esfm_slot *slot)
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{
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slot->in.eg_delay_run = 1;
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slot->in.eg_delay_counter = 0;
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slot->in.eg_delay_transitioned_01 = 0;
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slot->in.eg_delay_transitioned_01_gate = 0;
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slot->in.eg_delay_transitioned_10 = 0;
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slot->in.eg_delay_transitioned_10_gate = 0;
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slot->in.eg_delay_counter_compare = 0;
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if (slot->env_delay > 0)
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{
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slot->in.eg_delay_counter_compare = 256 << slot->env_delay;
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}
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}
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else if (!key_on)
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{
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slot->in.eg_delay_run = 0;
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}
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delay_counter_compare = 0;
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if (slot->env_delay > 0)
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// TODO: is this really how the chip behaves? Can it only transition the envelope delay once? Am I implementing this in a sane way? I feel like this is a roundabout hack.
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if ((slot->in.eg_delay_transitioned_10 && !slot->in.eg_delay_transitioned_10_gate) ||
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(slot->in.eg_delay_transitioned_01 && !slot->in.eg_delay_transitioned_01_gate)
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)
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{
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delay_counter_compare = 256 << slot->env_delay;
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slot->in.eg_delay_counter_compare = 0;
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if (slot->env_delay > 0)
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{
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slot->in.eg_delay_counter_compare = 256 << slot->env_delay;
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}
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if (slot->in.eg_delay_transitioned_10)
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{
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slot->in.eg_delay_transitioned_10_gate = 1;
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}
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if (slot->in.eg_delay_transitioned_01)
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{
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slot->in.eg_delay_transitioned_01_gate = 1;
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}
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}
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if (key_on && ((slot->in.eg_delay_counter >= delay_counter_compare) || !slot->chip->native_mode))
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if (key_on && ((slot->in.eg_delay_counter >= slot->in.eg_delay_counter_compare) || !slot->chip->native_mode))
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{
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key_on_signal = 1;
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} else {
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@ -443,7 +465,7 @@ ESFM_envelope_calc(esfm_slot *slot)
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if (key_on && slot->in.eg_state == EG_RELEASE)
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{
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if ((slot->in.eg_delay_counter >= delay_counter_compare) || !slot->chip->native_mode)
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if ((slot->in.eg_delay_counter >= slot->in.eg_delay_counter_compare) || !slot->chip->native_mode)
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{
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reset = 1;
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reg_rate = slot->attack_rate;
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5
extern/ESFMu/esfm.h
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5
extern/ESFMu/esfm.h
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@ -174,7 +174,12 @@ typedef struct _esfm_slot_internal
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uint2 eg_state;
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flag eg_delay_run;
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flag eg_delay_transitioned_10;
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flag eg_delay_transitioned_10_gate;
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flag eg_delay_transitioned_01;
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flag eg_delay_transitioned_01_gate;
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uint16 eg_delay_counter;
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uint16 eg_delay_counter_compare;
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} esfm_slot_internal;
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8
extern/ESFMu/esfm_registers.c
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8
extern/ESFMu/esfm_registers.c
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@ -365,6 +365,14 @@ ESFM_slot_write (esfm_slot *slot, uint8_t register_idx, uint8_t data)
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ESFM_slot_update_keyscale(slot);
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break;
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case 0x05:
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if (slot->env_delay < (data >> 5))
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{
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slot->in.eg_delay_transitioned_01 = 1;
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}
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else if (slot->env_delay > (data >> 5))
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{
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slot->in.eg_delay_transitioned_10 = 1;
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}
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slot->env_delay = data >> 5;
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slot->emu_key_on = (data >> 5) & 0x01;
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slot->block = (data >> 2) & 0x07;
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