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core quality, part 2

Browse source 
- Bubble System WSG
- C64 (dSID)
- Game Boy
- DS
- PowerNoise
This commit is contained in:
tildearrow 2024-04-06 15:52:13 -05:00
parent a1254d5fb6
commit cb1f268335
12 changed files with 175 additions and 12 deletions
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24
src/engine/dispatchContainer.cpp
View file

@ -299,6 +299,11 @@ void DivDispatchContainer::init(DivSystem sys, DivEngine* eng, int chanCount, do
break;
case DIV_SYSTEM_GB:
dispatch=new DivPlatformGB;
if (isRender) {
((DivPlatformGB*)dispatch)->setCoreQuality(eng->getConfInt("gbQualityRender",3));
} else {
((DivPlatformGB*)dispatch)->setCoreQuality(eng->getConfInt("gbQuality",3));
}
break;
case DIV_SYSTEM_PCE:
dispatch=new DivPlatformPCE;
@ -321,8 +326,10 @@ void DivDispatchContainer::init(DivSystem sys, DivEngine* eng, int chanCount, do
dispatch=new DivPlatformC64;
if (isRender) {
((DivPlatformC64*)dispatch)->setCore(eng->getConfInt("c64CoreRender",1));
((DivPlatformC64*)dispatch)->setCoreQuality(eng->getConfInt("dsidQualityRender",3));
} else {
((DivPlatformC64*)dispatch)->setCore(eng->getConfInt("c64Core",0));
((DivPlatformC64*)dispatch)->setCoreQuality(eng->getConfInt("dsidQuality",3));
}
((DivPlatformC64*)dispatch)->setChipModel(true);
break;
@ -330,8 +337,10 @@ void DivDispatchContainer::init(DivSystem sys, DivEngine* eng, int chanCount, do
dispatch=new DivPlatformC64;
if (isRender) {
((DivPlatformC64*)dispatch)->setCore(eng->getConfInt("c64CoreRender",1));
((DivPlatformC64*)dispatch)->setCoreQuality(eng->getConfInt("dsidQualityRender",3));
} else {
((DivPlatformC64*)dispatch)->setCore(eng->getConfInt("c64Core",0));
((DivPlatformC64*)dispatch)->setCoreQuality(eng->getConfInt("dsidQuality",3));
}
((DivPlatformC64*)dispatch)->setChipModel(false);
break;
@ -567,6 +576,11 @@ void DivDispatchContainer::init(DivSystem sys, DivEngine* eng, int chanCount, do
break;
case DIV_SYSTEM_BUBSYS_WSG:
dispatch=new DivPlatformBubSysWSG;
if (isRender) {
((DivPlatformBubSysWSG*)dispatch)->setCoreQuality(eng->getConfInt("bubsysQualityRender",3));
} else {
((DivPlatformBubSysWSG*)dispatch)->setCoreQuality(eng->getConfInt("bubsysQuality",3));
}
break;
case DIV_SYSTEM_N163:
dispatch=new DivPlatformN163;
@ -677,12 +691,22 @@ void DivDispatchContainer::init(DivSystem sys, DivEngine* eng, int chanCount, do
break;
case DIV_SYSTEM_POWERNOISE:
dispatch=new DivPlatformPowerNoise;
if (isRender) {
((DivPlatformPowerNoise*)dispatch)->setCoreQuality(eng->getConfInt("pnQualityRender",3));
} else {
((DivPlatformPowerNoise*)dispatch)->setCoreQuality(eng->getConfInt("pnQuality",3));
}
break;
case DIV_SYSTEM_DAVE:
dispatch=new DivPlatformDave;
break;
case DIV_SYSTEM_NDS:
dispatch=new DivPlatformNDS;
if (isRender) {
((DivPlatformNDS*)dispatch)->setCoreQuality(eng->getConfInt("ndsQualityRender",3));
} else {
((DivPlatformNDS*)dispatch)->setCoreQuality(eng->getConfInt("ndsQuality",3));
}
break;
case DIV_SYSTEM_5E01:
dispatch=new DivPlatformNES;

30
src/engine/platform/bubsyswsg.cpp
View file

@ -44,7 +44,7 @@ void DivPlatformBubSysWSG::acquire(short** buf, size_t len) {
for (size_t h=0; h<len; h++) {
signed int out=0;
// K005289 part
k005289.tick(8);
k005289.tick(coreQuality);
// Wavetable part
for (int i=0; i<2; i++) {
@ -332,7 +332,7 @@ void DivPlatformBubSysWSG::notifyInsDeletion(void* ins) {
void DivPlatformBubSysWSG::setFlags(const DivConfig& flags) {
chipClock=COLOR_NTSC;
CHECK_CUSTOM_CLOCK;
rate=chipClock/8;
rate=chipClock/coreQuality;
for (int i=0; i<2; i++) {
oscBuf[i]->rate=rate/8;
}
@ -346,6 +346,32 @@ void DivPlatformBubSysWSG::poke(std::vector<DivRegWrite>& wlist) {
for (DivRegWrite& i: wlist) rWrite(i.addr,i.val);
}
void DivPlatformBubSysWSG::setCoreQuality(unsigned char q) {
switch (q) {
case 0:
coreQuality=64;
break;
case 1:
coreQuality=32;
break;
case 2:
coreQuality=16;
break;
case 3:
coreQuality=8;
break;
case 4:
coreQuality=4;
break;
case 5:
coreQuality=1;
break;
default:
coreQuality=8;
break;
}
}
int DivPlatformBubSysWSG::init(DivEngine* p, int channels, int sugRate, const DivConfig& flags) {
parent=p;
dumpWrites=false;

2
src/engine/platform/bubsyswsg.h
View file

@ -38,6 +38,7 @@ class DivPlatformBubSysWSG: public DivDispatch {
bool isMuted[2];
unsigned char writeOscBuf;
int coreQuality;
k005289_core k005289;
unsigned short regPool[4];
void updateWave(int ch);
@ -64,6 +65,7 @@ class DivPlatformBubSysWSG: public DivDispatch {
void poke(unsigned int addr, unsigned short val);
void poke(std::vector<DivRegWrite>& wlist);
const char** getRegisterSheet();
void setCoreQuality(unsigned char q);
int init(DivEngine* parent, int channels, int sugRate, const DivConfig& flags);
void quit();
~DivPlatformBubSysWSG();

28
src/engine/platform/c64.cpp
View file

@ -726,7 +726,7 @@ void DivPlatformC64::setFlags(const DivConfig& flags) {
oscBuf[i]->rate=rate/16;
}
if (sidCore>0) {
rate/=4;
rate/=(sidCore==2)?coreQuality:4;
if (sidCore==1) sid_fp->setSamplingParameters(chipClock,reSIDfp::DECIMATE,rate,0);
}
keyPriority=flags.getBool("keyPriority",true);
@ -757,6 +757,32 @@ void DivPlatformC64::setFlags(const DivConfig& flags) {
}
}
void DivPlatformC64::setCoreQuality(unsigned char q) {
switch (q) {
case 0:
coreQuality=32;
break;
case 1:
coreQuality=16;
break;
case 2:
coreQuality=8;
break;
case 3:
coreQuality=4;
break;
case 4:
coreQuality=2;
break;
case 5:
coreQuality=1;
break;
default:
coreQuality=4;
break;
}
}
int DivPlatformC64::init(DivEngine* p, int channels, int sugRate, const DivConfig& flags) {
parent=p;
dumpWrites=false;

2
src/engine/platform/c64.h
View file

@ -84,6 +84,7 @@ class DivPlatformC64: public DivDispatch {
SID* sid;
reSIDfp::SID* sid_fp;
struct SID_chip* sid_d;
int coreQuality;
unsigned char regPool[32];
friend void putDispatchChip(void*,int);
@ -121,6 +122,7 @@ class DivPlatformC64: public DivDispatch {
int init(DivEngine* parent, int channels, int sugRate, const DivConfig& flags);
void setChipModel(bool is6581);
void setCore(unsigned char which);
void setCoreQuality(unsigned char q);
void quit();
~DivPlatformC64();
};

30
src/engine/platform/gb.cpp
View file

@ -70,7 +70,7 @@ void DivPlatformGB::acquire(short** buf, size_t len) {
writes.pop();
}
GB_advance_cycles(gb,16);
GB_advance_cycles(gb,coreQuality);
buf[0][i]=gb->apu_output.final_sample.left;
buf[1][i]=gb->apu_output.final_sample.right;
@ -722,12 +722,38 @@ void DivPlatformGB::setFlags(const DivConfig& flags) {
chipClock=4194304;
CHECK_CUSTOM_CLOCK;
rate=chipClock/16;
rate=chipClock/coreQuality;
for (int i=0; i<4; i++) {
oscBuf[i]->rate=rate;
}
}
void DivPlatformGB::setCoreQuality(unsigned char q) {
switch (q) {
case 0:
coreQuality=120;
break;
case 1:
coreQuality=64;
break;
case 2:
coreQuality=32;
break;
case 3:
coreQuality=16;
break;
case 4:
coreQuality=4;
break;
case 5:
coreQuality=1;
break;
default:
coreQuality=16;
break;
}
}
int DivPlatformGB::init(DivEngine* p, int channels, int sugRate, const DivConfig& flags) {
parent=p;
dumpWrites=false;

2
src/engine/platform/gb.h
View file

@ -73,6 +73,7 @@ class DivPlatformGB: public DivDispatch {
int antiClickPeriodCount, antiClickWavePos;
int coreQuality;
GB_gameboy_t* gb;
GB_model_t model;
unsigned char regPool[128];
@ -104,6 +105,7 @@ class DivPlatformGB: public DivDispatch {
void poke(std::vector<DivRegWrite>& wlist);
const char** getRegisterSheet();
void setFlags(const DivConfig& flags);
void setCoreQuality(unsigned char q);
int init(DivEngine* parent, int channels, int sugRate, const DivConfig& flags);
void quit();
~DivPlatformGB();

31
src/engine/platform/nds.cpp
View file

@ -23,7 +23,6 @@
#include <math.h>
#define CHIP_DIVIDER 32
#define CLOCK_DIVIDER 128 // for match to output rate
#define rRead8(a) (nds.read8(a))
#define rWrite8(a,v) {if(!skipRegisterWrites) {nds.write8((a),(v)); regPool[(a)]=(v); if(dumpWrites) addWrite((a),(v)); }}
@ -71,7 +70,7 @@ const char** DivPlatformNDS::getRegisterSheet() {
void DivPlatformNDS::acquire(short** buf, size_t len) {
for (size_t i=0; i<len; i++) {
nds.tick(CLOCK_DIVIDER);
nds.tick(coreQuality);
int lout=((nds.loutput()-0x200)<<5); // scale to 16 bit
int rout=((nds.routput()-0x200)<<5); // scale to 16 bit
if (lout>32767) lout=32767;
@ -561,13 +560,39 @@ void DivPlatformNDS::renderSamples(int sysID) {
void DivPlatformNDS::setFlags(const DivConfig& flags) {
isDSi=flags.getBool("chipType",0);
chipClock=33513982;
rate=chipClock/2/CLOCK_DIVIDER;
rate=chipClock/2/coreQuality;
for (int i=0; i<16; i++) {
oscBuf[i]->rate=rate;
}
memCompo.capacity=(isDSi?16777216:4194304);
}
void DivPlatformNDS::setCoreQuality(unsigned char q) {
switch (q) {
case 0:
coreQuality=1024;
break;
case 1:
coreQuality=512;
break;
case 2:
coreQuality=256;
break;
case 3:
coreQuality=128;
break;
case 4:
coreQuality=32;
break;
case 5:
coreQuality=8;
break;
default:
coreQuality=128;
break;
}
}
int DivPlatformNDS::init(DivEngine* p, int channels, int sugRate, const DivConfig& flags) {
parent=p;
dumpWrites=false;

2
src/engine/platform/nds.h
View file

@ -54,6 +54,7 @@ class DivPlatformNDS: public DivDispatch, public nds_sound_intf {
unsigned char* sampleMem;
size_t sampleMemLen;
int coreQuality;
nds_sound_t nds;
DivMemoryComposition memCompo;
unsigned char regPool[288];
@ -91,6 +92,7 @@ class DivPlatformNDS: public DivDispatch, public nds_sound_intf {
virtual const DivMemoryComposition* getMemCompo(int index) override;
virtual void renderSamples(int chipID) override;
virtual void setFlags(const DivConfig& flags) override;
void setCoreQuality(unsigned char q);
virtual int init(DivEngine* parent, int channels, int sugRate, const DivConfig& flags) override;
virtual void quit() override;
DivPlatformNDS():

4
src/engine/platform/pce.cpp
View file

@ -94,8 +94,8 @@ void DivPlatformPCE::acquire(short** buf, size_t len) {
regPool[w.addr&0x0f]=w.val;
writes.pop();
}
memset(tempL,0,24*sizeof(int));
memset(tempR,0,24*sizeof(int));
tempL[0]=0;
tempR[0]=0;
pce->Update(coreQuality);
pce->ResetTS(0);

30
src/engine/platform/powernoise.cpp
View file

@ -83,7 +83,7 @@ void DivPlatformPowerNoise::acquire(short** buf, size_t len) {
short left, right;
for (size_t h=0; h<len; h++) {
pwrnoise_step(&pn,32,&left,&right);
pwrnoise_step(&pn,coreQuality,&left,&right);
oscBuf[0]->data[oscBuf[0]->needle++]=mapAmp((pn.n1.out_latch&0xf)+(pn.n1.out_latch>>4));
oscBuf[1]->data[oscBuf[1]->needle++]=mapAmp((pn.n2.out_latch&0xf)+(pn.n2.out_latch>>4));
@ -502,7 +502,7 @@ void DivPlatformPowerNoise::setFlags(const DivConfig& flags) {
chipClock=16000000;
CHECK_CUSTOM_CLOCK;
rate=chipClock/32;
rate=chipClock/coreQuality;
for (int i=0; i<4; i++) {
oscBuf[i]->rate=rate;
@ -517,6 +517,32 @@ void DivPlatformPowerNoise::poke(std::vector<DivRegWrite>& wlist) {
for (DivRegWrite& i: wlist) rWrite(i.addr,i.val);
}
void DivPlatformPowerNoise::setCoreQuality(unsigned char q) {
switch (q) {
case 0:
coreQuality=256;
break;
case 1:
coreQuality=128;
break;
case 2:
coreQuality=64;
break;
case 3:
coreQuality=32;
break;
case 4:
coreQuality=8;
break;
case 5:
coreQuality=1;
break;
default:
coreQuality=32;
break;
}
}
int DivPlatformPowerNoise::init(DivEngine* p, int channels, int sugRate, const DivConfig& flags) {
parent=p;
dumpWrites=false;

2
src/engine/platform/powernoise.h
View file

@ -73,6 +73,7 @@ class DivPlatformPowerNoise: public DivDispatch {
bool isMuted[4];
unsigned char regPool[32];
int coreQuality;
power_noise_t pn;
friend void putDispatchChip(void*,int);
@ -100,6 +101,7 @@ class DivPlatformPowerNoise: public DivDispatch {
void poke(unsigned int addr, unsigned short val);
void poke(std::vector<DivRegWrite>& wlist);
const char** getRegisterSheet();
void setCoreQuality(unsigned char q);
int init(DivEngine* parent, int channels, int sugRate, const DivConfig& flags);
void quit();
~DivPlatformPowerNoise();