mirror of
https://github.com/tildearrow/furnace.git
synced 2024-11-23 13:05:11 +00:00
OPM/OPZ: new hard reset strat
also fix weird envelope after hard reset
This commit is contained in:
parent
7fbc188532
commit
c0d1fe9c65
7 changed files with 116 additions and 51 deletions
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@ -319,27 +319,6 @@ void DivPlatformArcade::tick(bool sysTick) {
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rWrite(baseAddr+ADDR_DT2_D2R,(op.d2r&31)|(op.dt2<<6));
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}
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}
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if (chan[i].keyOn || chan[i].keyOff) {
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if (chan[i].hardReset && chan[i].keyOn) {
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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immWrite(baseAddr+ADDR_TL,0x7f);
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oldWrites[baseAddr+ADDR_SL_RR]=-1;
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oldWrites[baseAddr+ADDR_TL]=-1;
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}
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}
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immWrite(0x08,i);
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if (chan[i].hardReset && chan[i].keyOn) {
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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for (int k=0; k<9; k++) {
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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}
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}
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}
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chan[i].keyOff=false;
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}
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}
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for (int i=0; i<256; i++) {
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@ -349,6 +328,24 @@ void DivPlatformArcade::tick(bool sysTick) {
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}
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}
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int hardResetElapsed=0;
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bool mustHardReset=false;
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for (int i=0; i<8; i++) {
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if (chan[i].keyOn || chan[i].keyOff) {
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immWrite(0x08,i);
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if (chan[i].hardReset && chan[i].keyOn) {
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mustHardReset=true;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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hardResetElapsed++;
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}
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}
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chan[i].keyOff=false;
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}
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}
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for (int i=0; i<8; i++) {
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if (chan[i].freqChanged) {
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chan[i].freq=chan[i].baseFreq+(chan[i].pitch>>1)-64+chan[i].pitch2;
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@ -363,14 +360,37 @@ void DivPlatformArcade::tick(bool sysTick) {
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if (chan[i].freq>=(95<<6)) chan[i].freq=(95<<6)-1;
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immWrite(i+0x28,hScale(chan[i].freq>>6));
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immWrite(i+0x30,chan[i].freq<<2);
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hardResetElapsed+=2;
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chan[i].freqChanged=false;
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}
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if (chan[i].keyOn || chan[i].opMaskChanged) {
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if ((chan[i].keyOn || chan[i].opMaskChanged) && !chan[i].hardReset) {
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immWrite(0x08,(chan[i].opMask<<3)|i);
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hardResetElapsed++;
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chan[i].opMaskChanged=false;
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chan[i].keyOn=false;
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}
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}
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// hard reset handling
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if (mustHardReset) {
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for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
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immWrite(0x1f,i&0xff);
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}
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for (int i=0; i<8; i++) {
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if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {
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// restore SL/RR
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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immWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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immWrite(0x08,(chan[i].opMask<<3)|i);
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chan[i].opMaskChanged=false;
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chan[i].keyOn=false;
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}
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}
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}
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}
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void DivPlatformArcade::muteChannel(int ch, bool mute) {
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@ -483,7 +483,6 @@ void DivPlatformGenesis::tick(bool sysTick) {
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mustHardReset=true;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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oldWrites[baseAddr+ADDR_SL_RR]=-1;
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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hardResetElapsed++;
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}
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@ -552,6 +551,12 @@ void DivPlatformGenesis::tick(bool sysTick) {
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if (i==2 && extMode) continue;
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if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {
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if (i<6) {
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// restore SL/RR
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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immWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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immWrite(0x28,(chan[i].opMask<<4)|konOffs[i]);
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}
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chan[i].opMaskChanged=false;
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@ -266,28 +266,6 @@ void DivPlatformTX81Z::tick(bool sysTick) {
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rWrite(baseAddr+ADDR_DT2_D2R,(op.d2r&31)|(op.dt2<<6));
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}
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}
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if (chan[i].keyOn || chan[i].keyOff) {
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if (chan[i].hardReset && chan[i].keyOn) {
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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immWrite(baseAddr+ADDR_TL,0x7f);
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oldWrites[baseAddr+ADDR_SL_RR]=-1;
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oldWrites[baseAddr+ADDR_TL]=-1;
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}
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}
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//if (chan[i].keyOn) immWrite(0x08,i);
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immWrite(chanOffs[i]+ADDR_LR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3)|0x00|(chan[i].chVolR<<7));
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if (chan[i].hardReset && chan[i].keyOn) {
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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for (int k=0; k<9; k++) {
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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}
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}
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}
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chan[i].keyOff=false;
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}
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}
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for (int i=0; i<256; i++) {
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@ -309,6 +287,24 @@ void DivPlatformTX81Z::tick(bool sysTick) {
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}
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}
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int hardResetElapsed=0;
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bool mustHardReset=false;
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for (int i=0; i<8; i++) {
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if (chan[i].keyOn || chan[i].keyOff) {
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immWrite(chanOffs[i]+ADDR_LR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3)|0x00|(chan[i].chVolR<<7));
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if (chan[i].hardReset && chan[i].keyOn) {
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mustHardReset=true;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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hardResetElapsed++;
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}
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}
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chan[i].keyOff=false;
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}
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}
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for (int i=0; i<8; i++) {
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if (chan[i].freqChanged) {
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chan[i].freq=chan[i].baseFreq+(chan[i].pitch>>1)-64+chan[i].pitch2;
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@ -323,14 +319,34 @@ void DivPlatformTX81Z::tick(bool sysTick) {
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if (chan[i].freq>=(95<<6)) chan[i].freq=(95<<6)-1;
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immWrite(i+0x28,hScale(chan[i].freq>>6));
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immWrite(i+0x30,(chan[i].freq<<2)|(chan[i].chVolL==chan[i].chVolR));
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hardResetElapsed+=2;
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chan[i].freqChanged=false;
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}
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if (chan[i].keyOn) {
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//immWrite(0x08,i);
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if (chan[i].keyOn && !chan[i].hardReset) {
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immWrite(chanOffs[i]+ADDR_LR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3)|0x40|(chan[i].chVolR<<7));
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chan[i].keyOn=false;
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}
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}
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// hard reset handling
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if (mustHardReset) {
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for (unsigned int i=hardResetElapsed; i<hardResetCycles; i++) {
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immWrite(0x1f,i&0xff);
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}
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for (int i=0; i<8; i++) {
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if (chan[i].keyOn && chan[i].hardReset) {
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// restore SL/RR
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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immWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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immWrite(chanOffs[i]+ADDR_LR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3)|0x40|(chan[i].chVolR<<7));
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chan[i].keyOn=false;
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}
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}
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}
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}
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void DivPlatformTX81Z::muteChannel(int ch, bool mute) {
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@ -431,7 +431,6 @@ void DivPlatformYM2203::tick(bool sysTick) {
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mustHardReset=true;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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oldWrites[baseAddr+ADDR_SL_RR]=-1;
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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hardResetElapsed++;
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}
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@ -480,6 +479,13 @@ void DivPlatformYM2203::tick(bool sysTick) {
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for (int i=0; i<3; i++) {
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if (i==2 && extMode) continue;
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if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {
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// restore SL/RR
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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immWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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immWrite(0x28,(chan[i].opMask<<4)|konOffs[i]);
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chan[i].opMaskChanged=false;
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chan[i].keyOn=false;
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@ -626,7 +626,6 @@ void DivPlatformYM2608::tick(bool sysTick) {
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mustHardReset=true;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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oldWrites[baseAddr+ADDR_SL_RR]=-1;
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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hardResetElapsed++;
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}
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@ -807,6 +806,13 @@ void DivPlatformYM2608::tick(bool sysTick) {
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for (int i=0; i<6; i++) {
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if (i==2 && extMode) continue;
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if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {
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// restore SL/RR
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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immWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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immWrite(0x28,(chan[i].opMask<<4)|konOffs[i]);
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chan[i].opMaskChanged=false;
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chan[i].keyOn=false;
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@ -559,7 +559,6 @@ void DivPlatformYM2610::tick(bool sysTick) {
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mustHardReset=true;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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oldWrites[baseAddr+ADDR_SL_RR]=-1;
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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hardResetElapsed++;
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}
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@ -740,6 +739,13 @@ void DivPlatformYM2610::tick(bool sysTick) {
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for (int i=0; i<psgChanOffs; i++) {
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if (i==1 && extMode) continue;
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if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {
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// restore SL/RR
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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immWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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immWrite(0x28,(chan[i].opMask<<4)|konOffs[i]);
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chan[i].opMaskChanged=false;
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chan[i].keyOn=false;
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@ -626,7 +626,6 @@ void DivPlatformYM2610B::tick(bool sysTick) {
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mustHardReset=true;
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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oldWrites[baseAddr+ADDR_SL_RR]=-1;
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immWrite(baseAddr+ADDR_SL_RR,0x0f);
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hardResetElapsed++;
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}
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@ -807,6 +806,13 @@ void DivPlatformYM2610B::tick(bool sysTick) {
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for (int i=0; i<psgChanOffs; i++) {
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if (i==2 && extMode) continue;
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if ((chan[i].keyOn || chan[i].opMaskChanged) && chan[i].hardReset) {
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// restore SL/RR
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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immWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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immWrite(0x28,(chan[i].opMask<<4)|konOffs[i]);
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chan[i].opMaskChanged=false;
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chan[i].keyOn=false;
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