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OPL: it's coming together

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tildearrow 2022-03-07 22:52:32 -05:00
parent 36db137e8f
commit bd00165ded
2 changed files with 6 additions and 6 deletions
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2
src/engine/instrument.cpp
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@ -39,7 +39,7 @@ void DivInstrument::putInsData(SafeWriter* w) {
w->writeC(fm.fb);
w->writeC(fm.fms);
w->writeC(fm.ams);
w->writeC(4); // operator count; always 4
w->writeC(fm.ops);
w->writeC(fm.opllPreset);
w->writeC(0); // reserved
w->writeC(0);

10
src/engine/platform/opl.cpp
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@ -25,7 +25,7 @@
#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
#define CHIP_FREQBASE 4720272
#define CHIP_FREQBASE 9440540
// N = invalid
#define N 255
@ -193,7 +193,7 @@ void DivPlatformOPL::acquire_nuked(short* bufL, short* bufR, size_t start, size_
for (size_t h=start; h<start+len; h++) {
os[0]=0; os[1]=0;
if (!writes.empty() && --delay<0) {
delay=12;
delay=1;
QueuedWrite& w=writes.front();
OPL3_WriteReg(&fm,w.addr,w.val);
regPool[w.addr&511]=w.val;
@ -363,7 +363,7 @@ void DivPlatformOPL::tick() {
for (int i=0; i<20; i++) {
if (chan[i].freqChanged) {
chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,false,octave(chan[i].baseFreq));
if (chan[i].freq>262143) chan[i].freq=262143;
if (chan[i].freq>131071) chan[i].freq=131071;
int freqt=toFreq(chan[i].freq);
chan[i].freqH=freqt>>8;
chan[i].freqL=freqt&0xff;
@ -851,10 +851,10 @@ void DivPlatformOPL::setFlags(unsigned int flags) {
if (oplType==3) {
chipClock=COLOR_NTSC*4.0;
rate=chipClock/36;
rate=chipClock/288;
} else {
chipClock=COLOR_NTSC;
rate=chipClock/9;
rate=chipClock/72;
}
}