OPLL: 99.9%
all features usable, except for custom patchsets (not sure how am i gonna implement it)
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614c1a4da8
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b90fb02e63
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@ -290,6 +290,28 @@ static void OPLL_DoModeWrite(opll_t *chip) {
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}
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}
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}
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}
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const opll_patch_t* OPLL_GetPatchROM(uint32_t chip_type) {
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switch (chip_type) {
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case opll_type_ds1001:
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return patch_ds1001;
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break;
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case opll_type_ymf281:
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case opll_type_ymf281b:
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return patch_ymf281;
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break;
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case opll_type_ym2423:
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return patch_ym2423;
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break;
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case opll_type_ym2413:
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case opll_type_ym2413b:
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case opll_type_ym2420:
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default:
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return patch_ym2413;
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break;
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}
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return patch_ym2413;
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}
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void OPLL_Reset(opll_t *chip, uint32_t chip_type) {
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void OPLL_Reset(opll_t *chip, uint32_t chip_type) {
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uint32_t i;
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uint32_t i;
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memset(chip, 0, sizeof(opll_t));
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memset(chip, 0, sizeof(opll_t));
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@ -193,6 +193,8 @@ typedef struct {
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} opll_t;
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} opll_t;
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const opll_patch_t* OPLL_GetPatchROM(uint32_t chip_type);
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void OPLL_Reset(opll_t *chip, uint32_t chip_type);
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void OPLL_Reset(opll_t *chip, uint32_t chip_type);
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void OPLL_Clock(opll_t *chip, int32_t *buffer);
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void OPLL_Clock(opll_t *chip, int32_t *buffer);
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void OPLL_Write(opll_t *chip, uint32_t port, uint8_t data);
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void OPLL_Write(opll_t *chip, uint32_t port, uint8_t data);
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@ -25,7 +25,7 @@
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#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
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#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
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#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
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#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
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#define CHIP_FREQBASE 295017
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#define CHIP_FREQBASE 1180068
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const char* DivPlatformOPLL::getEffectName(unsigned char effect) {
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const char* DivPlatformOPLL::getEffectName(unsigned char effect) {
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switch (effect) {
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switch (effect) {
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@ -693,6 +693,20 @@ void DivPlatformOPLL::reset() {
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OPLL_Reset(&fm,opll_type_ds1001);
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OPLL_Reset(&fm,opll_type_ds1001);
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} else {
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} else {
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OPLL_Reset(&fm,opll_type_ym2413);
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OPLL_Reset(&fm,opll_type_ym2413);
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switch (patchSet) {
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case 0:
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fm.patchrom=OPLL_GetPatchROM(opll_type_ym2413);
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break;
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case 1:
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fm.patchrom=OPLL_GetPatchROM(opll_type_ymf281);
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break;
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case 2:
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fm.patchrom=OPLL_GetPatchROM(opll_type_ym2423);
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break;
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case 3:
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fm.patchrom=OPLL_GetPatchROM(opll_type_ds1001);
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break;
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}
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}
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}
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if (dumpWrites) {
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if (dumpWrites) {
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addWrite(0xffffffff,0);
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addWrite(0xffffffff,0);
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@ -763,22 +777,24 @@ void DivPlatformOPLL::setYMFM(bool use) {
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}
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}
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void DivPlatformOPLL::setFlags(unsigned int flags) {
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void DivPlatformOPLL::setFlags(unsigned int flags) {
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if (flags==3) {
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if ((flags&15)==3) {
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chipClock=COLOR_NTSC;
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chipClock=COLOR_NTSC/2.0;
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} else if (flags==2) {
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} else if ((flags&15)==2) {
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chipClock=8000000.0;
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chipClock=4000000.0;
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} else if (flags==1) {
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} else if ((flags&15)==1) {
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chipClock=COLOR_PAL*1.0/5.0;
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chipClock=COLOR_PAL*4.0/5.0;
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} else {
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} else {
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chipClock=COLOR_NTSC/4.0;
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chipClock=COLOR_NTSC;
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}
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}
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rate=chipClock/9;
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rate=chipClock/36;
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patchSet=flags>>4;
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}
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}
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int DivPlatformOPLL::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
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int DivPlatformOPLL::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
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parent=p;
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parent=p;
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dumpWrites=false;
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dumpWrites=false;
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skipRegisterWrites=false;
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skipRegisterWrites=false;
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patchSet=0;
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for (int i=0; i<11; i++) {
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for (int i=0; i<11; i++) {
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isMuted[i]=false;
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isMuted[i]=false;
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}
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}
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@ -79,6 +79,8 @@ class DivPlatformOPLL: public DivDispatch {
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bool properDrums, properDrumsSys;
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bool properDrums, properDrumsSys;
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bool vrc7;
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bool vrc7;
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unsigned char patchSet;
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short oldWrites[256];
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short oldWrites[256];
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short pendingWrites[256];
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short pendingWrites[256];
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@ -220,6 +220,18 @@ struct DivSong {
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// - bit 0-11: echo delay length
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// - bit 0-11: echo delay length
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// - Valid values are 0-2725
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// - Valid values are 0-2725
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// - 0 is max length, 2725 is min length
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// - 0 is max length, 2725 is min length
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// - OPLL:
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// - bit 0-3: clock rate
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// - 0: NTSC (3.58MHz)
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// - 1: PAL (3.55MHz)
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// - 2: Other (4MHz)
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// - 3: half NTSC (1.79MHz)
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// - bit 4-7: patch set
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// - 0: YM2413
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// - 1: YMF281
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// - 2: YM2423
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// - 3: VRC7
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// - 4: custom (TODO)
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unsigned int systemFlags[32];
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unsigned int systemFlags[32];
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// song information
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// song information
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@ -4635,6 +4635,47 @@ bool FurnaceGUI::loop() {
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}
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}
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break;
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break;
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}
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}
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case DIV_SYSTEM_OPLL:
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case DIV_SYSTEM_OPLL_DRUMS:
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case DIV_SYSTEM_VRC7: {
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ImGui::Text("Clock rate:");
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if (ImGui::RadioButton("NTSC (3.58MHz)",(flags&15)==0)) {
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e->setSysFlags(i,(flags&(~15))|0,restart);
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updateWindowTitle();
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}
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if (ImGui::RadioButton("PAL (3.55MHz)",(flags&15)==1)) {
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e->setSysFlags(i,(flags&(~15))|1,restart);
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updateWindowTitle();
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}
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if (ImGui::RadioButton("BBC Micro (4MHz)",(flags&15)==2)) {
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e->setSysFlags(i,(flags&(~15))|2,restart);
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updateWindowTitle();
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}
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if (ImGui::RadioButton("Half NTSC (1.79MHz)",(flags&15)==3)) {
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e->setSysFlags(i,(flags&(~15))|3,restart);
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updateWindowTitle();
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}
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if (e->song.system[i]!=DIV_SYSTEM_VRC7) {
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ImGui::Text("Patch set:");
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if (ImGui::RadioButton("Yamaha YM2413",((flags>>4)&15)==0)) {
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e->setSysFlags(i,(flags&(~0xf0))|0,restart);
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updateWindowTitle();
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}
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if (ImGui::RadioButton("Yamaha YMF281",((flags>>4)&15)==1)) {
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e->setSysFlags(i,(flags&(~0xf0))|0x10,restart);
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updateWindowTitle();
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}
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if (ImGui::RadioButton("Yamaha YM2423",((flags>>4)&15)==2)) {
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e->setSysFlags(i,(flags&(~0xf0))|0x20,restart);
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updateWindowTitle();
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}
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if (ImGui::RadioButton("Konami VRC7",((flags>>4)&15)==3)) {
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e->setSysFlags(i,(flags&(~0xf0))|0x30,restart);
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updateWindowTitle();
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}
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}
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break;
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}
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case DIV_SYSTEM_YM2151:
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case DIV_SYSTEM_YM2151:
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if (ImGui::RadioButton("NTSC (3.58MHz)",flags==0)) {
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if (ImGui::RadioButton("NTSC (3.58MHz)",flags==0)) {
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e->setSysFlags(i,0,restart);
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e->setSysFlags(i,0,restart);
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