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OPN: VGM soft reset and ExtCh export

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tildearrow 2022-05-19 17:46:41 -05:00
parent c2764591e0
commit b01ebb3487
1 changed files with 41 additions and 0 deletions
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41
src/engine/vgmOps.cpp
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@ -240,6 +240,45 @@ void DivEngine::performVGMWrite(SafeWriter* w, DivSystem sys, DivRegWrite& write
w->writeC(0); w->writeC(0);
} }
break; break;
case DIV_SYSTEM_OPN:
case DIV_SYSTEM_OPN_EXT:
for (int i=0; i<3; i++) { // set SL and RR to highest
w->writeC(5|baseAddr1);
w->writeC(0x80+i);
w->writeC(0xff);
w->writeC(5|baseAddr1);
w->writeC(0x84+i);
w->writeC(0xff);
w->writeC(5|baseAddr1);
w->writeC(0x88+i);
w->writeC(0xff);
w->writeC(5|baseAddr1);
w->writeC(0x8c+i);
w->writeC(0xff);
}
for (int i=0; i<3; i++) { // note off
w->writeC(5|baseAddr1);
w->writeC(0x28);
w->writeC(i);
}
// SSG
w->writeC(5|baseAddr1);
w->writeC(7);
w->writeC(0x3f);
w->writeC(5|baseAddr1);
w->writeC(8);
w->writeC(0);
w->writeC(5|baseAddr1);
w->writeC(9);
w->writeC(0);
w->writeC(5|baseAddr1);
w->writeC(10);
w->writeC(0);
break;
case DIV_SYSTEM_AY8910: case DIV_SYSTEM_AY8910:
w->writeC(0xa0); w->writeC(0xa0);
w->writeC(7|baseAddr2); w->writeC(7|baseAddr2);
@ -538,6 +577,7 @@ void DivEngine::performVGMWrite(SafeWriter* w, DivSystem sys, DivRegWrite& write
} }
break; break;
case DIV_SYSTEM_OPN: case DIV_SYSTEM_OPN:
case DIV_SYSTEM_OPN_EXT:
w->writeC(5|baseAddr1); w->writeC(5|baseAddr1);
w->writeC(write.addr&0xff); w->writeC(write.addr&0xff);
w->writeC(write.val); w->writeC(write.val);
@ -993,6 +1033,7 @@ SafeWriter* DivEngine::saveVGM(bool* sysToExport, bool loop, int version) {
} }
break; break;
case DIV_SYSTEM_OPN: case DIV_SYSTEM_OPN:
case DIV_SYSTEM_OPN_EXT:
if (!hasOPN) { if (!hasOPN) {
hasOPN=disCont[i].dispatch->chipClock; hasOPN=disCont[i].dispatch->chipClock;
willExport[i]=true; willExport[i]=true;