C219: chip config and proper clock rate
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@ -639,10 +639,26 @@ void DivPlatformC140::set219(bool is_219) {
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totalChans=is219?16:24;
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}
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int DivPlatformC140::getClockRangeMin() {
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if (is219) return 1000000;
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return MIN_CUSTOM_CLOCK;
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}
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int DivPlatformC140::getClockRangeMax() {
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if (is219) return 100000000;
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return MAX_CUSTOM_CLOCK;
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}
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void DivPlatformC140::setFlags(const DivConfig& flags) {
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chipClock=32000*256; // 8.192MHz and 12.288MHz input, verified from Assault Schematics
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CHECK_CUSTOM_CLOCK;
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rate=chipClock/192;
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if (is219) {
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chipClock=50113000; // 50.113MHz clock input in Namco NA-1/NA-2 PCB
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CHECK_CUSTOM_CLOCK;
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rate=chipClock/1136; // assumed as ~44100hz
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} else {
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chipClock=32000*256; // 8.192MHz and 12.288MHz input, verified from Assault Schematics
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CHECK_CUSTOM_CLOCK;
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rate=chipClock/192;
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}
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for (int i=0; i<totalChans; i++) {
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oscBuf[i]->rate=rate;
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}
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@ -106,6 +106,8 @@ class DivPlatformC140: public DivDispatch {
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size_t getSampleMemUsage(int index = 0);
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bool isSampleLoaded(int index, int sample);
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void renderSamples(int chipID);
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int getClockRangeMin();
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int getClockRangeMax();
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void set219(bool is_219);
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void setFlags(const DivConfig& flags);
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int init(DivEngine* parent, int channels, int sugRate, const DivConfig& flags);
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@ -2099,6 +2099,7 @@ bool FurnaceGUI::drawSysConf(int chan, DivSystem type, DivConfig& flags, bool mo
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case DIV_SYSTEM_PV1000:
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case DIV_SYSTEM_VERA:
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case DIV_SYSTEM_C140:
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case DIV_SYSTEM_C219:
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break;
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case DIV_SYSTEM_YMU759:
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supportsCustomRate=false;
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