mirror of
https://github.com/tildearrow/furnace.git
synced 2024-11-27 15:03:01 +00:00
Fix compile (again)
This commit is contained in:
parent
5473b8722d
commit
8bc545c8ab
3 changed files with 30 additions and 15 deletions
|
@ -22,6 +22,21 @@
|
||||||
|
|
||||||
#include "fmsharedbase.h"
|
#include "fmsharedbase.h"
|
||||||
|
|
||||||
|
#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
|
||||||
|
#define immWrite(a,v) if (!skipRegisterWrites) {writes.push_back(QueuedWrite(a,v)); if (dumpWrites) {addWrite(a,v);} }
|
||||||
|
#define urgentWrite(a,v) if (!skipRegisterWrites) { \
|
||||||
|
if (writes.empty()) { \
|
||||||
|
writes.push_back(QueuedWrite(a,v)); \
|
||||||
|
} else if (writes.size()>16 || writes.front().addrOrVal) { \
|
||||||
|
writes.push_back(QueuedWrite(a,v)); \
|
||||||
|
} else { \
|
||||||
|
writes.push_front(QueuedWrite(a,v)); \
|
||||||
|
} \
|
||||||
|
if (dumpWrites) { \
|
||||||
|
addWrite(a,v); \
|
||||||
|
} \
|
||||||
|
}
|
||||||
|
|
||||||
#define NOTE_LINEAR(x) (((x)<<6)+baseFreqOff+log2(parent->song.tuning/440.0)*12.0*64.0)
|
#define NOTE_LINEAR(x) (((x)<<6)+baseFreqOff+log2(parent->song.tuning/440.0)*12.0*64.0)
|
||||||
|
|
||||||
class DivPlatformOPMBase: public DivPlatformFMBase {
|
class DivPlatformOPMBase: public DivPlatformFMBase {
|
||||||
|
|
|
@ -22,6 +22,21 @@
|
||||||
|
|
||||||
#include "fmsharedbase.h"
|
#include "fmsharedbase.h"
|
||||||
|
|
||||||
|
#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
|
||||||
|
#define immWrite(a,v) if (!skipRegisterWrites) {writes.push_back(QueuedWrite(a,v)); if (dumpWrites) {addWrite(a,v);} }
|
||||||
|
#define urgentWrite(a,v) if (!skipRegisterWrites) { \
|
||||||
|
if (writes.empty()) { \
|
||||||
|
writes.push_back(QueuedWrite(a,v)); \
|
||||||
|
} else if (writes.size()>16 || writes.front().addrOrVal) { \
|
||||||
|
writes.push_back(QueuedWrite(a,v)); \
|
||||||
|
} else { \
|
||||||
|
writes.push_front(QueuedWrite(a,v)); \
|
||||||
|
} \
|
||||||
|
if (dumpWrites) { \
|
||||||
|
addWrite(a,v); \
|
||||||
|
} \
|
||||||
|
}
|
||||||
|
|
||||||
#define CHIP_FREQBASE fmFreqBase
|
#define CHIP_FREQBASE fmFreqBase
|
||||||
#define CHIP_DIVIDER fmDivBase
|
#define CHIP_DIVIDER fmDivBase
|
||||||
|
|
||||||
|
|
|
@ -65,19 +65,4 @@ class DivPlatformFMBase: public DivDispatch {
|
||||||
delay(0) {}
|
delay(0) {}
|
||||||
};
|
};
|
||||||
|
|
||||||
#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
|
|
||||||
#define immWrite(a,v) if (!skipRegisterWrites) {writes.push_back(QueuedWrite(a,v)); if (dumpWrites) {addWrite(a,v);} }
|
|
||||||
#define urgentWrite(a,v) if (!skipRegisterWrites) { \
|
|
||||||
if (writes.empty()) { \
|
|
||||||
writes.push_back(QueuedWrite(a,v)); \
|
|
||||||
} else if (writes.size()>16 || writes.front().addrOrVal) { \
|
|
||||||
writes.push_back(QueuedWrite(a,v)); \
|
|
||||||
} else { \
|
|
||||||
writes.push_front(QueuedWrite(a,v)); \
|
|
||||||
} \
|
|
||||||
if (dumpWrites) { \
|
|
||||||
addWrite(a,v); \
|
|
||||||
} \
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in a new issue