parent
e133fb4906
commit
8843315256
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@ -1601,6 +1601,9 @@ bool DivEngine::isVGMExportable(DivSystem which) {
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case DIV_SYSTEM_QSOUND:
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case DIV_SYSTEM_QSOUND:
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case DIV_SYSTEM_SEGAPCM:
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case DIV_SYSTEM_SEGAPCM:
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case DIV_SYSTEM_SEGAPCM_COMPAT:
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case DIV_SYSTEM_SEGAPCM_COMPAT:
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case DIV_SYSTEM_OPLL:
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case DIV_SYSTEM_OPLL_DRUMS:
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case DIV_SYSTEM_VRC7:
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return true;
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return true;
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default:
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default:
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return false;
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return false;
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@ -214,6 +214,21 @@ void DivEngine::performVGMWrite(SafeWriter* w, DivSystem sys, DivRegWrite& write
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w->writeC(0);
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w->writeC(0);
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w->writeC(0xbf);
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w->writeC(0xbf);
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break;
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break;
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case DIV_SYSTEM_OPLL:
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case DIV_SYSTEM_OPLL_DRUMS:
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case DIV_SYSTEM_VRC7:
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for (int i=0; i<9; i++) {
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w->writeC(isSecond?0xa1:0x51);
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w->writeC(0x20+i);
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w->writeC(0);
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w->writeC(isSecond?0xa1:0x51);
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w->writeC(0x30+i);
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w->writeC(0);
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w->writeC(isSecond?0xa1:0x51);
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w->writeC(0x10+i);
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w->writeC(0);
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}
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break;
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case DIV_SYSTEM_AY8910:
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case DIV_SYSTEM_AY8910:
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w->writeC(0xa0);
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w->writeC(0xa0);
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w->writeC(isSecond?0x87:7);
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w->writeC(isSecond?0x87:7);
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@ -395,6 +410,13 @@ void DivEngine::performVGMWrite(SafeWriter* w, DivSystem sys, DivRegWrite& write
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break;
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break;
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}
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}
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break;
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break;
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case DIV_SYSTEM_OPLL:
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case DIV_SYSTEM_OPLL_DRUMS:
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case DIV_SYSTEM_VRC7:
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w->writeC(isSecond?0xa1:0x51);
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w->writeC(write.addr&0xff);
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w->writeC(write.val);
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break;
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case DIV_SYSTEM_AY8910:
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case DIV_SYSTEM_AY8910:
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case DIV_SYSTEM_AY8930:
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case DIV_SYSTEM_AY8930:
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w->writeC(0xa0);
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w->writeC(0xa0);
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@ -682,6 +704,19 @@ SafeWriter* DivEngine::saveVGM(bool* sysToExport, bool loop) {
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howManyChips++;
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howManyChips++;
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}
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}
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break;
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break;
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case DIV_SYSTEM_OPLL:
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case DIV_SYSTEM_OPLL_DRUMS:
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case DIV_SYSTEM_VRC7:
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if (!hasOPLL) {
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hasOPLL=disCont[i].dispatch->chipClock;
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willExport[i]=true;
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} else if (!(hasOPLL&0x40000000)) {
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isSecond[i]=true;
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willExport[i]=true;
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hasOPLL|=0x40000000;
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howManyChips++;
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}
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break;
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case DIV_SYSTEM_LYNX:
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case DIV_SYSTEM_LYNX:
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if (!hasLynx) {
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if (!hasLynx) {
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hasLynx=disCont[i].dispatch->chipClock;
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hasLynx=disCont[i].dispatch->chipClock;
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