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newVolumeScaling, part 1
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parent
8bfcf00203
commit
8141574d3c
1 changed files with 8 additions and 8 deletions
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@ -284,12 +284,12 @@ void DivPlatformArcade::tick(bool sysTick) {
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chan[i].std.next();
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if (chan[i].std.vol.had) {
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chan[i].outVol=(chan[i].vol*MIN(127,chan[i].std.vol.val))/127;
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chan[i].outVol=VOL_SCALE_LOG(chan[i].vol,MIN(127,chan[i].std.vol.val),127);
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for (int j=0; j<4; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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@ -378,7 +378,7 @@ void DivPlatformArcade::tick(bool sysTick) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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@ -432,7 +432,7 @@ void DivPlatformArcade::tick(bool sysTick) {
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if (m.tl.had) {
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op.tl=127-m.tl.val;
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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@ -528,7 +528,7 @@ int DivPlatformArcade::dispatch(DivCommand c) {
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DivInstrumentFM::Operator op=chan[c.chan].state.op[i];
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if (isOutput[chan[c.chan].state.alg][i]) {
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if (!chan[c.chan].active || chan[c.chan].insChanged) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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}
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} else {
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if (chan[c.chan].insChanged) {
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@ -585,7 +585,7 @@ int DivPlatformArcade::dispatch(DivCommand c) {
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unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
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if (isOutput[chan[c.chan].state.alg][i]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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@ -676,7 +676,7 @@ int DivPlatformArcade::dispatch(DivCommand c) {
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
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op.tl=c.value2;
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if (isOutput[chan[c.chan].state.alg][c.value]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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@ -876,7 +876,7 @@ void DivPlatformArcade::forceIns() {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator op=chan[i].state.op[j];
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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