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VERA: add r47 revision with 9-bit volume table
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commit
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5 changed files with 56 additions and 10 deletions
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@ -2083,6 +2083,15 @@ bool DivEngine::loadFur(unsigned char* file, size_t len, int variantID) {
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}
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}
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// VERA old chip revision
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if (ds.version<213) {
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for (int i=0; i<ds.systemLen; i++) {
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if (ds.system[i]==DIV_SYSTEM_VERA) {
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ds.systemFlags[i].set("chipType",0);
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}
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}
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}
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if (active) quitDispatch();
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BUSY_BEGIN_SOFT;
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saveLock.lock();
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@ -2,6 +2,10 @@
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// Copyright (c) 2020 Frank van den Hoef
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// All rights reserved. License: 2-clause BSD
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// Chip revisions
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// 0: V 0.3.0
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// 1: V 47.0.0 (9-bit volume, phase reset on mute)
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#include "vera_psg.h"
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#include <stdlib.h>
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@ -14,7 +18,15 @@ enum waveform {
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WF_NOISE,
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};
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static uint8_t volume_lut[64] = {0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 13, 14, 14, 15, 16, 17, 18, 19, 21, 22, 23, 25, 26, 28, 29, 31, 33, 35, 37, 39, 42, 44, 47, 50, 52, 56, 59, 63};
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static uint16_t volume_lut[64] = {0, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 6, 6, 7, 7, 7, 8, 8, 9, 9, 10, 11, 11, 12, 13, 14, 14, 15, 16, 17, 18, 19, 21, 22, 23, 25, 26, 28, 29, 31, 33, 35, 37, 39, 42, 44, 47, 50, 52, 56, 59, 63};
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static uint16_t volume_lut_47[64] = {
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0, 4, 8, 12,
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16, 17, 18, 20, 21, 22, 23, 25, 26, 28, 30, 31,
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33, 35, 37, 40, 42, 45, 47, 50, 53, 56, 60, 63,
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67, 71, 75, 80, 85, 90, 95, 101, 107, 113, 120, 127,
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135, 143, 151, 160, 170, 180, 191, 202, 214, 227, 241, 255,
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270, 286, 303, 321, 341, 361, 382, 405, 429, 455, 482, 511
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};
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void
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psg_reset(struct VERA_PSG* psg)
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@ -38,7 +50,7 @@ psg_writereg(struct VERA_PSG* psg, uint8_t reg, uint8_t val)
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case 2: {
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psg->channels[ch].right = (val & 0x80) != 0;
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psg->channels[ch].left = (val & 0x40) != 0;
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psg->channels[ch].volume = volume_lut[val & 0x3F];
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psg->channels[ch].volume = ((psg->chipType < 1) ? volume_lut : volume_lut_47)[val & 0x3F];
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break;
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}
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case 3: {
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@ -65,8 +77,11 @@ render(struct VERA_PSG* psg, int16_t *left, int16_t *right)
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struct VERAChannel *ch = &psg->channels[i];
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unsigned new_phase = (ch->phase + ch->freq) & 0x1FFFF;
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if ((psg->chipType >= 1) && (!ch->left && !ch->right)) {
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new_phase = 0;
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}
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if ((ch->phase & 0x10000) != (new_phase & 0x10000)) {
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ch->noiseval = psg->noiseOut;
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ch->noiseval = (psg->chipType < 1) ? psg->noiseOut : (psg->noiseState >> 1) & 0x3f;
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}
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ch->phase = new_phase;
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@ -85,14 +100,14 @@ render(struct VERA_PSG* psg, int16_t *left, int16_t *right)
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int val = (int)sv * (int)ch->volume;
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if (ch->left) {
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l += val;
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l += (psg->chipType < 1) ? val : val >> 3;
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}
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if (ch->right) {
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r += val;
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r += (psg->chipType < 1) ? val : val >> 3;
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}
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if (ch->left || ch->right) {
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ch->lastOut = val;
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ch->lastOut = (psg->chipType < 1) ? val << 3 : val;
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} else {
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ch->lastOut = 0;
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}
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@ -9,7 +9,7 @@
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struct VERAChannel {
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uint16_t freq;
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uint8_t volume;
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uint16_t volume;
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bool left, right;
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uint8_t pw;
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uint8_t waveform;
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@ -20,7 +20,7 @@ struct VERAChannel {
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};
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struct VERA_PSG {
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unsigned int noiseState, noiseOut;
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unsigned int chipType, noiseState, noiseOut;
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struct VERAChannel channels[16];
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};
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@ -119,7 +119,7 @@ void DivPlatformVERA::acquire(short** buf, size_t len) {
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pos++;
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for (int i=0; i<16; i++) {
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oscBuf[i]->data[oscBuf[i]->needle++]=psg->channels[i].lastOut<<3;
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oscBuf[i]->data[oscBuf[i]->needle++]=psg->channels[i].lastOut;
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}
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int pcmOut=(whyCallItBuf[2][i]+whyCallItBuf[3][i])>>1;
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if (pcmOut<-32768) pcmOut=-32768;
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@ -532,6 +532,7 @@ void DivPlatformVERA::poke(std::vector<DivRegWrite>& wlist) {
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}
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void DivPlatformVERA::setFlags(const DivConfig& flags) {
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psg->chipType=flags.getInt("chipType",1);
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chipClock=25000000;
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CHECK_CUSTOM_CLOCK;
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rate=chipClock/512;
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@ -2428,12 +2428,33 @@ bool FurnaceGUI::drawSysConf(int chan, int sysPos, DivSystem type, DivConfig& fl
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}
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break;
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}
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case DIV_SYSTEM_VERA: {
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int chipType=flags.getInt("chipType",1);
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ImGui::Text(_("Chip revision:"));
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ImGui::Indent();
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if (ImGui::RadioButton(_("V 0.3.1"),chipType==0)) {
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chipType=0;
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altered=true;
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}
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if (ImGui::RadioButton(_("V 47.0.0 (9-bit volume)"),chipType==1)) {
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chipType=1;
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altered=true;
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}
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ImGui::Unindent();
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if (altered) {
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e->lockSave([&]() {
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flags.set("chipType",chipType);
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});
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}
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break;
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}
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case DIV_SYSTEM_SWAN:
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case DIV_SYSTEM_BUBSYS_WSG:
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case DIV_SYSTEM_PET:
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case DIV_SYSTEM_GA20:
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case DIV_SYSTEM_PV1000:
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case DIV_SYSTEM_VERA:
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case DIV_SYSTEM_C219:
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case DIV_SYSTEM_BIFURCATOR:
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case DIV_SYSTEM_POWERNOISE:
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