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update ymfm
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b162c09f7c
commit
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5 changed files with 22 additions and 11 deletions
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@ -426,7 +426,7 @@ protected:
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void assign_operators();
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// update the state of the given timer
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void update_timer(uint32_t which, uint32_t enable);
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void update_timer(uint32_t which, uint32_t enable, int32_t delta_clocks);
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// internal state
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ymfm_interface &m_intf; // reference to the system interface
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@ -436,6 +436,7 @@ protected:
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uint8_t m_irq_mask; // mask of which bits signal IRQs
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uint8_t m_irq_state; // current IRQ state
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uint8_t m_timer_running[2]; // current timer running state
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uint8_t m_total_clocks; // low 8 bits of the total number of clocks processed
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uint32_t m_active_channels; // mask of active channels (computed by prepare)
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uint32_t m_modified_channels; // mask of channels that have been modified
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uint32_t m_prepare_count; // counter to do periodic prepare sweeps
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@ -1236,6 +1236,7 @@ void fm_engine_base<RegisterType>::save_restore(ymfm_saved_state &state)
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state.save_restore(m_irq_state);
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state.save_restore(m_timer_running[0]);
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state.save_restore(m_timer_running[1]);
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state.save_restore(m_total_clocks);
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// save the register/family data
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m_regs.save_restore(state);
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@ -1261,6 +1262,9 @@ void fm_engine_base<RegisterType>::save_restore(ymfm_saved_state &state)
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template<class RegisterType>
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uint32_t fm_engine_base<RegisterType>::clock(uint32_t chanmask)
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{
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// update the clock counter
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m_total_clocks++;
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// if something was modified, prepare
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// also prepare every 4k samples to catch ending notes
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if (m_modified_channels != 0 || m_prepare_count++ >= 4096)
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@ -1455,7 +1459,7 @@ void fm_engine_base<RegisterType>::assign_operators()
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//-------------------------------------------------
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template<class RegisterType>
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void fm_engine_base<RegisterType>::update_timer(uint32_t tnum, uint32_t enable)
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void fm_engine_base<RegisterType>::update_timer(uint32_t tnum, uint32_t enable, int32_t delta_clocks)
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{
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// if the timer is live, but not currently enabled, set the timer
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if (enable && !m_timer_running[tnum])
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@ -1463,6 +1467,9 @@ void fm_engine_base<RegisterType>::update_timer(uint32_t tnum, uint32_t enable)
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// period comes from the registers, and is different for each
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uint32_t period = (tnum == 0) ? (1024 - m_regs.timer_a_value()) : 16 * (256 - m_regs.timer_b_value());
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// caller can also specify a delta to account for other effects
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period += delta_clocks;
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// reset it
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m_intf.ymfm_set_timer(tnum, period * OPERATORS * m_clock_prescale);
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m_timer_running[tnum] = 1;
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@ -1499,7 +1506,7 @@ void fm_engine_base<RegisterType>::engine_timer_expired(uint32_t tnum)
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// reset
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m_timer_running[tnum] = false;
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update_timer(tnum, 1);
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update_timer(tnum, 1, 0);
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}
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@ -1557,9 +1564,11 @@ void fm_engine_base<RegisterType>::engine_mode_write(uint8_t data)
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reset_mask |= RegisterType::STATUS_TIMERA;
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set_reset_status(0, reset_mask);
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// load timers
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update_timer(1, m_regs.load_timer_b());
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update_timer(0, m_regs.load_timer_a());
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// load timers; note that timer B gets a small negative adjustment because
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// the *16 multiplier is free-running, so the first tick of the clock
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// is a bit shorter
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update_timer(1, m_regs.load_timer_b(), -(m_total_clocks & 15));
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update_timer(0, m_regs.load_timer_a(), 0);
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}
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}
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@ -74,6 +74,7 @@ opm_registers::opm_registers() :
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m_lfo_waveform[2][index] = am | (pm << 8);
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// waveform 3 is noise; it is filled in dynamically
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m_lfo_waveform[3][index] = 0;
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}
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}
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@ -2398,8 +2398,8 @@ void ym2612::generate(output_data *output, uint32_t numsamples)
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// a better sound mixer than we usually have, so just average over the six
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// channels; also apply a 64/65 factor to account for the discontinuity
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// adjustment above
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output->data[0] = (output->data[0] << 7) * 64 / (6 * 65);
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output->data[1] = (output->data[1] << 7) * 64 / (6 * 65);
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output->data[0] = (output->data[0] * 128) * 64 / (6 * 65);
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output->data[1] = (output->data[1] * 128) * 64 / (6 * 65);
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}
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}
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@ -2432,8 +2432,8 @@ void ym3438::generate(output_data *output, uint32_t numsamples)
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// YM3438 doesn't have the same DAC discontinuity, though its output is
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// multiplexed like the YM2612
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output->data[0] = (output->data[0] << 7) / 6;
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output->data[1] = (output->data[1] << 7) / 6;
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output->data[0] = (output->data[0] * 128) / 6;
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output->data[1] = (output->data[1] * 128) / 6;
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}
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}
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@ -763,7 +763,7 @@ public:
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protected:
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// simulate the DAC discontinuity
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int32_t dac_discontinuity(int32_t value) const { return (value < 0) ? (value - 2) : (value + 3); }
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constexpr int32_t dac_discontinuity(int32_t value) const { return (value < 0) ? (value - 2) : (value + 3); }
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// internal state
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uint16_t m_address; // address register
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