Channel enable bit is inverted
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c430d24d2f
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@ -36,7 +36,7 @@
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-xxx ---- Pulse 1 Duty cycle
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---- xxxx Pulse 1 Volume
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9001 xxxx xxxx Pulse 1 Pitch bit 0-7
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9002 x--- ---- Pulse 1 Disable
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9002 x--- ---- Pulse 1 Enable
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---- xxxx Pulse 1 Pitch bit 8-11
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9003 Sound control
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@ -51,14 +51,14 @@
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-xxx ---- Pulse 2 Duty cycle
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---- xxxx Pulse 2 Volume
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a001 xxxx xxxx Pulse 2 Pitch bit 0-7
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a002 x--- ---- Pulse 2 Disable
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a002 x--- ---- Pulse 2 Enable
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---- xxxx Pulse 2 Pitch bit 8-11
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b000-b002 Sawtooth
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b000 --xx xxxx Sawtooth Accumulate Rate
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b001 xxxx xxxx Sawtooth Pitch bit 0-7
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b002 x--- ---- Sawtooth Disable
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b002 x--- ---- Sawtooth Enable
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---- xxxx Sawtooth Pitch bit 8-11
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f000-f002 IRQ Timer
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@ -113,7 +113,7 @@ void vrcvi_core::reset()
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bool vrcvi_core::alu_t::tick()
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{
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if (!m_divider.m_disable)
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if (m_divider.m_enable)
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{
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const u16 temp = m_counter;
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// post decrement
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@ -144,7 +144,7 @@ bool vrcvi_core::alu_t::tick()
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bool vrcvi_core::pulse_t::tick()
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{
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if (m_divider.m_disable)
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if (!m_divider.m_enable)
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return false;
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if (vrcvi_core::alu_t::tick())
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@ -155,7 +155,7 @@ bool vrcvi_core::pulse_t::tick()
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bool vrcvi_core::sawtooth_t::tick()
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{
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if (m_divider.m_disable)
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if (!m_divider.m_enable)
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return false;
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if (vrcvi_core::alu_t::tick())
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@ -232,7 +232,7 @@ void vrcvi_core::alu_t::divider_t::write(bool msb, u8 data)
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if (msb)
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{
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m_divider = (m_divider & ~0xf00) | (bitfield<u32>(data, 0, 4) << 8);
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m_disable = bitfield(data, 7);
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m_enable = bitfield(data, 7);
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}
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else
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m_divider = (m_divider & ~0x0ff) | data;
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@ -78,19 +78,19 @@ private:
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{
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divider_t()
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: m_divider(0)
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, m_disable(0)
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, m_enable(0)
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{ };
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void reset()
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{
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m_divider = 0;
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m_disable = 0;
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m_enable = 0;
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}
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void write(bool msb, u8 data);
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u16 m_divider : 12; // divider (pitch)
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u16 m_disable : 1; // channel disable flag
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u16 m_enable : 1; // channel enable flag
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};
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vrcvi_core &m_host;
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@ -204,10 +204,10 @@ void DivPlatformVRC6::tick() {
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//rWrite(16+i*5+2,((chan[i].vol<<4))|(ins->gb.envLen&7)|((ins->gb.envDir&1)<<3));
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}
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if (chan[i].keyOff) {
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chWrite(i,2,0x80);
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chWrite(i,2,0);
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} else {
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chWrite(i,1,chan[i].freq&0xff);
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chWrite(i,2,(chan[i].freq>>8)&0xf);
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chWrite(i,2,0x80|((chan[i].freq>>8)&0xf));
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}
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if (chan[i].keyOn) chan[i].keyOn=false;
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if (chan[i].keyOff) chan[i].keyOff=false;
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@ -236,7 +236,7 @@ int DivPlatformVRC6::dispatch(DivCommand c) {
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break;
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} else {
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if (dumpWrites) {
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chWrite(c.chan,2,0);
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chWrite(c.chan,2,0x80);
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chWrite(c.chan,0,isMuted[c.chan]?0:0x80);
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addWrite(0xffff0000+(c.chan<<8),chan[c.chan].dacSample);
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}
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@ -268,7 +268,7 @@ int DivPlatformVRC6::dispatch(DivCommand c) {
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chan[c.chan].dacPeriod=0;
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chan[c.chan].dacRate=parent->getSample(chan[c.chan].dacSample)->rate;
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if (dumpWrites) {
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chWrite(c.chan,2,0);
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chWrite(c.chan,2,0x80);
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chWrite(c.chan,0,isMuted[c.chan]?0:0x80);
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addWrite(0xffff0001+(c.chan<<8),chan[c.chan].dacRate);
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}
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