prepare for OPLL system - DOES NOT WORK
This commit is contained in:
parent
27c1522085
commit
37f850c6c4
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@ -244,6 +244,7 @@ extern/adpcm/ymz_codec.c
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extern/Nuked-OPN2/ym3438.c
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extern/opm/opm.c
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extern/Nuked-OPLL/opll.c
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src/engine/platform/sound/sn76496.cpp
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src/engine/platform/sound/ay8910.cpp
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src/engine/platform/sound/saa1099.cpp
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@ -304,6 +305,7 @@ src/engine/platform/abstract.cpp
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src/engine/platform/genesis.cpp
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src/engine/platform/genesisext.cpp
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src/engine/platform/sms.cpp
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src/engine/platform/opll.cpp
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src/engine/platform/gb.cpp
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src/engine/platform/pce.cpp
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src/engine/platform/nes.cpp
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@ -0,0 +1,12 @@
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# These are supported funding model platforms
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github: # Replace with up to 4 GitHub Sponsors-enabled usernames e.g., [user1, user2]
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patreon: nukeykt # Replace with a single Patreon username
|
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open_collective: # Replace with a single Open Collective username
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||||
ko_fi: # Replace with a single Ko-fi username
|
||||
tidelift: # Replace with a single Tidelift platform-name/package-name e.g., npm/babel
|
||||
community_bridge: # Replace with a single Community Bridge project-name e.g., cloud-foundry
|
||||
liberapay: # Replace with a single Liberapay username
|
||||
issuehunt: # Replace with a single IssueHunt username
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||||
otechie: # Replace with a single Otechie username
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||||
custom: ['https://www.buymeacoffee.com/nukeykt', 'https://paypal.me/nukeykt'] # Replace with up to 4 custom sponsorship URLs e.g., ['link1', 'link2']
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@ -0,0 +1,339 @@
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|||
GNU GENERAL PUBLIC LICENSE
|
||||
Version 2, June 1991
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||||
|
||||
Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
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Everyone is permitted to copy and distribute verbatim copies
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Preamble
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The licenses for most software are designed to take away your
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Yoyodyne, Inc., hereby disclaims all copyright interest in the program
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<signature of Ty Coon>, 1 April 1989
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Ty Coon, President of Vice
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,199 @@
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/*
|
||||
* Copyright (C) 2019 Nuke.YKT
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
*
|
||||
* Yamaha YM2413 emulator
|
||||
* Thanks:
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||||
* siliconpr0n.org(digshadow, John McMaster):
|
||||
* VRC VII decap and die shot.
|
||||
*
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||||
* version: 1.0.1
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||||
*/
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||||
|
||||
#ifndef OPLL_H
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||||
#define OPLL_H
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||||
|
||||
#include <stdint.h>
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||||
|
||||
enum {
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||||
opll_type_ym2413 = 0x00, /* Yamaha YM2413 */
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||||
opll_type_ds1001, /* Konami VRC VII */
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||||
opll_type_ym2413b, /* Yamaha YM2413B */
|
||||
opll_type_ymf281, /* Yamaha YMF281 */
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||||
opll_type_ymf281b, /* Yamaha YMF281B */
|
||||
opll_type_ym2420, /* Yamaha YM2420 */
|
||||
opll_type_ym2423, /* Yamaha YM2423 */
|
||||
};
|
||||
|
||||
enum {
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||||
opll_patch_1 = 0x00,
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||||
opll_patch_2,
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opll_patch_3,
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||||
opll_patch_4,
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||||
opll_patch_5,
|
||||
opll_patch_6,
|
||||
opll_patch_7,
|
||||
opll_patch_8,
|
||||
opll_patch_9,
|
||||
opll_patch_10,
|
||||
opll_patch_11,
|
||||
opll_patch_12,
|
||||
opll_patch_13,
|
||||
opll_patch_14,
|
||||
opll_patch_15,
|
||||
opll_patch_drum_0,
|
||||
opll_patch_drum_1,
|
||||
opll_patch_drum_2,
|
||||
opll_patch_drum_3,
|
||||
opll_patch_drum_4,
|
||||
opll_patch_drum_5,
|
||||
opll_patch_max
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
uint8_t tl;
|
||||
uint8_t dc;
|
||||
uint8_t dm;
|
||||
uint8_t fb;
|
||||
uint8_t am[2];
|
||||
uint8_t vib[2];
|
||||
uint8_t et[2];
|
||||
uint8_t ksr[2];
|
||||
uint8_t multi[2];
|
||||
uint8_t ksl[2];
|
||||
uint8_t ar[2];
|
||||
uint8_t dr[2];
|
||||
uint8_t sl[2];
|
||||
uint8_t rr[2];
|
||||
} opll_patch_t;
|
||||
|
||||
typedef struct {
|
||||
uint32_t chip_type;
|
||||
uint32_t cycles;
|
||||
uint32_t slot;
|
||||
const opll_patch_t *patchrom;
|
||||
/* IO */
|
||||
uint8_t write_data;
|
||||
uint8_t write_a;
|
||||
uint8_t write_d;
|
||||
uint8_t write_a_en;
|
||||
uint8_t write_d_en;
|
||||
uint8_t write_fm_address;
|
||||
uint8_t write_fm_data;
|
||||
uint8_t write_mode_address;
|
||||
uint8_t address;
|
||||
uint8_t data;
|
||||
/* Envelope generator */
|
||||
uint8_t eg_counter_state;
|
||||
uint8_t eg_counter_state_prev;
|
||||
uint32_t eg_timer;
|
||||
uint8_t eg_timer_low_lock;
|
||||
uint8_t eg_timer_carry;
|
||||
uint8_t eg_timer_shift;
|
||||
uint8_t eg_timer_shift_lock;
|
||||
uint8_t eg_timer_shift_stop;
|
||||
uint8_t eg_state[18];
|
||||
uint8_t eg_level[18];
|
||||
uint8_t eg_kon;
|
||||
uint32_t eg_dokon;
|
||||
uint8_t eg_off;
|
||||
uint8_t eg_rate;
|
||||
uint8_t eg_maxrate;
|
||||
uint8_t eg_zerorate;
|
||||
uint8_t eg_inc_lo;
|
||||
uint8_t eg_inc_hi;
|
||||
uint8_t eg_rate_hi;
|
||||
uint16_t eg_sl;
|
||||
uint16_t eg_ksltl;
|
||||
uint8_t eg_out;
|
||||
uint8_t eg_silent;
|
||||
/* Phase generator */
|
||||
uint16_t pg_fnum;
|
||||
uint8_t pg_block;
|
||||
uint16_t pg_out;
|
||||
uint32_t pg_inc;
|
||||
uint32_t pg_phase[18];
|
||||
uint32_t pg_phase_next;
|
||||
/* Operator */
|
||||
int16_t op_fb1[9];
|
||||
int16_t op_fb2[9];
|
||||
int16_t op_fbsum;
|
||||
int16_t op_mod;
|
||||
uint8_t op_neg;
|
||||
uint16_t op_logsin;
|
||||
uint16_t op_exp_m;
|
||||
uint16_t op_exp_s;
|
||||
/* Channel */
|
||||
int16_t ch_out;
|
||||
int16_t ch_out_hh;
|
||||
int16_t ch_out_tm;
|
||||
int16_t ch_out_bd;
|
||||
int16_t ch_out_sd;
|
||||
int16_t ch_out_tc;
|
||||
/* LFO */
|
||||
uint16_t lfo_counter;
|
||||
uint8_t lfo_vib_counter;
|
||||
uint16_t lfo_am_counter;
|
||||
uint8_t lfo_am_step;
|
||||
uint8_t lfo_am_dir;
|
||||
uint8_t lfo_am_car;
|
||||
uint8_t lfo_am_out;
|
||||
/* Register set */
|
||||
uint16_t fnum[9];
|
||||
uint8_t block[9];
|
||||
uint8_t kon[9];
|
||||
uint8_t son[9];
|
||||
uint8_t vol[9];
|
||||
uint8_t inst[9];
|
||||
uint8_t rhythm;
|
||||
uint8_t testmode;
|
||||
opll_patch_t patch;
|
||||
uint8_t c_instr;
|
||||
uint8_t c_op;
|
||||
uint8_t c_tl;
|
||||
uint8_t c_dc;
|
||||
uint8_t c_dm;
|
||||
uint8_t c_fb;
|
||||
uint8_t c_am;
|
||||
uint8_t c_vib;
|
||||
uint8_t c_et;
|
||||
uint8_t c_ksr;
|
||||
uint8_t c_ksr_freq;
|
||||
uint8_t c_ksl_freq;
|
||||
uint8_t c_ksl_block;
|
||||
uint8_t c_multi;
|
||||
uint8_t c_ksl;
|
||||
uint8_t c_adrr[3];
|
||||
uint8_t c_sl;
|
||||
uint16_t c_fnum;
|
||||
uint16_t c_block;
|
||||
/* Rhythm mode */
|
||||
int8_t rm_enable;
|
||||
uint32_t rm_noise;
|
||||
uint32_t rm_select;
|
||||
uint8_t rm_hh_bit2;
|
||||
uint8_t rm_hh_bit3;
|
||||
uint8_t rm_hh_bit7;
|
||||
uint8_t rm_hh_bit8;
|
||||
uint8_t rm_tc_bit3;
|
||||
uint8_t rm_tc_bit5;
|
||||
|
||||
int16_t output_m;
|
||||
int16_t output_r;
|
||||
|
||||
} opll_t;
|
||||
|
||||
void OPLL_Reset(opll_t *chip, uint32_t chip_type);
|
||||
void OPLL_Clock(opll_t *chip, int32_t *buffer);
|
||||
void OPLL_Write(opll_t *chip, uint32_t port, uint8_t data);
|
||||
#endif
|
|
@ -22,6 +22,7 @@
|
|||
#include "platform/genesis.h"
|
||||
#include "platform/genesisext.h"
|
||||
#include "platform/sms.h"
|
||||
#include "platform/opll.h"
|
||||
#include "platform/gb.h"
|
||||
#include "platform/pce.h"
|
||||
#include "platform/nes.h"
|
||||
|
@ -193,6 +194,10 @@ void DivDispatchContainer::init(DivSystem sys, DivEngine* eng, int chanCount, do
|
|||
case DIV_SYSTEM_TIA:
|
||||
dispatch=new DivPlatformTIA;
|
||||
break;
|
||||
case DIV_SYSTEM_OPLL:
|
||||
case DIV_SYSTEM_OPLL_DRUMS:
|
||||
dispatch=new DivPlatformOPLL;
|
||||
break;
|
||||
case DIV_SYSTEM_SAA1099: {
|
||||
int saaCore=eng->getConfInt("saaCore",0);
|
||||
if (saaCore<0 || saaCore>2) saaCore=0;
|
||||
|
|
|
@ -221,14 +221,6 @@ bool DivEngine::loadDMF(unsigned char* file, size_t len) {
|
|||
addWarning("Yamaha YMU759 emulation is not currently possible!");
|
||||
}
|
||||
|
||||
if (ds.system[0]==DIV_SYSTEM_SMS_OPLL) {
|
||||
addWarning("Master System FM expansion is not emulated yet. wait for 0.6!");
|
||||
}
|
||||
|
||||
if (ds.system[0]==DIV_SYSTEM_NES_VRC7) {
|
||||
addWarning("Konami VRC7 is not emulated yet. wait for 0.6!");
|
||||
}
|
||||
|
||||
logI("reading pattern matrix (%d)...\n",ds.ordersLen);
|
||||
for (int i=0; i<getChannelCount(ds.system[0]); i++) {
|
||||
for (int j=0; j<ds.ordersLen; j++) {
|
||||
|
|
|
@ -82,7 +82,8 @@ struct DivInstrumentFM {
|
|||
fb(0),
|
||||
fms(0),
|
||||
ams(0),
|
||||
ops(4) {
|
||||
ops(4),
|
||||
opllPreset(0) {
|
||||
// default instrument
|
||||
fb=4;
|
||||
op[0].tl=42;
|
||||
|
|
|
@ -0,0 +1,678 @@
|
|||
/**
|
||||
* Furnace Tracker - multi-system chiptune tracker
|
||||
* Copyright (C) 2021-2022 tildearrow and contributors
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#include "opll.h"
|
||||
#include "../engine.h"
|
||||
#include <string.h>
|
||||
#include <math.h>
|
||||
|
||||
#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
|
||||
#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
|
||||
|
||||
#define CHIP_FREQBASE 9440540
|
||||
|
||||
const char* DivPlatformOPLL::getEffectName(unsigned char effect) {
|
||||
switch (effect) {
|
||||
case 0x10:
|
||||
return "10xy: Setup LFO (x: enable; y: speed)";
|
||||
break;
|
||||
case 0x11:
|
||||
return "11xx: Set feedback (0 to 7)";
|
||||
break;
|
||||
case 0x12:
|
||||
return "12xx: Set level of operator 1 (0 highest, 7F lowest)";
|
||||
break;
|
||||
case 0x13:
|
||||
return "13xx: Set level of operator 2 (0 highest, 7F lowest)";
|
||||
break;
|
||||
case 0x14:
|
||||
return "14xx: Set level of operator 3 (0 highest, 7F lowest)";
|
||||
break;
|
||||
case 0x15:
|
||||
return "15xx: Set level of operator 4 (0 highest, 7F lowest)";
|
||||
break;
|
||||
case 0x16:
|
||||
return "16xy: Set operator multiplier (x: operator from 1 to 4; y: multiplier)";
|
||||
break;
|
||||
case 0x17:
|
||||
return "17xx: Enable channel 6 DAC";
|
||||
break;
|
||||
case 0x18:
|
||||
return "18xx: Toggle extended channel 3 mode";
|
||||
break;
|
||||
case 0x19:
|
||||
return "19xx: Set attack of all operators (0 to 1F)";
|
||||
break;
|
||||
case 0x1a:
|
||||
return "1Axx: Set attack of operator 1 (0 to 1F)";
|
||||
break;
|
||||
case 0x1b:
|
||||
return "1Bxx: Set attack of operator 2 (0 to 1F)";
|
||||
break;
|
||||
case 0x1c:
|
||||
return "1Cxx: Set attack of operator 3 (0 to 1F)";
|
||||
break;
|
||||
case 0x1d:
|
||||
return "1Dxx: Set attack of operator 4 (0 to 1F)";
|
||||
break;
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::acquire_nuked(short* bufL, short* bufR, size_t start, size_t len) {
|
||||
static int o[2];
|
||||
|
||||
for (size_t h=start; h<start+len; h++) {
|
||||
if (!writes.empty() && --delay<0) {
|
||||
delay=1;
|
||||
QueuedWrite& w=writes.front();
|
||||
if (w.addrOrVal) {
|
||||
OPLL_Write(&fm,1,w.val);
|
||||
printf("write: %x = %.2x\n",w.addr,w.val);
|
||||
regPool[w.addr&0xff]=w.val;
|
||||
writes.pop();
|
||||
} else {
|
||||
//printf("busycounter: %d\n",lastBusy);
|
||||
OPLL_Write(&fm,0,w.addr);
|
||||
w.addrOrVal=true;
|
||||
}
|
||||
}
|
||||
|
||||
OPLL_Clock(&fm,o);
|
||||
if (o[0]<-32768) o[0]=-32768;
|
||||
if (o[1]>32767) o[1]=32767;
|
||||
|
||||
bufL[h]=(o[0]+o[1])<<4;
|
||||
}
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::acquire_ymfm(short* bufL, short* bufR, size_t start, size_t len) {
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::acquire(short* bufL, short* bufR, size_t start, size_t len) {
|
||||
acquire_nuked(bufL,bufR,start,len);
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::tick() {
|
||||
for (int i=0; i<9; i++) {
|
||||
chan[i].std.next();
|
||||
|
||||
/*if (chan[i].std.hadVol) {
|
||||
chan[i].outVol=(chan[i].vol*MIN(127,chan[i].std.vol))/127;
|
||||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (chan[i].std.hadArp) {
|
||||
if (!chan[i].inPorta) {
|
||||
if (chan[i].std.arpMode) {
|
||||
chan[i].baseFreq=NOTE_FREQUENCY(chan[i].std.arp);
|
||||
} else {
|
||||
chan[i].baseFreq=NOTE_FREQUENCY(chan[i].note+(signed char)chan[i].std.arp);
|
||||
}
|
||||
}
|
||||
chan[i].freqChanged=true;
|
||||
} else {
|
||||
if (chan[i].std.arpMode && chan[i].std.finishedArp) {
|
||||
chan[i].baseFreq=NOTE_FREQUENCY(chan[i].note);
|
||||
chan[i].freqChanged=true;
|
||||
}
|
||||
}
|
||||
|
||||
if (chan[i].std.hadAlg) {
|
||||
chan[i].state.alg=chan[i].std.alg;
|
||||
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
||||
if (!parent->song.algMacroBehavior) for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
if (chan[i].std.hadFb) {
|
||||
chan[i].state.fb=chan[i].std.fb;
|
||||
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
||||
}
|
||||
if (chan[i].std.hadFms) {
|
||||
chan[i].state.fms=chan[i].std.fms;
|
||||
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
||||
}
|
||||
if (chan[i].std.hadAms) {
|
||||
chan[i].state.ams=chan[i].std.ams;
|
||||
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
||||
}
|
||||
for (int j=0; j<2; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
DivMacroInt::IntOp& m=chan[i].std.op[j];
|
||||
if (m.hadAm) {
|
||||
op.am=m.am;
|
||||
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
||||
}
|
||||
if (m.hadAr) {
|
||||
op.ar=m.ar;
|
||||
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
||||
}
|
||||
if (m.hadDr) {
|
||||
op.dr=m.dr;
|
||||
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
||||
}
|
||||
if (m.hadMult) {
|
||||
op.mult=m.mult;
|
||||
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
||||
}
|
||||
if (m.hadRr) {
|
||||
op.rr=m.rr;
|
||||
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
||||
}
|
||||
if (m.hadSl) {
|
||||
op.sl=m.sl;
|
||||
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
||||
}
|
||||
if (m.hadTl) {
|
||||
op.tl=127-m.tl;
|
||||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
}
|
||||
}
|
||||
}
|
||||
if (m.hadRs) {
|
||||
op.rs=m.rs;
|
||||
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
||||
}
|
||||
if (m.hadDt) {
|
||||
op.dt=m.dt;
|
||||
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
||||
}
|
||||
if (m.hadD2r) {
|
||||
op.d2r=m.d2r;
|
||||
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
||||
}
|
||||
if (m.hadSsg) {
|
||||
op.ssgEnv=m.ssg;
|
||||
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
||||
}
|
||||
}*/
|
||||
|
||||
if (chan[i].keyOn || chan[i].keyOff) {
|
||||
// TODO: FIX
|
||||
immWrite(0x20+i,0x00);
|
||||
//chan[i].keyOn=false;
|
||||
chan[i].keyOff=false;
|
||||
}
|
||||
}
|
||||
|
||||
for (int i=0; i<256; i++) {
|
||||
if (pendingWrites[i]!=oldWrites[i]) {
|
||||
immWrite(i,pendingWrites[i]&0xff);
|
||||
oldWrites[i]=pendingWrites[i];
|
||||
}
|
||||
}
|
||||
|
||||
for (int i=0; i<9; i++) {
|
||||
if (chan[i].freqChanged) {
|
||||
chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,false,octave(chan[i].baseFreq));
|
||||
if (chan[i].freq>262143) chan[i].freq=262143;
|
||||
int freqt=toFreq(chan[i].freq);
|
||||
chan[i].freqH=freqt>>8;
|
||||
chan[i].freqL=freqt&0xff;
|
||||
immWrite(0x10+i,freqt&0xff);
|
||||
|
||||
chan[i].freqChanged=false;
|
||||
}
|
||||
if (chan[i].keyOn) {
|
||||
//immWrite(0x28,0xf0|konOffs[i]);
|
||||
immWrite(0x20+i,(chan[i].freqH)|(chan[i].active<<4)|0x20);
|
||||
chan[i].keyOn=false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
int DivPlatformOPLL::octave(int freq) {
|
||||
if (freq>=32768) {
|
||||
return 128;
|
||||
} else if (freq>=16384) {
|
||||
return 64;
|
||||
} else if (freq>=8192) {
|
||||
return 32;
|
||||
} else if (freq>=4096) {
|
||||
return 16;
|
||||
} else if (freq>=2048) {
|
||||
return 8;
|
||||
} else if (freq>=1024) {
|
||||
return 4;
|
||||
} else if (freq>=512) {
|
||||
return 2;
|
||||
} else {
|
||||
return 1;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
int DivPlatformOPLL::toFreq(int freq) {
|
||||
if (freq>=32768) {
|
||||
return 0xe00|((freq>>7)&0x1ff);
|
||||
} else if (freq>=16384) {
|
||||
return 0xc00|((freq>>6)&0x1ff);
|
||||
} else if (freq>=8192) {
|
||||
return 0xa00|((freq>>5)&0x1ff);
|
||||
} else if (freq>=4096) {
|
||||
return 0x800|((freq>>4)&0x1ff);
|
||||
} else if (freq>=2048) {
|
||||
return 0x600|((freq>>3)&0x1ff);
|
||||
} else if (freq>=1024) {
|
||||
return 0x400|((freq>>2)&0x1ff);
|
||||
} else if (freq>=512) {
|
||||
return 0x200|((freq>>1)&0x1ff);
|
||||
} else {
|
||||
return freq&0x1ff;
|
||||
}
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::muteChannel(int ch, bool mute) {
|
||||
isMuted[ch]=mute;
|
||||
/*
|
||||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[ch]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[ch].state.op[j];
|
||||
if (isMuted[ch]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[ch].state.alg][j]) {
|
||||
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[ch].outVol&0x7f))/127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
}
|
||||
}
|
||||
}
|
||||
rWrite(chanOffs[ch]+ADDR_LRAF,(isMuted[ch]?0:(chan[ch].pan<<6))|(chan[ch].state.fms&7)|((chan[ch].state.ams&3)<<4));*/
|
||||
}
|
||||
|
||||
int DivPlatformOPLL::dispatch(DivCommand c) {
|
||||
switch (c.cmd) {
|
||||
case DIV_CMD_NOTE_ON: {
|
||||
DivInstrument* ins=parent->getIns(chan[c.chan].ins);
|
||||
if (chan[c.chan].insChanged) {
|
||||
chan[c.chan].state=ins->fm;
|
||||
}
|
||||
|
||||
chan[c.chan].std.init(ins);
|
||||
if (!chan[c.chan].std.willVol) {
|
||||
chan[c.chan].outVol=chan[c.chan].vol;
|
||||
}
|
||||
|
||||
/*
|
||||
for (int i=0; i<2; i++) {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
||||
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
|
||||
}
|
||||
} else {
|
||||
if (chan[c.chan].insChanged) {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
}
|
||||
}
|
||||
}
|
||||
if (chan[c.chan].insChanged) {
|
||||
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
||||
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
||||
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
||||
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
||||
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
||||
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
||||
}
|
||||
}
|
||||
if (chan[c.chan].insChanged) {
|
||||
rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
||||
rWrite(chanOffs[c.chan]+ADDR_LRAF,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
|
||||
}
|
||||
*/
|
||||
// for now
|
||||
rWrite(0x30+c.chan,0x1e);
|
||||
chan[c.chan].insChanged=false;
|
||||
|
||||
if (c.value!=DIV_NOTE_NULL) {
|
||||
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
||||
chan[c.chan].note=c.value;
|
||||
chan[c.chan].freqChanged=true;
|
||||
}
|
||||
chan[c.chan].keyOn=true;
|
||||
chan[c.chan].active=true;
|
||||
break;
|
||||
}
|
||||
case DIV_CMD_NOTE_OFF:
|
||||
chan[c.chan].keyOff=true;
|
||||
chan[c.chan].keyOn=false;
|
||||
chan[c.chan].active=false;
|
||||
break;
|
||||
case DIV_CMD_NOTE_OFF_ENV:
|
||||
chan[c.chan].keyOff=true;
|
||||
chan[c.chan].keyOn=false;
|
||||
chan[c.chan].active=false;
|
||||
chan[c.chan].std.release();
|
||||
break;
|
||||
case DIV_CMD_ENV_RELEASE:
|
||||
chan[c.chan].std.release();
|
||||
break;
|
||||
case DIV_CMD_VOLUME: {
|
||||
chan[c.chan].vol=c.value;
|
||||
if (!chan[c.chan].std.hasVol) {
|
||||
chan[c.chan].outVol=c.value;
|
||||
}
|
||||
/*
|
||||
for (int i=0; i<4; i++) {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
}
|
||||
}
|
||||
}*/
|
||||
break;
|
||||
}
|
||||
case DIV_CMD_GET_VOLUME: {
|
||||
return chan[c.chan].vol;
|
||||
break;
|
||||
}
|
||||
case DIV_CMD_INSTRUMENT:
|
||||
if (chan[c.chan].ins!=c.value || c.value2==1) {
|
||||
chan[c.chan].insChanged=true;
|
||||
}
|
||||
chan[c.chan].ins=c.value;
|
||||
break;
|
||||
case DIV_CMD_PITCH: {
|
||||
chan[c.chan].pitch=c.value;
|
||||
chan[c.chan].freqChanged=true;
|
||||
break;
|
||||
}
|
||||
case DIV_CMD_NOTE_PORTA: {
|
||||
int destFreq=NOTE_FREQUENCY(c.value2);
|
||||
int newFreq;
|
||||
bool return2=false;
|
||||
if (destFreq>chan[c.chan].baseFreq) {
|
||||
newFreq=chan[c.chan].baseFreq+c.value*octave(chan[c.chan].baseFreq);
|
||||
if (newFreq>=destFreq) {
|
||||
newFreq=destFreq;
|
||||
return2=true;
|
||||
}
|
||||
} else {
|
||||
newFreq=chan[c.chan].baseFreq-c.value*octave(chan[c.chan].baseFreq);
|
||||
if (newFreq<=destFreq) {
|
||||
newFreq=destFreq;
|
||||
return2=true;
|
||||
}
|
||||
}
|
||||
if (!chan[c.chan].portaPause) {
|
||||
if (octave(chan[c.chan].baseFreq)!=octave(newFreq)) {
|
||||
chan[c.chan].portaPause=true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
chan[c.chan].baseFreq=newFreq;
|
||||
chan[c.chan].portaPause=false;
|
||||
chan[c.chan].freqChanged=true;
|
||||
if (return2) {
|
||||
chan[c.chan].inPorta=false;
|
||||
return 2;
|
||||
}
|
||||
break;
|
||||
}
|
||||
case DIV_CMD_LEGATO: {
|
||||
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
||||
chan[c.chan].note=c.value;
|
||||
chan[c.chan].freqChanged=true;
|
||||
break;
|
||||
}
|
||||
/*
|
||||
case DIV_CMD_FM_FB: {
|
||||
chan[c.chan].state.fb=c.value&7;
|
||||
rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
||||
break;
|
||||
}
|
||||
case DIV_CMD_FM_MULT: {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
||||
op.mult=c.value2&15;
|
||||
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
||||
break;
|
||||
}
|
||||
case DIV_CMD_FM_TL: {
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
||||
op.tl=c.value2;
|
||||
if (isMuted[c.chan]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
||||
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
case DIV_CMD_FM_AR: {
|
||||
if (c.value<0) {
|
||||
for (int i=0; i<4; i++) {
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
||||
op.ar=c.value2&31;
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
||||
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
||||
}
|
||||
} else {
|
||||
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
||||
op.ar=c.value2&31;
|
||||
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
||||
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
*/
|
||||
case DIV_ALWAYS_SET_VOLUME:
|
||||
return 0;
|
||||
break;
|
||||
case DIV_CMD_GET_VOLMAX:
|
||||
return 127;
|
||||
break;
|
||||
case DIV_CMD_PRE_PORTA:
|
||||
chan[c.chan].inPorta=c.value;
|
||||
break;
|
||||
case DIV_CMD_PRE_NOTE:
|
||||
break;
|
||||
default:
|
||||
//printf("WARNING: unimplemented command %d\n",c.cmd);
|
||||
break;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::forceIns() {
|
||||
/*
|
||||
for (int i=0; i<6; i++) {
|
||||
for (int j=0; j<4; j++) {
|
||||
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
||||
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
||||
if (isMuted[i]) {
|
||||
rWrite(baseAddr+ADDR_TL,127);
|
||||
} else {
|
||||
if (isOutput[chan[i].state.alg][j]) {
|
||||
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
|
||||
} else {
|
||||
rWrite(baseAddr+ADDR_TL,op.tl);
|
||||
}
|
||||
}
|
||||
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
||||
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
||||
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
||||
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
||||
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
||||
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
||||
}
|
||||
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
||||
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
||||
if (chan[i].active) {
|
||||
chan[i].keyOn=true;
|
||||
chan[i].freqChanged=true;
|
||||
}
|
||||
}
|
||||
if (dacMode) {
|
||||
rWrite(0x2b,0x80);
|
||||
}
|
||||
immWrite(0x22,lfoValue);*/
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::toggleRegisterDump(bool enable) {
|
||||
DivDispatch::toggleRegisterDump(enable);
|
||||
}
|
||||
|
||||
void* DivPlatformOPLL::getChanState(int ch) {
|
||||
return &chan[ch];
|
||||
}
|
||||
|
||||
unsigned char* DivPlatformOPLL::getRegisterPool() {
|
||||
return regPool;
|
||||
}
|
||||
|
||||
int DivPlatformOPLL::getRegisterPoolSize() {
|
||||
return 256;
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::reset() {
|
||||
while (!writes.empty()) writes.pop();
|
||||
memset(regPool,0,256);
|
||||
OPLL_Reset(&fm,opll_type_ym2413);
|
||||
if (dumpWrites) {
|
||||
addWrite(0xffffffff,0);
|
||||
}
|
||||
for (int i=0; i<9; i++) {
|
||||
chan[i]=DivPlatformOPLL::Channel();
|
||||
chan[i].vol=15;
|
||||
chan[i].outVol=15;
|
||||
}
|
||||
|
||||
for (int i=0; i<256; i++) {
|
||||
oldWrites[i]=-1;
|
||||
pendingWrites[i]=-1;
|
||||
}
|
||||
|
||||
lastBusy=60;
|
||||
|
||||
delay=0;
|
||||
}
|
||||
|
||||
bool DivPlatformOPLL::keyOffAffectsArp(int ch) {
|
||||
return false;
|
||||
}
|
||||
|
||||
bool DivPlatformOPLL::keyOffAffectsPorta(int ch) {
|
||||
return false;
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::notifyInsChange(int ins) {
|
||||
for (int i=0; i<9; i++) {
|
||||
if (chan[i].ins==ins) {
|
||||
chan[i].insChanged=true;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::notifyInsDeletion(void* ins) {
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::poke(unsigned int addr, unsigned short val) {
|
||||
immWrite(addr,val);
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::poke(std::vector<DivRegWrite>& wlist) {
|
||||
for (DivRegWrite& i: wlist) immWrite(i.addr,i.val);
|
||||
}
|
||||
|
||||
int DivPlatformOPLL::getPortaFloor(int ch) {
|
||||
return (ch>5)?12:0;
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::setYMFM(bool use) {
|
||||
useYMFM=use;
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::setFlags(unsigned int flags) {
|
||||
if (flags==3) {
|
||||
chipClock=COLOR_NTSC;
|
||||
} else if (flags==2) {
|
||||
chipClock=8000000.0;
|
||||
} else if (flags==1) {
|
||||
chipClock=COLOR_PAL*4.0/5.0;
|
||||
} else {
|
||||
chipClock=COLOR_NTSC;
|
||||
}
|
||||
rate=chipClock;
|
||||
}
|
||||
|
||||
int DivPlatformOPLL::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
|
||||
parent=p;
|
||||
dumpWrites=false;
|
||||
skipRegisterWrites=false;
|
||||
for (int i=0; i<9; i++) {
|
||||
isMuted[i]=false;
|
||||
}
|
||||
setFlags(flags);
|
||||
|
||||
reset();
|
||||
return 10;
|
||||
}
|
||||
|
||||
void DivPlatformOPLL::quit() {
|
||||
}
|
||||
|
||||
DivPlatformOPLL::~DivPlatformOPLL() {
|
||||
}
|
|
@ -0,0 +1,113 @@
|
|||
/**
|
||||
* Furnace Tracker - multi-system chiptune tracker
|
||||
* Copyright (C) 2021-2022 tildearrow and contributors
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#ifndef _OPLL_H
|
||||
#define _OPLL_H
|
||||
#include "../dispatch.h"
|
||||
#include "../macroInt.h"
|
||||
#include <queue>
|
||||
|
||||
extern "C" {
|
||||
#include "../../../extern/Nuked-OPLL/opll.h"
|
||||
}
|
||||
|
||||
class DivPlatformOPLL: public DivDispatch {
|
||||
protected:
|
||||
struct Channel {
|
||||
DivInstrumentFM state;
|
||||
DivMacroInt std;
|
||||
unsigned char freqH, freqL;
|
||||
int freq, baseFreq, pitch, note;
|
||||
unsigned char ins;
|
||||
bool active, insChanged, freqChanged, keyOn, keyOff, portaPause, furnaceDac, inPorta;
|
||||
int vol, outVol;
|
||||
unsigned char pan;
|
||||
Channel():
|
||||
freqH(0),
|
||||
freqL(0),
|
||||
freq(0),
|
||||
baseFreq(0),
|
||||
pitch(0),
|
||||
note(0),
|
||||
ins(-1),
|
||||
active(false),
|
||||
insChanged(true),
|
||||
freqChanged(false),
|
||||
keyOn(false),
|
||||
keyOff(false),
|
||||
portaPause(false),
|
||||
furnaceDac(false),
|
||||
inPorta(false),
|
||||
vol(0),
|
||||
pan(3) {}
|
||||
};
|
||||
Channel chan[9];
|
||||
bool isMuted[9];
|
||||
struct QueuedWrite {
|
||||
unsigned short addr;
|
||||
unsigned char val;
|
||||
bool addrOrVal;
|
||||
QueuedWrite(unsigned short a, unsigned char v): addr(a), val(v), addrOrVal(false) {}
|
||||
};
|
||||
std::queue<QueuedWrite> writes;
|
||||
opll_t fm;
|
||||
int delay;
|
||||
unsigned char lastBusy;
|
||||
|
||||
unsigned char regPool[256];
|
||||
|
||||
bool useYMFM;
|
||||
|
||||
short oldWrites[256];
|
||||
short pendingWrites[256];
|
||||
|
||||
int octave(int freq);
|
||||
int toFreq(int freq);
|
||||
|
||||
friend void putDispatchChan(void*,int,int);
|
||||
|
||||
void acquire_nuked(short* bufL, short* bufR, size_t start, size_t len);
|
||||
void acquire_ymfm(short* bufL, short* bufR, size_t start, size_t len);
|
||||
|
||||
public:
|
||||
void acquire(short* bufL, short* bufR, size_t start, size_t len);
|
||||
int dispatch(DivCommand c);
|
||||
void* getChanState(int chan);
|
||||
unsigned char* getRegisterPool();
|
||||
int getRegisterPoolSize();
|
||||
void reset();
|
||||
void forceIns();
|
||||
void tick();
|
||||
void muteChannel(int ch, bool mute);
|
||||
void setYMFM(bool use);
|
||||
bool keyOffAffectsArp(int ch);
|
||||
bool keyOffAffectsPorta(int ch);
|
||||
void toggleRegisterDump(bool enable);
|
||||
void setFlags(unsigned int flags);
|
||||
void notifyInsChange(int ins);
|
||||
void notifyInsDeletion(void* ins);
|
||||
int getPortaFloor(int ch);
|
||||
void poke(unsigned int addr, unsigned short val);
|
||||
void poke(std::vector<DivRegWrite>& wlist);
|
||||
const char* getEffectName(unsigned char effect);
|
||||
int init(DivEngine* parent, int channels, int sugRate, unsigned int flags);
|
||||
void quit();
|
||||
~DivPlatformOPLL();
|
||||
};
|
||||
#endif
|
Loading…
Reference in New Issue