OPL: volume

This commit is contained in:
tildearrow 2022-03-14 01:57:46 -05:00
parent df5c1ae859
commit 32581bb228

View file

@ -524,21 +524,23 @@ int DivPlatformOPL::dispatch(DivCommand c) {
if (!chan[c.chan].std.hasVol) { if (!chan[c.chan].std.hasVol) {
chan[c.chan].outVol=c.value; chan[c.chan].outVol=c.value;
} }
/* int ops=(slots[3][c.chan]!=255 && chan[c.chan].state.ops==4 && oplType==3)?4:2;
for (int i=0; i<4; i++) { for (int i=0; i<ops; i++) {
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i]; unsigned char slot=slots[i][c.chan];
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i]; if (slot==255) continue;
unsigned short baseAddr=slotMap[slot];
DivInstrumentFM::Operator& op=chan[c.chan].state.op[(ops==4)?orderedOpsL[i]:i];
if (isMuted[c.chan]) { if (isMuted[c.chan]) {
rWrite(baseAddr+ADDR_TL,127); rWrite(baseAddr+ADDR_KSL_TL,63|(op.ksl<<6));
} else { } else {
if (isOutput[chan[c.chan].state.alg][i]) { if (isOutputL[ops==4][chan[c.chan].state.alg][i]) {
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[c.chan].outVol&0x7f))/127)); rWrite(baseAddr+ADDR_KSL_TL,(63-(((63-op.tl)*(chan[c.chan].outVol&0x3f))/63))|(op.ksl<<6));
} else { } else {
rWrite(baseAddr+ADDR_TL,op.tl); rWrite(baseAddr+ADDR_KSL_TL,op.tl|(op.ksl<<6));
} }
} }
} }
*/
break; break;
} }
case DIV_CMD_GET_VOLUME: { case DIV_CMD_GET_VOLUME: {