OPL: proper frequency on OPL1/2
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2d922d5e09
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1bc8bc8746
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@ -25,7 +25,7 @@
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#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
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#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
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#define CHIP_FREQBASE 9440540
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#define CHIP_FREQBASE chipFreqBase
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// N = invalid
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#define N 255
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@ -456,9 +456,11 @@ int DivPlatformOPL::dispatch(DivCommand c) {
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chan[c.chan].outVol=chan[c.chan].vol;
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}
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if (chan[c.chan].insChanged) {
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int ops=(slots[3][c.chan]!=255 && ins->fm.ops==4)?4:2;
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int ops=(slots[3][c.chan]!=255 && ins->fm.ops==4 && oplType==3)?4:2;
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for (int i=0; i<ops; i++) {
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unsigned short baseAddr=slotMap[slots[i][c.chan]];
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unsigned char slot=slots[i][c.chan];
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if (slot==255) continue;
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unsigned short baseAddr=slotMap[slot];
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DivInstrumentFM::Operator& op=chan[c.chan].state.op[(ops==4)?orderedOpsL[i]:i];
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if (isMuted[c.chan]) {
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@ -812,12 +814,14 @@ void DivPlatformOPL::setOPLType(int type, bool drums) {
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slotsDrums=slotsOPL2Drums;
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slots=drums?slotsDrums:slotsNonDrums;
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chanMap=chanMapOPL2;
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chipFreqBase=9440540*0.25;
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break;
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case 3:
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slotsNonDrums=slotsOPL3;
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slotsDrums=slotsOPL3Drums;
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slots=drums?slotsDrums:slotsNonDrums;
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chanMap=chanMapOPL3;
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chipFreqBase=9440540;
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break;
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}
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oplType=type;
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@ -68,6 +68,7 @@ class DivPlatformOPL: public DivDispatch {
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const unsigned char** slotsDrums;
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const unsigned char** slots;
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const unsigned short* chanMap;
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double chipFreqBase;
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int delay, oplType;
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unsigned char lastBusy;
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