mirror of
https://github.com/tildearrow/furnace.git
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151 lines
5.5 KiB
C
151 lines
5.5 KiB
C
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/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:44:59 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_notw_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -n 5 -name n1fv_5 -include dft/simd/n1f.h */
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/*
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* This function contains 16 FP additions, 11 FP multiplications,
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* (or, 7 additions, 2 multiplications, 9 fused multiply/add),
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* 18 stack variables, 4 constants, and 10 memory accesses
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*/
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#include "dft/simd/n1f.h"
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static void n1fv_5(const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs)
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{
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DVK(KP559016994, +0.559016994374947424102293417182819058860154590);
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DVK(KP250000000, +0.250000000000000000000000000000000000000000000);
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DVK(KP618033988, +0.618033988749894848204586834365638117720309180);
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DVK(KP951056516, +0.951056516295153572116439333379382143405698634);
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{
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INT i;
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const R *xi;
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R *xo;
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xi = ri;
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xo = ro;
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for (i = v; i > 0; i = i - VL, xi = xi + (VL * ivs), xo = xo + (VL * ovs), MAKE_VOLATILE_STRIDE(10, is), MAKE_VOLATILE_STRIDE(10, os)) {
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V T1, T8, Td, Ta, Tc;
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T1 = LD(&(xi[0]), ivs, &(xi[0]));
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{
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V T2, T3, T4, T5, T6, T7;
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T2 = LD(&(xi[WS(is, 1)]), ivs, &(xi[WS(is, 1)]));
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T3 = LD(&(xi[WS(is, 4)]), ivs, &(xi[0]));
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T4 = VADD(T2, T3);
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T5 = LD(&(xi[WS(is, 2)]), ivs, &(xi[0]));
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T6 = LD(&(xi[WS(is, 3)]), ivs, &(xi[WS(is, 1)]));
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T7 = VADD(T5, T6);
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T8 = VADD(T4, T7);
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Td = VSUB(T5, T6);
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Ta = VSUB(T4, T7);
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Tc = VSUB(T2, T3);
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}
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ST(&(xo[0]), VADD(T1, T8), ovs, &(xo[0]));
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{
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V Te, Tg, Tb, Tf, T9;
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Te = VMUL(LDK(KP951056516), VFMA(LDK(KP618033988), Td, Tc));
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Tg = VMUL(LDK(KP951056516), VFNMS(LDK(KP618033988), Tc, Td));
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T9 = VFNMS(LDK(KP250000000), T8, T1);
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Tb = VFMA(LDK(KP559016994), Ta, T9);
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Tf = VFNMS(LDK(KP559016994), Ta, T9);
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ST(&(xo[WS(os, 1)]), VFNMSI(Te, Tb), ovs, &(xo[WS(os, 1)]));
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ST(&(xo[WS(os, 3)]), VFNMSI(Tg, Tf), ovs, &(xo[WS(os, 1)]));
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ST(&(xo[WS(os, 4)]), VFMAI(Te, Tb), ovs, &(xo[0]));
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ST(&(xo[WS(os, 2)]), VFMAI(Tg, Tf), ovs, &(xo[0]));
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}
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}
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}
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VLEAVE();
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}
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static const kdft_desc desc = { 5, XSIMD_STRING("n1fv_5"), { 7, 2, 9, 0 }, &GENUS, 0, 0, 0, 0 };
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void XSIMD(codelet_n1fv_5) (planner *p) { X(kdft_register) (p, n1fv_5, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_notw_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 5 -name n1fv_5 -include dft/simd/n1f.h */
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/*
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* This function contains 16 FP additions, 6 FP multiplications,
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* (or, 13 additions, 3 multiplications, 3 fused multiply/add),
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* 18 stack variables, 4 constants, and 10 memory accesses
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*/
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#include "dft/simd/n1f.h"
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static void n1fv_5(const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs)
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{
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DVK(KP250000000, +0.250000000000000000000000000000000000000000000);
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DVK(KP587785252, +0.587785252292473129168705954639072768597652438);
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DVK(KP951056516, +0.951056516295153572116439333379382143405698634);
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DVK(KP559016994, +0.559016994374947424102293417182819058860154590);
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{
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INT i;
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const R *xi;
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R *xo;
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xi = ri;
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xo = ro;
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for (i = v; i > 0; i = i - VL, xi = xi + (VL * ivs), xo = xo + (VL * ovs), MAKE_VOLATILE_STRIDE(10, is), MAKE_VOLATILE_STRIDE(10, os)) {
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V T8, T7, Td, T9, Tc;
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T8 = LD(&(xi[0]), ivs, &(xi[0]));
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{
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V T1, T2, T3, T4, T5, T6;
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T1 = LD(&(xi[WS(is, 1)]), ivs, &(xi[WS(is, 1)]));
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T2 = LD(&(xi[WS(is, 4)]), ivs, &(xi[0]));
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T3 = VADD(T1, T2);
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T4 = LD(&(xi[WS(is, 2)]), ivs, &(xi[0]));
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T5 = LD(&(xi[WS(is, 3)]), ivs, &(xi[WS(is, 1)]));
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T6 = VADD(T4, T5);
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T7 = VMUL(LDK(KP559016994), VSUB(T3, T6));
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Td = VSUB(T4, T5);
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T9 = VADD(T3, T6);
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Tc = VSUB(T1, T2);
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}
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ST(&(xo[0]), VADD(T8, T9), ovs, &(xo[0]));
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{
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V Te, Tf, Tb, Tg, Ta;
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Te = VBYI(VFMA(LDK(KP951056516), Tc, VMUL(LDK(KP587785252), Td)));
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Tf = VBYI(VFNMS(LDK(KP587785252), Tc, VMUL(LDK(KP951056516), Td)));
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Ta = VFNMS(LDK(KP250000000), T9, T8);
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Tb = VADD(T7, Ta);
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Tg = VSUB(Ta, T7);
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ST(&(xo[WS(os, 1)]), VSUB(Tb, Te), ovs, &(xo[WS(os, 1)]));
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ST(&(xo[WS(os, 3)]), VSUB(Tg, Tf), ovs, &(xo[WS(os, 1)]));
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ST(&(xo[WS(os, 4)]), VADD(Te, Tb), ovs, &(xo[0]));
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ST(&(xo[WS(os, 2)]), VADD(Tf, Tg), ovs, &(xo[0]));
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}
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}
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}
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VLEAVE();
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}
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static const kdft_desc desc = { 5, XSIMD_STRING("n1fv_5"), { 13, 3, 3, 0 }, &GENUS, 0, 0, 0, 0 };
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void XSIMD(codelet_n1fv_5) (planner *p) { X(kdft_register) (p, n1fv_5, &desc);
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}
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#endif
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