2022-02-25 09:26:01 +00:00
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/**
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* Furnace Tracker - multi-system chiptune tracker
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* Copyright (C) 2021-2022 tildearrow and contributors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "opll.h"
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#include "../engine.h"
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#include <string.h>
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#include <math.h>
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#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
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#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
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2022-02-25 18:33:58 +00:00
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#define CHIP_FREQBASE 295017
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2022-02-25 09:26:01 +00:00
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const char* DivPlatformOPLL::getEffectName(unsigned char effect) {
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switch (effect) {
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case 0x10:
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return "10xy: Setup LFO (x: enable; y: speed)";
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break;
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case 0x11:
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return "11xx: Set feedback (0 to 7)";
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break;
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case 0x12:
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return "12xx: Set level of operator 1 (0 highest, 7F lowest)";
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break;
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case 0x13:
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return "13xx: Set level of operator 2 (0 highest, 7F lowest)";
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break;
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case 0x14:
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return "14xx: Set level of operator 3 (0 highest, 7F lowest)";
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break;
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case 0x15:
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return "15xx: Set level of operator 4 (0 highest, 7F lowest)";
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break;
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case 0x16:
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return "16xy: Set operator multiplier (x: operator from 1 to 4; y: multiplier)";
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break;
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case 0x17:
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return "17xx: Enable channel 6 DAC";
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break;
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case 0x18:
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return "18xx: Toggle extended channel 3 mode";
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break;
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case 0x19:
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return "19xx: Set attack of all operators (0 to 1F)";
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break;
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case 0x1a:
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return "1Axx: Set attack of operator 1 (0 to 1F)";
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break;
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case 0x1b:
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return "1Bxx: Set attack of operator 2 (0 to 1F)";
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break;
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case 0x1c:
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return "1Cxx: Set attack of operator 3 (0 to 1F)";
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break;
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case 0x1d:
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return "1Dxx: Set attack of operator 4 (0 to 1F)";
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break;
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}
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return NULL;
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}
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2022-02-28 08:50:45 +00:00
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const unsigned char cycleMapOPLL[18]={
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2022-03-01 04:31:49 +00:00
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5, 6, 7, 8, 6, 7, 8, 0, 1, 2, 0, 1, 2, 3, 4, 5, 3, 4
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2022-02-28 08:50:45 +00:00
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};
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2022-02-25 09:26:01 +00:00
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void DivPlatformOPLL::acquire_nuked(short* bufL, short* bufR, size_t start, size_t len) {
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static int o[2];
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2022-02-25 22:55:33 +00:00
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static int os;
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2022-02-25 09:26:01 +00:00
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for (size_t h=start; h<start+len; h++) {
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2022-02-27 07:58:30 +00:00
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os=0;
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for (int i=0; i<9; i++) {
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if (!writes.empty() && --delay<0) {
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// 84 is safe value
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QueuedWrite& w=writes.front();
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if (w.addrOrVal) {
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OPLL_Write(&fm,1,w.val);
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//printf("write: %x = %.2x\n",w.addr,w.val);
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regPool[w.addr&0xff]=w.val;
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writes.pop();
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delay=21;
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} else {
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//printf("busycounter: %d\n",lastBusy);
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OPLL_Write(&fm,0,w.addr);
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w.addrOrVal=true;
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delay=3;
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}
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2022-02-25 09:26:01 +00:00
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}
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2022-02-27 07:58:30 +00:00
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2022-03-01 04:31:49 +00:00
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unsigned char nextOut=cycleMapOPLL[fm.cycles];
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2022-02-27 07:58:30 +00:00
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OPLL_Clock(&fm,o);
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2022-02-28 08:50:45 +00:00
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if (!isMuted[nextOut]) {
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os+=(o[0]+o[1]);
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}
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2022-02-25 09:26:01 +00:00
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}
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2022-02-27 07:58:30 +00:00
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os*=50;
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2022-02-25 22:55:33 +00:00
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if (os<-32768) os=-32768;
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if (os>32767) os=32767;
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bufL[h]=os;
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2022-02-25 09:26:01 +00:00
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}
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}
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void DivPlatformOPLL::acquire_ymfm(short* bufL, short* bufR, size_t start, size_t len) {
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}
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void DivPlatformOPLL::acquire(short* bufL, short* bufR, size_t start, size_t len) {
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acquire_nuked(bufL,bufR,start,len);
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}
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void DivPlatformOPLL::tick() {
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for (int i=0; i<9; i++) {
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chan[i].std.next();
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2022-02-28 19:13:14 +00:00
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if (chan[i].std.hadVol) {
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2022-02-25 09:26:01 +00:00
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chan[i].outVol=(chan[i].vol*MIN(127,chan[i].std.vol))/127;
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2022-02-28 19:13:14 +00:00
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rWrite(0x30+i,(15-(chan[i].outVol*(15-chan[i].state.op[1].tl))/15)|(chan[i].state.opllPreset<<4));
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2022-02-25 09:26:01 +00:00
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}
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if (chan[i].std.hadArp) {
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if (!chan[i].inPorta) {
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if (chan[i].std.arpMode) {
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].std.arp);
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} else {
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].note+(signed char)chan[i].std.arp);
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}
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}
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chan[i].freqChanged=true;
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} else {
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if (chan[i].std.arpMode && chan[i].std.finishedArp) {
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chan[i].baseFreq=NOTE_FREQUENCY(chan[i].note);
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chan[i].freqChanged=true;
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}
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}
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2022-02-28 19:13:14 +00:00
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/*
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2022-02-25 09:26:01 +00:00
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if (chan[i].std.hadAlg) {
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chan[i].state.alg=chan[i].std.alg;
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rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
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}
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if (chan[i].std.hadFb) {
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chan[i].state.fb=chan[i].std.fb;
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}
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if (chan[i].std.hadFms) {
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chan[i].state.fms=chan[i].std.fms;
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}
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if (chan[i].std.hadAms) {
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chan[i].state.ams=chan[i].std.ams;
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}
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for (int j=0; j<2; j++) {
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unsigned short baseAddr=chanOffs[i]|opOffs[j];
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DivInstrumentFM::Operator& op=chan[i].state.op[j];
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DivMacroInt::IntOp& m=chan[i].std.op[j];
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if (m.hadAm) {
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op.am=m.am;
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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if (m.hadAr) {
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op.ar=m.ar;
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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if (m.hadDr) {
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op.dr=m.dr;
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rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
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}
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if (m.hadMult) {
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op.mult=m.mult;
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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}
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if (m.hadRr) {
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op.rr=m.rr;
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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if (m.hadSl) {
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op.sl=m.sl;
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rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
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}
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if (m.hadTl) {
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op.tl=127-m.tl;
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if (isMuted[i]) {
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rWrite(baseAddr+ADDR_TL,127);
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} else {
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if (isOutput[chan[i].state.alg][j]) {
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rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[i].outVol&0x7f))/127));
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} else {
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rWrite(baseAddr+ADDR_TL,op.tl);
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}
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}
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}
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if (m.hadRs) {
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op.rs=m.rs;
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rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
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}
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if (m.hadDt) {
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op.dt=m.dt;
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rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
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}
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if (m.hadD2r) {
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op.d2r=m.d2r;
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rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
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}
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if (m.hadSsg) {
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op.ssgEnv=m.ssg;
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rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
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}
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}*/
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if (chan[i].keyOn || chan[i].keyOff) {
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2022-02-28 06:25:10 +00:00
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if (i>=6 && drums) {
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2022-02-27 07:58:30 +00:00
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drumState&=~(0x10>>(chan[i].note%12));
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immWrite(0x0e,0x20|drumState);
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} else {
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immWrite(0x20+i,(chan[i].freqH)/*|(chan[i].state.alg?0x20:0)*/);
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}
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2022-02-25 09:26:01 +00:00
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//chan[i].keyOn=false;
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chan[i].keyOff=false;
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}
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}
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for (int i=0; i<256; i++) {
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if (pendingWrites[i]!=oldWrites[i]) {
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immWrite(i,pendingWrites[i]&0xff);
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oldWrites[i]=pendingWrites[i];
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}
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}
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for (int i=0; i<9; i++) {
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if (chan[i].freqChanged) {
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chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,false,octave(chan[i].baseFreq));
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if (chan[i].freq>262143) chan[i].freq=262143;
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int freqt=toFreq(chan[i].freq);
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chan[i].freqH=freqt>>8;
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chan[i].freqL=freqt&0xff;
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2022-02-28 06:25:10 +00:00
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if (i<6 || !drums) {
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2022-02-27 07:58:30 +00:00
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immWrite(0x10+i,freqt&0xff);
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}
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2022-02-25 09:26:01 +00:00
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}
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2022-02-28 06:25:10 +00:00
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if (chan[i].keyOn && i>=6 && drums) {
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2022-02-27 07:58:30 +00:00
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//printf("%d\n",chan[i].note%12);
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drumState|=(0x10>>(chan[i].note%12));
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immWrite(0x0e,0x20|drumState);
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chan[i].keyOn=false;
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} else if (chan[i].keyOn || chan[i].freqChanged) {
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2022-02-25 09:26:01 +00:00
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//immWrite(0x28,0xf0|konOffs[i]);
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2022-02-26 08:27:37 +00:00
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immWrite(0x20+i,(chan[i].freqH)|(chan[i].active<<4)|(chan[i].state.alg?0x20:0));
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2022-02-25 09:26:01 +00:00
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chan[i].keyOn=false;
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}
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2022-02-26 08:27:37 +00:00
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chan[i].freqChanged=false;
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2022-02-25 09:26:01 +00:00
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}
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}
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2022-02-26 08:27:37 +00:00
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#define OPLL_C_NUM 343
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2022-02-25 09:26:01 +00:00
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int DivPlatformOPLL::octave(int freq) {
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2022-02-26 08:27:37 +00:00
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if (freq>=OPLL_C_NUM*64) {
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2022-02-25 09:26:01 +00:00
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return 128;
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*32) {
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2022-02-25 09:26:01 +00:00
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return 64;
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*16) {
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2022-02-25 09:26:01 +00:00
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return 32;
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*8) {
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2022-02-25 09:26:01 +00:00
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return 16;
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*4) {
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2022-02-25 09:26:01 +00:00
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return 8;
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*2) {
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2022-02-25 09:26:01 +00:00
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return 4;
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM) {
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2022-02-25 09:26:01 +00:00
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return 2;
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} else {
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return 1;
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}
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return 1;
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}
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int DivPlatformOPLL::toFreq(int freq) {
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2022-02-26 08:27:37 +00:00
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if (freq>=OPLL_C_NUM*64) {
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2022-02-25 09:26:01 +00:00
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return 0xe00|((freq>>7)&0x1ff);
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*32) {
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2022-02-25 09:26:01 +00:00
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return 0xc00|((freq>>6)&0x1ff);
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*16) {
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2022-02-25 09:26:01 +00:00
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return 0xa00|((freq>>5)&0x1ff);
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*8) {
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2022-02-25 09:26:01 +00:00
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return 0x800|((freq>>4)&0x1ff);
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2022-02-26 08:27:37 +00:00
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} else if (freq>=OPLL_C_NUM*4) {
|
2022-02-25 09:26:01 +00:00
|
|
|
return 0x600|((freq>>3)&0x1ff);
|
2022-02-26 08:27:37 +00:00
|
|
|
} else if (freq>=OPLL_C_NUM*2) {
|
2022-02-25 09:26:01 +00:00
|
|
|
return 0x400|((freq>>2)&0x1ff);
|
2022-02-26 08:27:37 +00:00
|
|
|
} else if (freq>=OPLL_C_NUM) {
|
2022-02-25 09:26:01 +00:00
|
|
|
return 0x200|((freq>>1)&0x1ff);
|
|
|
|
} else {
|
|
|
|
return freq&0x1ff;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::muteChannel(int ch, bool mute) {
|
|
|
|
isMuted[ch]=mute;
|
|
|
|
/*
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[ch]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[ch].state.op[j];
|
|
|
|
if (isMuted[ch]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
|
|
|
} else {
|
|
|
|
if (isOutput[chan[ch].state.alg][j]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127-(((127-op.tl)*(chan[ch].outVol&0x7f))/127));
|
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
rWrite(chanOffs[ch]+ADDR_LRAF,(isMuted[ch]?0:(chan[ch].pan<<6))|(chan[ch].state.fms&7)|((chan[ch].state.ams&3)<<4));*/
|
|
|
|
}
|
|
|
|
|
|
|
|
int DivPlatformOPLL::dispatch(DivCommand c) {
|
|
|
|
switch (c.cmd) {
|
|
|
|
case DIV_CMD_NOTE_ON: {
|
|
|
|
DivInstrument* ins=parent->getIns(chan[c.chan].ins);
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
chan[c.chan].state=ins->fm;
|
|
|
|
}
|
|
|
|
|
|
|
|
chan[c.chan].std.init(ins);
|
|
|
|
if (!chan[c.chan].std.willVol) {
|
|
|
|
chan[c.chan].outVol=chan[c.chan].vol;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[c.chan].insChanged) {
|
2022-02-26 08:27:37 +00:00
|
|
|
// update custom preset
|
|
|
|
if (chan[c.chan].state.opllPreset==0) {
|
|
|
|
DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
|
|
|
|
DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
|
|
|
|
rWrite(0x00,(mod.am<<7)|(mod.vib<<6)|((mod.ssgEnv&8)<<2)|(mod.ksr<<4)|(mod.mult));
|
|
|
|
rWrite(0x01,(car.am<<7)|(car.vib<<6)|((car.ssgEnv&8)<<2)|(car.ksr<<4)|(car.mult));
|
|
|
|
rWrite(0x02,(car.ksl<<6)|(mod.tl&63));
|
|
|
|
rWrite(0x03,(mod.ksl<<6)|((chan[c.chan].state.fms&1)<<4)|((chan[c.chan].state.ams&1)<<3)|chan[c.chan].state.fb);
|
|
|
|
rWrite(0x04,(mod.ar<<4)|(mod.dr));
|
|
|
|
rWrite(0x05,(car.ar<<4)|(car.dr));
|
|
|
|
rWrite(0x06,(mod.sl<<4)|(mod.rr));
|
|
|
|
rWrite(0x07,(car.sl<<4)|(car.rr));
|
|
|
|
}
|
2022-02-27 07:58:30 +00:00
|
|
|
if (chan[c.chan].state.opllPreset==16) { // compatible drums mode
|
2022-02-28 06:25:10 +00:00
|
|
|
if (c.chan>=6) {
|
|
|
|
drums=true;
|
|
|
|
immWrite(0x16,0x20);
|
|
|
|
immWrite(0x26,0x05);
|
|
|
|
immWrite(0x16,0x20);
|
|
|
|
immWrite(0x26,0x05);
|
|
|
|
immWrite(0x17,0x50);
|
|
|
|
immWrite(0x27,0x05);
|
|
|
|
immWrite(0x17,0x50);
|
|
|
|
immWrite(0x27,0x05);
|
|
|
|
immWrite(0x18,0xC0);
|
|
|
|
immWrite(0x28,0x01);
|
|
|
|
}
|
2022-02-27 07:58:30 +00:00
|
|
|
} else {
|
2022-02-28 06:25:10 +00:00
|
|
|
if (c.chan>=6) {
|
|
|
|
drums=false;
|
|
|
|
immWrite(0x0e,0);
|
|
|
|
}
|
2022-02-27 07:58:30 +00:00
|
|
|
rWrite(0x30+c.chan,(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15)|(chan[c.chan].state.opllPreset<<4));
|
|
|
|
}
|
2022-02-25 09:26:01 +00:00
|
|
|
}
|
2022-02-26 08:27:37 +00:00
|
|
|
|
2022-02-25 09:26:01 +00:00
|
|
|
chan[c.chan].insChanged=false;
|
|
|
|
|
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
|
|
|
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
|
|
|
chan[c.chan].note=c.value;
|
2022-02-27 07:58:30 +00:00
|
|
|
|
2022-02-28 06:25:10 +00:00
|
|
|
if (c.chan>=6 && drums) {
|
2022-02-27 07:58:30 +00:00
|
|
|
switch (chan[c.chan].note%12) {
|
|
|
|
case 0: // kick
|
|
|
|
drumVol[0]=(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15);
|
|
|
|
break;
|
|
|
|
case 1: // snare
|
|
|
|
drumVol[1]=(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15);
|
|
|
|
break;
|
|
|
|
case 2: // tom
|
|
|
|
drumVol[2]=(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15);
|
|
|
|
break;
|
|
|
|
case 3: // top
|
|
|
|
drumVol[3]=(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15);
|
|
|
|
break;
|
|
|
|
default: // hi-hat
|
|
|
|
drumVol[4]=(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
rWrite(0x36,drumVol[0]);
|
|
|
|
rWrite(0x37,drumVol[1]|(drumVol[4]<<4));
|
|
|
|
rWrite(0x38,drumVol[3]|(drumVol[2]<<4));
|
|
|
|
}
|
2022-02-25 09:26:01 +00:00
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
}
|
|
|
|
chan[c.chan].keyOn=true;
|
|
|
|
chan[c.chan].active=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_NOTE_OFF:
|
|
|
|
chan[c.chan].keyOff=true;
|
|
|
|
chan[c.chan].keyOn=false;
|
|
|
|
chan[c.chan].active=false;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_NOTE_OFF_ENV:
|
|
|
|
chan[c.chan].keyOff=true;
|
|
|
|
chan[c.chan].keyOn=false;
|
|
|
|
chan[c.chan].active=false;
|
|
|
|
chan[c.chan].std.release();
|
|
|
|
break;
|
|
|
|
case DIV_CMD_ENV_RELEASE:
|
|
|
|
chan[c.chan].std.release();
|
|
|
|
break;
|
|
|
|
case DIV_CMD_VOLUME: {
|
|
|
|
chan[c.chan].vol=c.value;
|
|
|
|
if (!chan[c.chan].std.hasVol) {
|
|
|
|
chan[c.chan].outVol=c.value;
|
|
|
|
}
|
2022-02-28 06:25:10 +00:00
|
|
|
if (c.chan<6 || !drums) {
|
2022-02-27 07:58:30 +00:00
|
|
|
rWrite(0x30+c.chan,(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15)|(chan[c.chan].state.opllPreset<<4));
|
|
|
|
}
|
2022-02-25 09:26:01 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_GET_VOLUME: {
|
|
|
|
return chan[c.chan].vol;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_INSTRUMENT:
|
|
|
|
if (chan[c.chan].ins!=c.value || c.value2==1) {
|
|
|
|
chan[c.chan].insChanged=true;
|
|
|
|
}
|
|
|
|
chan[c.chan].ins=c.value;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_PITCH: {
|
|
|
|
chan[c.chan].pitch=c.value;
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_NOTE_PORTA: {
|
|
|
|
int destFreq=NOTE_FREQUENCY(c.value2);
|
|
|
|
int newFreq;
|
|
|
|
bool return2=false;
|
|
|
|
if (destFreq>chan[c.chan].baseFreq) {
|
|
|
|
newFreq=chan[c.chan].baseFreq+c.value*octave(chan[c.chan].baseFreq);
|
|
|
|
if (newFreq>=destFreq) {
|
|
|
|
newFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
newFreq=chan[c.chan].baseFreq-c.value*octave(chan[c.chan].baseFreq);
|
|
|
|
if (newFreq<=destFreq) {
|
|
|
|
newFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
}
|
2022-02-26 08:27:37 +00:00
|
|
|
/*if (!chan[c.chan].portaPause) {
|
2022-02-25 09:26:01 +00:00
|
|
|
if (octave(chan[c.chan].baseFreq)!=octave(newFreq)) {
|
|
|
|
chan[c.chan].portaPause=true;
|
|
|
|
break;
|
|
|
|
}
|
2022-02-26 08:27:37 +00:00
|
|
|
}*/
|
2022-02-25 09:26:01 +00:00
|
|
|
chan[c.chan].baseFreq=newFreq;
|
|
|
|
chan[c.chan].portaPause=false;
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
if (return2) {
|
|
|
|
chan[c.chan].inPorta=false;
|
|
|
|
return 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_LEGATO: {
|
|
|
|
chan[c.chan].baseFreq=NOTE_FREQUENCY(c.value);
|
|
|
|
chan[c.chan].note=c.value;
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_FB: {
|
2022-02-28 08:17:33 +00:00
|
|
|
DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
|
|
|
|
//DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
|
2022-02-25 09:26:01 +00:00
|
|
|
chan[c.chan].state.fb=c.value&7;
|
2022-02-28 08:17:33 +00:00
|
|
|
rWrite(0x03,(mod.ksl<<6)|((chan[c.chan].state.fms&1)<<4)|((chan[c.chan].state.ams&1)<<3)|chan[c.chan].state.fb);
|
2022-02-25 09:26:01 +00:00
|
|
|
break;
|
|
|
|
}
|
2022-02-28 08:17:33 +00:00
|
|
|
|
2022-02-25 09:26:01 +00:00
|
|
|
case DIV_CMD_FM_MULT: {
|
2022-02-28 08:17:33 +00:00
|
|
|
if (c.value==0) {
|
|
|
|
DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
|
|
|
|
mod.mult=c.value2&15;
|
|
|
|
rWrite(0x00,(mod.am<<7)|(mod.vib<<6)|((mod.ssgEnv&8)<<2)|(mod.ksr<<4)|(mod.mult));
|
|
|
|
} else {
|
|
|
|
DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
|
|
|
|
car.mult=c.value2&15;
|
|
|
|
rWrite(0x30+c.chan,(15-(chan[c.chan].outVol*(15-chan[c.chan].state.op[1].tl))/15)|(chan[c.chan].state.opllPreset<<4));
|
|
|
|
}
|
2022-02-25 09:26:01 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_TL: {
|
2022-02-28 08:17:33 +00:00
|
|
|
if (c.value==0) {
|
|
|
|
DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
|
|
|
|
DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
|
|
|
|
mod.tl=c.value2&63;
|
|
|
|
rWrite(0x02,(car.ksl<<6)|(mod.tl&63));
|
2022-02-25 09:26:01 +00:00
|
|
|
} else {
|
2022-02-28 08:17:33 +00:00
|
|
|
DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
|
|
|
|
car.tl=c.value2&15;
|
|
|
|
rWrite(0x01,(car.am<<7)|(car.vib<<6)|((car.ssgEnv&8)<<2)|(car.ksr<<4)|(car.mult));
|
2022-02-25 09:26:01 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_AR: {
|
2022-02-28 08:17:33 +00:00
|
|
|
DivInstrumentFM::Operator& mod=chan[c.chan].state.op[0];
|
|
|
|
DivInstrumentFM::Operator& car=chan[c.chan].state.op[1];
|
2022-02-25 09:26:01 +00:00
|
|
|
if (c.value<0) {
|
2022-02-28 08:17:33 +00:00
|
|
|
mod.ar=c.value2&15;
|
|
|
|
car.ar=c.value2&15;
|
2022-02-25 09:26:01 +00:00
|
|
|
} else {
|
2022-02-28 08:17:33 +00:00
|
|
|
if (c.value==0) {
|
|
|
|
mod.ar=c.value2&15;
|
|
|
|
} else {
|
|
|
|
car.ar=c.value2&15;
|
|
|
|
}
|
2022-02-25 09:26:01 +00:00
|
|
|
}
|
2022-02-28 08:17:33 +00:00
|
|
|
rWrite(0x04,(mod.ar<<4)|(mod.dr));
|
|
|
|
rWrite(0x05,(car.ar<<4)|(car.dr));
|
2022-02-25 09:26:01 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_ALWAYS_SET_VOLUME:
|
|
|
|
return 0;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_GET_VOLMAX:
|
2022-02-26 08:27:37 +00:00
|
|
|
return 15;
|
2022-02-25 09:26:01 +00:00
|
|
|
break;
|
|
|
|
case DIV_CMD_PRE_PORTA:
|
|
|
|
chan[c.chan].inPorta=c.value;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_PRE_NOTE:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
//printf("WARNING: unimplemented command %d\n",c.cmd);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::forceIns() {
|
2022-02-26 08:27:37 +00:00
|
|
|
for (int i=0; i<9; i++) {
|
|
|
|
// update custom preset
|
|
|
|
if (chan[i].state.opllPreset==0) {
|
|
|
|
DivInstrumentFM::Operator& mod=chan[i].state.op[0];
|
|
|
|
DivInstrumentFM::Operator& car=chan[i].state.op[1];
|
|
|
|
rWrite(0x00,(mod.am<<7)|(mod.vib<<6)|((mod.ssgEnv&8)<<2)|(mod.ksr<<4)|(mod.mult));
|
|
|
|
rWrite(0x01,(car.am<<7)|(car.vib<<6)|((car.ssgEnv&8)<<2)|(car.ksr<<4)|(car.mult));
|
|
|
|
rWrite(0x02,(car.ksl<<6)|(mod.tl&63));
|
|
|
|
rWrite(0x03,(mod.ksl<<6)|((chan[i].state.fms&1)<<4)|((chan[i].state.ams&1)<<3)|chan[i].state.fb);
|
|
|
|
rWrite(0x04,(mod.ar<<4)|(mod.dr));
|
|
|
|
rWrite(0x05,(car.ar<<4)|(car.dr));
|
|
|
|
rWrite(0x06,(mod.sl<<4)|(mod.rr));
|
|
|
|
rWrite(0x07,(car.sl<<4)|(car.rr));
|
2022-02-25 09:26:01 +00:00
|
|
|
}
|
2022-02-26 08:27:37 +00:00
|
|
|
rWrite(0x30+i,(15-(chan[i].outVol*(15-chan[i].state.op[1].tl))/15)|(chan[i].state.opllPreset<<4));
|
2022-02-25 09:26:01 +00:00
|
|
|
if (chan[i].active) {
|
|
|
|
chan[i].keyOn=true;
|
|
|
|
chan[i].freqChanged=true;
|
|
|
|
}
|
|
|
|
}
|
2022-02-28 06:25:10 +00:00
|
|
|
if (drums) {
|
|
|
|
immWrite(0x16,0x20);
|
|
|
|
immWrite(0x26,0x05);
|
|
|
|
immWrite(0x16,0x20);
|
|
|
|
immWrite(0x26,0x05);
|
|
|
|
immWrite(0x17,0x50);
|
|
|
|
immWrite(0x27,0x05);
|
|
|
|
immWrite(0x17,0x50);
|
|
|
|
immWrite(0x27,0x05);
|
|
|
|
immWrite(0x18,0xC0);
|
|
|
|
immWrite(0x28,0x01);
|
|
|
|
}
|
2022-02-25 09:26:01 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::toggleRegisterDump(bool enable) {
|
|
|
|
DivDispatch::toggleRegisterDump(enable);
|
|
|
|
}
|
|
|
|
|
2022-02-28 07:19:27 +00:00
|
|
|
void DivPlatformOPLL::setVRC7(bool vrc) {
|
|
|
|
vrc7=vrc;
|
|
|
|
}
|
|
|
|
|
2022-02-28 19:13:14 +00:00
|
|
|
void DivPlatformOPLL::setProperDrums(bool pd) {
|
|
|
|
properDrums=pd;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2022-02-25 09:26:01 +00:00
|
|
|
void* DivPlatformOPLL::getChanState(int ch) {
|
|
|
|
return &chan[ch];
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned char* DivPlatformOPLL::getRegisterPool() {
|
|
|
|
return regPool;
|
|
|
|
}
|
|
|
|
|
|
|
|
int DivPlatformOPLL::getRegisterPoolSize() {
|
2022-02-26 08:27:37 +00:00
|
|
|
return 64;
|
2022-02-25 09:26:01 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::reset() {
|
|
|
|
while (!writes.empty()) writes.pop();
|
|
|
|
memset(regPool,0,256);
|
2022-02-28 07:19:27 +00:00
|
|
|
if (vrc7) {
|
|
|
|
OPLL_Reset(&fm,opll_type_ds1001);
|
|
|
|
} else {
|
|
|
|
OPLL_Reset(&fm,opll_type_ym2413);
|
|
|
|
}
|
2022-02-25 09:26:01 +00:00
|
|
|
if (dumpWrites) {
|
|
|
|
addWrite(0xffffffff,0);
|
|
|
|
}
|
|
|
|
for (int i=0; i<9; i++) {
|
|
|
|
chan[i]=DivPlatformOPLL::Channel();
|
|
|
|
chan[i].vol=15;
|
|
|
|
chan[i].outVol=15;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i=0; i<256; i++) {
|
|
|
|
oldWrites[i]=-1;
|
|
|
|
pendingWrites[i]=-1;
|
|
|
|
}
|
|
|
|
|
|
|
|
lastBusy=60;
|
2022-02-27 07:58:30 +00:00
|
|
|
drumState=0;
|
|
|
|
|
|
|
|
drumVol[0]=0;
|
|
|
|
drumVol[1]=0;
|
|
|
|
drumVol[2]=0;
|
|
|
|
drumVol[3]=0;
|
|
|
|
drumVol[4]=0;
|
2022-02-25 09:26:01 +00:00
|
|
|
|
|
|
|
delay=0;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool DivPlatformOPLL::keyOffAffectsArp(int ch) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool DivPlatformOPLL::keyOffAffectsPorta(int ch) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::notifyInsChange(int ins) {
|
|
|
|
for (int i=0; i<9; i++) {
|
|
|
|
if (chan[i].ins==ins) {
|
|
|
|
chan[i].insChanged=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::notifyInsDeletion(void* ins) {
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::poke(unsigned int addr, unsigned short val) {
|
|
|
|
immWrite(addr,val);
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::poke(std::vector<DivRegWrite>& wlist) {
|
|
|
|
for (DivRegWrite& i: wlist) immWrite(i.addr,i.val);
|
|
|
|
}
|
|
|
|
|
|
|
|
int DivPlatformOPLL::getPortaFloor(int ch) {
|
|
|
|
return (ch>5)?12:0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::setYMFM(bool use) {
|
|
|
|
useYMFM=use;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::setFlags(unsigned int flags) {
|
|
|
|
if (flags==3) {
|
|
|
|
chipClock=COLOR_NTSC;
|
|
|
|
} else if (flags==2) {
|
|
|
|
chipClock=8000000.0;
|
|
|
|
} else if (flags==1) {
|
2022-02-26 04:59:08 +00:00
|
|
|
chipClock=COLOR_PAL*1.0/5.0;
|
2022-02-25 09:26:01 +00:00
|
|
|
} else {
|
2022-02-26 04:59:08 +00:00
|
|
|
chipClock=COLOR_NTSC/4.0;
|
2022-02-25 09:26:01 +00:00
|
|
|
}
|
2022-02-27 07:58:30 +00:00
|
|
|
rate=chipClock/9;
|
2022-02-25 09:26:01 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int DivPlatformOPLL::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
|
|
|
|
parent=p;
|
|
|
|
dumpWrites=false;
|
|
|
|
skipRegisterWrites=false;
|
|
|
|
for (int i=0; i<9; i++) {
|
|
|
|
isMuted[i]=false;
|
|
|
|
}
|
|
|
|
setFlags(flags);
|
|
|
|
|
|
|
|
reset();
|
|
|
|
return 10;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformOPLL::quit() {
|
|
|
|
}
|
|
|
|
|
|
|
|
DivPlatformOPLL::~DivPlatformOPLL() {
|
|
|
|
}
|