mirror of
https://github.com/tildearrow/furnace.git
synced 2024-11-27 23:13:01 +00:00
221 lines
6.9 KiB
C
221 lines
6.9 KiB
C
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/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:45:49 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_twiddle_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -n 8 -name t1bv_8 -include dft/simd/t1b.h -sign 1 */
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/*
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* This function contains 33 FP additions, 24 FP multiplications,
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* (or, 23 additions, 14 multiplications, 10 fused multiply/add),
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* 24 stack variables, 1 constants, and 16 memory accesses
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*/
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#include "dft/simd/t1b.h"
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static void t1bv_8(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP707106781, +0.707106781186547524400844362104849039284835938);
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{
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INT m;
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R *x;
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x = ii;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 14)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 14), MAKE_VOLATILE_STRIDE(8, rs)) {
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V T4, Tq, Tl, Tr, T9, Tt, Te, Tu, T1, T3, T2;
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T1 = LD(&(x[0]), ms, &(x[0]));
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T2 = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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T3 = BYTW(&(W[TWVL * 6]), T2);
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T4 = VSUB(T1, T3);
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Tq = VADD(T1, T3);
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{
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V Ti, Tk, Th, Tj;
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Th = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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Ti = BYTW(&(W[TWVL * 2]), Th);
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Tj = LD(&(x[WS(rs, 6)]), ms, &(x[0]));
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Tk = BYTW(&(W[TWVL * 10]), Tj);
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Tl = VSUB(Ti, Tk);
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Tr = VADD(Ti, Tk);
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}
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{
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V T6, T8, T5, T7;
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T5 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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T6 = BYTW(&(W[0]), T5);
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T7 = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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T8 = BYTW(&(W[TWVL * 8]), T7);
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T9 = VSUB(T6, T8);
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Tt = VADD(T6, T8);
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}
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{
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V Tb, Td, Ta, Tc;
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Ta = LD(&(x[WS(rs, 7)]), ms, &(x[WS(rs, 1)]));
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Tb = BYTW(&(W[TWVL * 12]), Ta);
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Tc = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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Td = BYTW(&(W[TWVL * 4]), Tc);
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Te = VSUB(Tb, Td);
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Tu = VADD(Tb, Td);
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}
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{
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V Ts, Tv, Tw, Tx;
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Ts = VSUB(Tq, Tr);
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Tv = VSUB(Tt, Tu);
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ST(&(x[WS(rs, 6)]), VFNMSI(Tv, Ts), ms, &(x[0]));
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ST(&(x[WS(rs, 2)]), VFMAI(Tv, Ts), ms, &(x[0]));
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Tw = VADD(Tq, Tr);
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Tx = VADD(Tt, Tu);
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ST(&(x[WS(rs, 4)]), VSUB(Tw, Tx), ms, &(x[0]));
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ST(&(x[0]), VADD(Tw, Tx), ms, &(x[0]));
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{
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V Tg, To, Tn, Tp, Tf, Tm;
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Tf = VADD(T9, Te);
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Tg = VFNMS(LDK(KP707106781), Tf, T4);
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To = VFMA(LDK(KP707106781), Tf, T4);
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Tm = VSUB(T9, Te);
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Tn = VFNMS(LDK(KP707106781), Tm, Tl);
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Tp = VFMA(LDK(KP707106781), Tm, Tl);
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ST(&(x[WS(rs, 3)]), VFNMSI(Tn, Tg), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 7)]), VFNMSI(Tp, To), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 5)]), VFMAI(Tn, Tg), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 1)]), VFMAI(Tp, To), ms, &(x[WS(rs, 1)]));
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}
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 2),
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VTW(0, 3),
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VTW(0, 4),
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VTW(0, 5),
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VTW(0, 6),
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VTW(0, 7),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 8, XSIMD_STRING("t1bv_8"), twinstr, &GENUS, { 23, 14, 10, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t1bv_8) (planner *p) {
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X(kdft_dit_register) (p, t1bv_8, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_twiddle_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 8 -name t1bv_8 -include dft/simd/t1b.h -sign 1 */
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/*
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* This function contains 33 FP additions, 16 FP multiplications,
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* (or, 33 additions, 16 multiplications, 0 fused multiply/add),
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* 24 stack variables, 1 constants, and 16 memory accesses
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*/
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#include "dft/simd/t1b.h"
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static void t1bv_8(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP707106781, +0.707106781186547524400844362104849039284835938);
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{
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INT m;
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R *x;
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x = ii;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 14)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 14), MAKE_VOLATILE_STRIDE(8, rs)) {
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V Tl, Tq, Tg, Tr, T5, Tt, Ta, Tu, Ti, Tk, Tj;
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Ti = LD(&(x[0]), ms, &(x[0]));
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Tj = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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Tk = BYTW(&(W[TWVL * 6]), Tj);
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Tl = VSUB(Ti, Tk);
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Tq = VADD(Ti, Tk);
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{
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V Td, Tf, Tc, Te;
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Tc = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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Td = BYTW(&(W[TWVL * 2]), Tc);
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Te = LD(&(x[WS(rs, 6)]), ms, &(x[0]));
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Tf = BYTW(&(W[TWVL * 10]), Te);
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Tg = VSUB(Td, Tf);
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Tr = VADD(Td, Tf);
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}
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{
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V T2, T4, T1, T3;
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T1 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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T2 = BYTW(&(W[0]), T1);
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T3 = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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T4 = BYTW(&(W[TWVL * 8]), T3);
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T5 = VSUB(T2, T4);
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Tt = VADD(T2, T4);
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}
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{
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V T7, T9, T6, T8;
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T6 = LD(&(x[WS(rs, 7)]), ms, &(x[WS(rs, 1)]));
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T7 = BYTW(&(W[TWVL * 12]), T6);
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T8 = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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T9 = BYTW(&(W[TWVL * 4]), T8);
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Ta = VSUB(T7, T9);
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Tu = VADD(T7, T9);
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}
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{
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V Ts, Tv, Tw, Tx;
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Ts = VSUB(Tq, Tr);
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Tv = VBYI(VSUB(Tt, Tu));
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ST(&(x[WS(rs, 6)]), VSUB(Ts, Tv), ms, &(x[0]));
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ST(&(x[WS(rs, 2)]), VADD(Ts, Tv), ms, &(x[0]));
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Tw = VADD(Tq, Tr);
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Tx = VADD(Tt, Tu);
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ST(&(x[WS(rs, 4)]), VSUB(Tw, Tx), ms, &(x[0]));
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ST(&(x[0]), VADD(Tw, Tx), ms, &(x[0]));
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{
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V Th, To, Tn, Tp, Tb, Tm;
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Tb = VMUL(LDK(KP707106781), VSUB(T5, Ta));
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Th = VBYI(VSUB(Tb, Tg));
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To = VBYI(VADD(Tg, Tb));
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Tm = VMUL(LDK(KP707106781), VADD(T5, Ta));
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Tn = VSUB(Tl, Tm);
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Tp = VADD(Tl, Tm);
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ST(&(x[WS(rs, 3)]), VADD(Th, Tn), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 7)]), VSUB(Tp, To), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 5)]), VSUB(Tn, Th), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 1)]), VADD(To, Tp), ms, &(x[WS(rs, 1)]));
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}
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 2),
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VTW(0, 3),
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VTW(0, 4),
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VTW(0, 5),
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VTW(0, 6),
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VTW(0, 7),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 8, XSIMD_STRING("t1bv_8"), twinstr, &GENUS, { 33, 16, 0, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t1bv_8) (planner *p) {
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X(kdft_dit_register) (p, t1bv_8, &desc);
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}
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#endif
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