mirror of
https://github.com/tildearrow/furnace.git
synced 2024-12-04 18:27:25 +00:00
525 lines
17 KiB
C
525 lines
17 KiB
C
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/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:45:51 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_twiddle_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -n 20 -name t1bv_20 -include dft/simd/t1b.h -sign 1 */
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/*
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* This function contains 123 FP additions, 88 FP multiplications,
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* (or, 77 additions, 42 multiplications, 46 fused multiply/add),
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* 54 stack variables, 4 constants, and 40 memory accesses
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*/
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#include "dft/simd/t1b.h"
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static void t1bv_20(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP559016994, +0.559016994374947424102293417182819058860154590);
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DVK(KP618033988, +0.618033988749894848204586834365638117720309180);
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DVK(KP951056516, +0.951056516295153572116439333379382143405698634);
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DVK(KP250000000, +0.250000000000000000000000000000000000000000000);
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{
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INT m;
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R *x;
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x = ii;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 38)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 38), MAKE_VOLATILE_STRIDE(20, rs)) {
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V T4, TX, T1m, T1K, TF, T14, T15, TQ, Tf, Tq, Tr, T1O, T1P, T1Q, T1w;
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V T1z, T1A, TY, TZ, T10, T1L, T1M, T1N, T1p, T1s, T1t, T1i, T1j;
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{
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V T1, TW, T3, TU, TV, T2, TT, T1k, T1l;
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T1 = LD(&(x[0]), ms, &(x[0]));
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TV = LD(&(x[WS(rs, 15)]), ms, &(x[WS(rs, 1)]));
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TW = BYTW(&(W[TWVL * 28]), TV);
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T2 = LD(&(x[WS(rs, 10)]), ms, &(x[0]));
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T3 = BYTW(&(W[TWVL * 18]), T2);
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TT = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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TU = BYTW(&(W[TWVL * 8]), TT);
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T4 = VSUB(T1, T3);
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TX = VSUB(TU, TW);
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T1k = VADD(T1, T3);
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T1l = VADD(TU, TW);
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T1m = VSUB(T1k, T1l);
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T1K = VADD(T1k, T1l);
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}
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{
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V T9, T1n, TK, T1v, TP, T1y, Te, T1q, Tk, T1u, Tz, T1o, TE, T1r, Tp;
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V T1x;
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{
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V T6, T8, T5, T7;
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T5 = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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T6 = BYTW(&(W[TWVL * 6]), T5);
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T7 = LD(&(x[WS(rs, 14)]), ms, &(x[0]));
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T8 = BYTW(&(W[TWVL * 26]), T7);
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T9 = VSUB(T6, T8);
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T1n = VADD(T6, T8);
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}
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{
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V TH, TJ, TG, TI;
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TG = LD(&(x[WS(rs, 13)]), ms, &(x[WS(rs, 1)]));
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TH = BYTW(&(W[TWVL * 24]), TG);
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TI = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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TJ = BYTW(&(W[TWVL * 4]), TI);
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TK = VSUB(TH, TJ);
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T1v = VADD(TH, TJ);
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}
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{
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V TM, TO, TL, TN;
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TL = LD(&(x[WS(rs, 17)]), ms, &(x[WS(rs, 1)]));
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TM = BYTW(&(W[TWVL * 32]), TL);
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TN = LD(&(x[WS(rs, 7)]), ms, &(x[WS(rs, 1)]));
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TO = BYTW(&(W[TWVL * 12]), TN);
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TP = VSUB(TM, TO);
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T1y = VADD(TM, TO);
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}
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{
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V Tb, Td, Ta, Tc;
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Ta = LD(&(x[WS(rs, 16)]), ms, &(x[0]));
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Tb = BYTW(&(W[TWVL * 30]), Ta);
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Tc = LD(&(x[WS(rs, 6)]), ms, &(x[0]));
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Td = BYTW(&(W[TWVL * 10]), Tc);
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Te = VSUB(Tb, Td);
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T1q = VADD(Tb, Td);
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}
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{
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V Th, Tj, Tg, Ti;
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Tg = LD(&(x[WS(rs, 8)]), ms, &(x[0]));
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Th = BYTW(&(W[TWVL * 14]), Tg);
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Ti = LD(&(x[WS(rs, 18)]), ms, &(x[0]));
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Tj = BYTW(&(W[TWVL * 34]), Ti);
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Tk = VSUB(Th, Tj);
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T1u = VADD(Th, Tj);
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}
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{
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V Tw, Ty, Tv, Tx;
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Tv = LD(&(x[WS(rs, 9)]), ms, &(x[WS(rs, 1)]));
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Tw = BYTW(&(W[TWVL * 16]), Tv);
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Tx = LD(&(x[WS(rs, 19)]), ms, &(x[WS(rs, 1)]));
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Ty = BYTW(&(W[TWVL * 36]), Tx);
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Tz = VSUB(Tw, Ty);
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T1o = VADD(Tw, Ty);
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}
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{
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V TB, TD, TA, TC;
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TA = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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TB = BYTW(&(W[0]), TA);
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TC = LD(&(x[WS(rs, 11)]), ms, &(x[WS(rs, 1)]));
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TD = BYTW(&(W[TWVL * 20]), TC);
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TE = VSUB(TB, TD);
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T1r = VADD(TB, TD);
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}
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{
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V Tm, To, Tl, Tn;
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Tl = LD(&(x[WS(rs, 12)]), ms, &(x[0]));
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Tm = BYTW(&(W[TWVL * 22]), Tl);
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Tn = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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To = BYTW(&(W[TWVL * 2]), Tn);
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Tp = VSUB(Tm, To);
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T1x = VADD(Tm, To);
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}
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TF = VSUB(Tz, TE);
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T14 = VSUB(T9, Te);
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T15 = VSUB(Tk, Tp);
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TQ = VSUB(TK, TP);
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Tf = VADD(T9, Te);
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Tq = VADD(Tk, Tp);
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Tr = VADD(Tf, Tq);
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T1O = VADD(T1u, T1v);
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T1P = VADD(T1x, T1y);
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T1Q = VADD(T1O, T1P);
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T1w = VSUB(T1u, T1v);
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T1z = VSUB(T1x, T1y);
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T1A = VADD(T1w, T1z);
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TY = VADD(Tz, TE);
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TZ = VADD(TK, TP);
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T10 = VADD(TY, TZ);
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T1L = VADD(T1n, T1o);
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T1M = VADD(T1q, T1r);
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T1N = VADD(T1L, T1M);
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T1p = VSUB(T1n, T1o);
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T1s = VSUB(T1q, T1r);
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T1t = VADD(T1p, T1s);
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}
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T1i = VADD(T4, Tr);
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T1j = VADD(TX, T10);
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ST(&(x[WS(rs, 15)]), VFNMSI(T1j, T1i), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 5)]), VFMAI(T1j, T1i), ms, &(x[WS(rs, 1)]));
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{
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V T1T, T1R, T1S, T1X, T1Z, T1V, T1W, T1Y, T1U;
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T1T = VSUB(T1N, T1Q);
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T1R = VADD(T1N, T1Q);
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T1S = VFNMS(LDK(KP250000000), T1R, T1K);
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T1V = VSUB(T1L, T1M);
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T1W = VSUB(T1O, T1P);
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T1X = VMUL(LDK(KP951056516), VFMA(LDK(KP618033988), T1W, T1V));
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T1Z = VMUL(LDK(KP951056516), VFNMS(LDK(KP618033988), T1V, T1W));
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ST(&(x[0]), VADD(T1K, T1R), ms, &(x[0]));
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T1Y = VFNMS(LDK(KP559016994), T1T, T1S);
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ST(&(x[WS(rs, 8)]), VFMAI(T1Z, T1Y), ms, &(x[0]));
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ST(&(x[WS(rs, 12)]), VFNMSI(T1Z, T1Y), ms, &(x[0]));
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T1U = VFMA(LDK(KP559016994), T1T, T1S);
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ST(&(x[WS(rs, 4)]), VFNMSI(T1X, T1U), ms, &(x[0]));
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ST(&(x[WS(rs, 16)]), VFMAI(T1X, T1U), ms, &(x[0]));
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}
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{
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V T1D, T1B, T1C, T1H, T1J, T1F, T1G, T1I, T1E;
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T1D = VSUB(T1t, T1A);
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T1B = VADD(T1t, T1A);
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T1C = VFNMS(LDK(KP250000000), T1B, T1m);
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T1F = VSUB(T1w, T1z);
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T1G = VSUB(T1p, T1s);
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T1H = VMUL(LDK(KP951056516), VFNMS(LDK(KP618033988), T1G, T1F));
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T1J = VMUL(LDK(KP951056516), VFMA(LDK(KP618033988), T1F, T1G));
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ST(&(x[WS(rs, 10)]), VADD(T1m, T1B), ms, &(x[0]));
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T1I = VFMA(LDK(KP559016994), T1D, T1C);
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ST(&(x[WS(rs, 6)]), VFMAI(T1J, T1I), ms, &(x[0]));
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ST(&(x[WS(rs, 14)]), VFNMSI(T1J, T1I), ms, &(x[0]));
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T1E = VFNMS(LDK(KP559016994), T1D, T1C);
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ST(&(x[WS(rs, 2)]), VFNMSI(T1H, T1E), ms, &(x[0]));
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ST(&(x[WS(rs, 18)]), VFMAI(T1H, T1E), ms, &(x[0]));
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}
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{
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V TR, T16, T1e, T1b, T13, T1d, Tu, T1a;
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TR = VFMA(LDK(KP618033988), TQ, TF);
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T16 = VFMA(LDK(KP618033988), T15, T14);
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T1e = VFNMS(LDK(KP618033988), T14, T15);
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T1b = VFNMS(LDK(KP618033988), TF, TQ);
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{
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V T11, T12, Ts, Tt;
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T11 = VFNMS(LDK(KP250000000), T10, TX);
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T12 = VSUB(TY, TZ);
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T13 = VFMA(LDK(KP559016994), T12, T11);
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T1d = VFNMS(LDK(KP559016994), T12, T11);
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Ts = VFNMS(LDK(KP250000000), Tr, T4);
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Tt = VSUB(Tf, Tq);
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Tu = VFMA(LDK(KP559016994), Tt, Ts);
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T1a = VFNMS(LDK(KP559016994), Tt, Ts);
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}
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{
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V TS, T17, T1g, T1h;
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TS = VFNMS(LDK(KP951056516), TR, Tu);
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T17 = VFMA(LDK(KP951056516), T16, T13);
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ST(&(x[WS(rs, 19)]), VFNMSI(T17, TS), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 1)]), VFMAI(T17, TS), ms, &(x[WS(rs, 1)]));
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T1g = VFNMS(LDK(KP951056516), T1b, T1a);
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T1h = VFMA(LDK(KP951056516), T1e, T1d);
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ST(&(x[WS(rs, 7)]), VFNMSI(T1h, T1g), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 13)]), VFMAI(T1h, T1g), ms, &(x[WS(rs, 1)]));
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}
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{
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V T18, T19, T1c, T1f;
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T18 = VFMA(LDK(KP951056516), TR, Tu);
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T19 = VFNMS(LDK(KP951056516), T16, T13);
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ST(&(x[WS(rs, 11)]), VFNMSI(T19, T18), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 9)]), VFMAI(T19, T18), ms, &(x[WS(rs, 1)]));
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T1c = VFMA(LDK(KP951056516), T1b, T1a);
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T1f = VFNMS(LDK(KP951056516), T1e, T1d);
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ST(&(x[WS(rs, 3)]), VFNMSI(T1f, T1c), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 17)]), VFMAI(T1f, T1c), ms, &(x[WS(rs, 1)]));
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}
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 2),
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VTW(0, 3),
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VTW(0, 4),
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VTW(0, 5),
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VTW(0, 6),
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VTW(0, 7),
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VTW(0, 8),
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VTW(0, 9),
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VTW(0, 10),
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VTW(0, 11),
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VTW(0, 12),
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VTW(0, 13),
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VTW(0, 14),
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VTW(0, 15),
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VTW(0, 16),
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VTW(0, 17),
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VTW(0, 18),
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VTW(0, 19),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 20, XSIMD_STRING("t1bv_20"), twinstr, &GENUS, { 77, 42, 46, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t1bv_20) (planner *p) {
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X(kdft_dit_register) (p, t1bv_20, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_twiddle_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 20 -name t1bv_20 -include dft/simd/t1b.h -sign 1 */
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/*
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||
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* This function contains 123 FP additions, 62 FP multiplications,
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||
|
|
* (or, 111 additions, 50 multiplications, 12 fused multiply/add),
|
||
|
|
* 54 stack variables, 4 constants, and 40 memory accesses
|
||
|
|
*/
|
||
|
|
#include "dft/simd/t1b.h"
|
||
|
|
|
||
|
|
static void t1bv_20(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
|
||
|
|
{
|
||
|
|
DVK(KP587785252, +0.587785252292473129168705954639072768597652438);
|
||
|
|
DVK(KP951056516, +0.951056516295153572116439333379382143405698634);
|
||
|
|
DVK(KP250000000, +0.250000000000000000000000000000000000000000000);
|
||
|
|
DVK(KP559016994, +0.559016994374947424102293417182819058860154590);
|
||
|
|
{
|
||
|
|
INT m;
|
||
|
|
R *x;
|
||
|
|
x = ii;
|
||
|
|
for (m = mb, W = W + (mb * ((TWVL / VL) * 38)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 38), MAKE_VOLATILE_STRIDE(20, rs)) {
|
||
|
|
V T4, T10, T1B, T1R, TF, T14, T15, TQ, Tf, Tq, Tr, T1N, T1O, T1P, T1t;
|
||
|
|
V T1w, T1D, TT, TU, T11, T1K, T1L, T1M, T1m, T1p, T1C, T1i, T1j;
|
||
|
|
{
|
||
|
|
V T1, TZ, T3, TX, TY, T2, TW, T1z, T1A;
|
||
|
|
T1 = LD(&(x[0]), ms, &(x[0]));
|
||
|
|
TY = LD(&(x[WS(rs, 15)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
TZ = BYTW(&(W[TWVL * 28]), TY);
|
||
|
|
T2 = LD(&(x[WS(rs, 10)]), ms, &(x[0]));
|
||
|
|
T3 = BYTW(&(W[TWVL * 18]), T2);
|
||
|
|
TW = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
TX = BYTW(&(W[TWVL * 8]), TW);
|
||
|
|
T4 = VSUB(T1, T3);
|
||
|
|
T10 = VSUB(TX, TZ);
|
||
|
|
T1z = VADD(T1, T3);
|
||
|
|
T1A = VADD(TX, TZ);
|
||
|
|
T1B = VSUB(T1z, T1A);
|
||
|
|
T1R = VADD(T1z, T1A);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V T9, T1k, TK, T1s, TP, T1v, Te, T1n, Tk, T1r, Tz, T1l, TE, T1o, Tp;
|
||
|
|
V T1u;
|
||
|
|
{
|
||
|
|
V T6, T8, T5, T7;
|
||
|
|
T5 = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
|
||
|
|
T6 = BYTW(&(W[TWVL * 6]), T5);
|
||
|
|
T7 = LD(&(x[WS(rs, 14)]), ms, &(x[0]));
|
||
|
|
T8 = BYTW(&(W[TWVL * 26]), T7);
|
||
|
|
T9 = VSUB(T6, T8);
|
||
|
|
T1k = VADD(T6, T8);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V TH, TJ, TG, TI;
|
||
|
|
TG = LD(&(x[WS(rs, 13)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
TH = BYTW(&(W[TWVL * 24]), TG);
|
||
|
|
TI = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
TJ = BYTW(&(W[TWVL * 4]), TI);
|
||
|
|
TK = VSUB(TH, TJ);
|
||
|
|
T1s = VADD(TH, TJ);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V TM, TO, TL, TN;
|
||
|
|
TL = LD(&(x[WS(rs, 17)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
TM = BYTW(&(W[TWVL * 32]), TL);
|
||
|
|
TN = LD(&(x[WS(rs, 7)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
TO = BYTW(&(W[TWVL * 12]), TN);
|
||
|
|
TP = VSUB(TM, TO);
|
||
|
|
T1v = VADD(TM, TO);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V Tb, Td, Ta, Tc;
|
||
|
|
Ta = LD(&(x[WS(rs, 16)]), ms, &(x[0]));
|
||
|
|
Tb = BYTW(&(W[TWVL * 30]), Ta);
|
||
|
|
Tc = LD(&(x[WS(rs, 6)]), ms, &(x[0]));
|
||
|
|
Td = BYTW(&(W[TWVL * 10]), Tc);
|
||
|
|
Te = VSUB(Tb, Td);
|
||
|
|
T1n = VADD(Tb, Td);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V Th, Tj, Tg, Ti;
|
||
|
|
Tg = LD(&(x[WS(rs, 8)]), ms, &(x[0]));
|
||
|
|
Th = BYTW(&(W[TWVL * 14]), Tg);
|
||
|
|
Ti = LD(&(x[WS(rs, 18)]), ms, &(x[0]));
|
||
|
|
Tj = BYTW(&(W[TWVL * 34]), Ti);
|
||
|
|
Tk = VSUB(Th, Tj);
|
||
|
|
T1r = VADD(Th, Tj);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V Tw, Ty, Tv, Tx;
|
||
|
|
Tv = LD(&(x[WS(rs, 9)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
Tw = BYTW(&(W[TWVL * 16]), Tv);
|
||
|
|
Tx = LD(&(x[WS(rs, 19)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
Ty = BYTW(&(W[TWVL * 36]), Tx);
|
||
|
|
Tz = VSUB(Tw, Ty);
|
||
|
|
T1l = VADD(Tw, Ty);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V TB, TD, TA, TC;
|
||
|
|
TA = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
TB = BYTW(&(W[0]), TA);
|
||
|
|
TC = LD(&(x[WS(rs, 11)]), ms, &(x[WS(rs, 1)]));
|
||
|
|
TD = BYTW(&(W[TWVL * 20]), TC);
|
||
|
|
TE = VSUB(TB, TD);
|
||
|
|
T1o = VADD(TB, TD);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V Tm, To, Tl, Tn;
|
||
|
|
Tl = LD(&(x[WS(rs, 12)]), ms, &(x[0]));
|
||
|
|
Tm = BYTW(&(W[TWVL * 22]), Tl);
|
||
|
|
Tn = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
|
||
|
|
To = BYTW(&(W[TWVL * 2]), Tn);
|
||
|
|
Tp = VSUB(Tm, To);
|
||
|
|
T1u = VADD(Tm, To);
|
||
|
|
}
|
||
|
|
TF = VSUB(Tz, TE);
|
||
|
|
T14 = VSUB(T9, Te);
|
||
|
|
T15 = VSUB(Tk, Tp);
|
||
|
|
TQ = VSUB(TK, TP);
|
||
|
|
Tf = VADD(T9, Te);
|
||
|
|
Tq = VADD(Tk, Tp);
|
||
|
|
Tr = VADD(Tf, Tq);
|
||
|
|
T1N = VADD(T1r, T1s);
|
||
|
|
T1O = VADD(T1u, T1v);
|
||
|
|
T1P = VADD(T1N, T1O);
|
||
|
|
T1t = VSUB(T1r, T1s);
|
||
|
|
T1w = VSUB(T1u, T1v);
|
||
|
|
T1D = VADD(T1t, T1w);
|
||
|
|
TT = VADD(Tz, TE);
|
||
|
|
TU = VADD(TK, TP);
|
||
|
|
T11 = VADD(TT, TU);
|
||
|
|
T1K = VADD(T1k, T1l);
|
||
|
|
T1L = VADD(T1n, T1o);
|
||
|
|
T1M = VADD(T1K, T1L);
|
||
|
|
T1m = VSUB(T1k, T1l);
|
||
|
|
T1p = VSUB(T1n, T1o);
|
||
|
|
T1C = VADD(T1m, T1p);
|
||
|
|
}
|
||
|
|
T1i = VADD(T4, Tr);
|
||
|
|
T1j = VBYI(VADD(T10, T11));
|
||
|
|
ST(&(x[WS(rs, 15)]), VSUB(T1i, T1j), ms, &(x[WS(rs, 1)]));
|
||
|
|
ST(&(x[WS(rs, 5)]), VADD(T1i, T1j), ms, &(x[WS(rs, 1)]));
|
||
|
|
{
|
||
|
|
V T1Q, T1S, T1T, T1X, T1Z, T1V, T1W, T1Y, T1U;
|
||
|
|
T1Q = VMUL(LDK(KP559016994), VSUB(T1M, T1P));
|
||
|
|
T1S = VADD(T1M, T1P);
|
||
|
|
T1T = VFNMS(LDK(KP250000000), T1S, T1R);
|
||
|
|
T1V = VSUB(T1K, T1L);
|
||
|
|
T1W = VSUB(T1N, T1O);
|
||
|
|
T1X = VBYI(VFMA(LDK(KP951056516), T1V, VMUL(LDK(KP587785252), T1W)));
|
||
|
|
T1Z = VBYI(VFNMS(LDK(KP951056516), T1W, VMUL(LDK(KP587785252), T1V)));
|
||
|
|
ST(&(x[0]), VADD(T1R, T1S), ms, &(x[0]));
|
||
|
|
T1Y = VSUB(T1T, T1Q);
|
||
|
|
ST(&(x[WS(rs, 8)]), VSUB(T1Y, T1Z), ms, &(x[0]));
|
||
|
|
ST(&(x[WS(rs, 12)]), VADD(T1Z, T1Y), ms, &(x[0]));
|
||
|
|
T1U = VADD(T1Q, T1T);
|
||
|
|
ST(&(x[WS(rs, 4)]), VSUB(T1U, T1X), ms, &(x[0]));
|
||
|
|
ST(&(x[WS(rs, 16)]), VADD(T1X, T1U), ms, &(x[0]));
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V T1G, T1E, T1F, T1y, T1I, T1q, T1x, T1J, T1H;
|
||
|
|
T1G = VMUL(LDK(KP559016994), VSUB(T1C, T1D));
|
||
|
|
T1E = VADD(T1C, T1D);
|
||
|
|
T1F = VFNMS(LDK(KP250000000), T1E, T1B);
|
||
|
|
T1q = VSUB(T1m, T1p);
|
||
|
|
T1x = VSUB(T1t, T1w);
|
||
|
|
T1y = VBYI(VFNMS(LDK(KP951056516), T1x, VMUL(LDK(KP587785252), T1q)));
|
||
|
|
T1I = VBYI(VFMA(LDK(KP951056516), T1q, VMUL(LDK(KP587785252), T1x)));
|
||
|
|
ST(&(x[WS(rs, 10)]), VADD(T1B, T1E), ms, &(x[0]));
|
||
|
|
T1J = VADD(T1G, T1F);
|
||
|
|
ST(&(x[WS(rs, 6)]), VADD(T1I, T1J), ms, &(x[0]));
|
||
|
|
ST(&(x[WS(rs, 14)]), VSUB(T1J, T1I), ms, &(x[0]));
|
||
|
|
T1H = VSUB(T1F, T1G);
|
||
|
|
ST(&(x[WS(rs, 2)]), VADD(T1y, T1H), ms, &(x[0]));
|
||
|
|
ST(&(x[WS(rs, 18)]), VSUB(T1H, T1y), ms, &(x[0]));
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V TR, T16, T1d, T1b, T13, T1e, Tu, T1a;
|
||
|
|
TR = VFNMS(LDK(KP951056516), TQ, VMUL(LDK(KP587785252), TF));
|
||
|
|
T16 = VFNMS(LDK(KP951056516), T15, VMUL(LDK(KP587785252), T14));
|
||
|
|
T1d = VFMA(LDK(KP951056516), T14, VMUL(LDK(KP587785252), T15));
|
||
|
|
T1b = VFMA(LDK(KP951056516), TF, VMUL(LDK(KP587785252), TQ));
|
||
|
|
{
|
||
|
|
V TV, T12, Ts, Tt;
|
||
|
|
TV = VMUL(LDK(KP559016994), VSUB(TT, TU));
|
||
|
|
T12 = VFNMS(LDK(KP250000000), T11, T10);
|
||
|
|
T13 = VSUB(TV, T12);
|
||
|
|
T1e = VADD(TV, T12);
|
||
|
|
Ts = VFNMS(LDK(KP250000000), Tr, T4);
|
||
|
|
Tt = VMUL(LDK(KP559016994), VSUB(Tf, Tq));
|
||
|
|
Tu = VSUB(Ts, Tt);
|
||
|
|
T1a = VADD(Tt, Ts);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V TS, T17, T1g, T1h;
|
||
|
|
TS = VSUB(Tu, TR);
|
||
|
|
T17 = VBYI(VSUB(T13, T16));
|
||
|
|
ST(&(x[WS(rs, 17)]), VSUB(TS, T17), ms, &(x[WS(rs, 1)]));
|
||
|
|
ST(&(x[WS(rs, 3)]), VADD(TS, T17), ms, &(x[WS(rs, 1)]));
|
||
|
|
T1g = VADD(T1a, T1b);
|
||
|
|
T1h = VBYI(VSUB(T1e, T1d));
|
||
|
|
ST(&(x[WS(rs, 11)]), VSUB(T1g, T1h), ms, &(x[WS(rs, 1)]));
|
||
|
|
ST(&(x[WS(rs, 9)]), VADD(T1g, T1h), ms, &(x[WS(rs, 1)]));
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V T18, T19, T1c, T1f;
|
||
|
|
T18 = VADD(Tu, TR);
|
||
|
|
T19 = VBYI(VADD(T16, T13));
|
||
|
|
ST(&(x[WS(rs, 13)]), VSUB(T18, T19), ms, &(x[WS(rs, 1)]));
|
||
|
|
ST(&(x[WS(rs, 7)]), VADD(T18, T19), ms, &(x[WS(rs, 1)]));
|
||
|
|
T1c = VSUB(T1a, T1b);
|
||
|
|
T1f = VBYI(VADD(T1d, T1e));
|
||
|
|
ST(&(x[WS(rs, 19)]), VSUB(T1c, T1f), ms, &(x[WS(rs, 1)]));
|
||
|
|
ST(&(x[WS(rs, 1)]), VADD(T1c, T1f), ms, &(x[WS(rs, 1)]));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
VLEAVE();
|
||
|
|
}
|
||
|
|
|
||
|
|
static const tw_instr twinstr[] = {
|
||
|
|
VTW(0, 1),
|
||
|
|
VTW(0, 2),
|
||
|
|
VTW(0, 3),
|
||
|
|
VTW(0, 4),
|
||
|
|
VTW(0, 5),
|
||
|
|
VTW(0, 6),
|
||
|
|
VTW(0, 7),
|
||
|
|
VTW(0, 8),
|
||
|
|
VTW(0, 9),
|
||
|
|
VTW(0, 10),
|
||
|
|
VTW(0, 11),
|
||
|
|
VTW(0, 12),
|
||
|
|
VTW(0, 13),
|
||
|
|
VTW(0, 14),
|
||
|
|
VTW(0, 15),
|
||
|
|
VTW(0, 16),
|
||
|
|
VTW(0, 17),
|
||
|
|
VTW(0, 18),
|
||
|
|
VTW(0, 19),
|
||
|
|
{ TW_NEXT, VL, 0 }
|
||
|
|
};
|
||
|
|
|
||
|
|
static const ct_desc desc = { 20, XSIMD_STRING("t1bv_20"), twinstr, &GENUS, { 111, 50, 12, 0 }, 0, 0, 0 };
|
||
|
|
|
||
|
|
void XSIMD(codelet_t1bv_20) (planner *p) {
|
||
|
|
X(kdft_dit_register) (p, t1bv_20, &desc);
|
||
|
|
}
|
||
|
|
#endif
|