2022-05-11 08:41:02 +00:00
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/**
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* Furnace Tracker - multi-system chiptune tracker
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* Copyright (C) 2021-2022 tildearrow and contributors
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "ym2608.h"
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#include "sound/ymfm/ymfm.h"
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#include "../engine.h"
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2022-05-13 07:52:43 +00:00
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#include "../../ta-log.h"
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2022-05-11 08:41:02 +00:00
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#include <string.h>
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#include <math.h>
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2022-05-13 07:52:43 +00:00
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const char* regCheatSheetYM2608[]={
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2022-05-11 08:41:02 +00:00
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// SSG
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"SSG_FreqL_A", "000",
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"SSG_FreqH_A", "001",
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"SSG_FreqL_B", "002",
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"SSG_FreqH_B", "003",
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"SSG_FreqL_C", "004",
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"SSG_FreqH_C", "005",
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"SSG_FreqNoise", "006",
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"SSG_Enable", "007",
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"SSG_Volume_A", "008",
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"SSG_Volume_B", "009",
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"SSG_Volume_C", "00A",
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"SSG_FreqL_Env", "00B",
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"SSG_FreqH_Env", "00C",
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"SSG_Control_Env", "00D",
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// ADPCM-B
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"ADPCMB_Control", "010",
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"ADPCMB_L_R", "011",
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"ADPCMB_StartL", "012",
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"ADPCMB_StartH", "013",
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"ADPCMB_EndL", "014",
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"ADPCMB_EndH", "015",
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"ADPCMB_FreqL", "019",
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"ADPCMB_FreqH", "01A",
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"ADPCMB_Volume", "01B",
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"ADPCM_Flag", "01C",
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// FM (Common)
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"FM_Test", "021",
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"FM_LFOFreq", "022",
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"ClockA1", "024",
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"ClockA2", "025",
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"ClockB", "026",
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"FM_Control", "027",
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"FM_NoteCtl", "028",
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// FM (Channel 1-3)
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"FM1_Op1_DT_MULT", "030",
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"FM2_Op1_DT_MULT", "031",
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"FM3_Op1_DT_MULT", "032",
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"FM1_Op2_DT_MULT", "034",
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"FM2_Op2_DT_MULT", "035",
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"FM3_Op2_DT_MULT", "036",
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"FM1_Op3_DT_MULT", "038",
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"FM2_Op3_DT_MULT", "039",
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"FM3_Op3_DT_MULT", "03A",
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"FM1_Op4_DT_MULT", "03C",
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"FM2_Op4_DT_MULT", "03D",
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"FM3_Op4_DT_MULT", "03E",
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"FM1_Op1_TL", "040",
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"FM2_Op1_TL", "041",
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"FM3_Op1_TL", "042",
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"FM1_Op2_TL", "044",
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"FM2_Op2_TL", "045",
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"FM3_Op2_TL", "046",
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"FM1_Op3_TL", "048",
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"FM2_Op3_TL", "049",
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"FM3_Op3_TL", "04A",
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"FM1_Op4_TL", "04C",
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"FM2_Op4_TL", "04D",
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"FM3_Op4_TL", "04E",
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"FM1_Op1_KS_AR", "050",
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"FM2_Op1_KS_AR", "051",
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"FM3_Op1_KS_AR", "052",
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"FM1_Op2_KS_AR", "054",
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"FM2_Op2_KS_AR", "055",
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"FM3_Op2_KS_AR", "056",
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"FM1_Op3_KS_AR", "058",
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"FM2_Op3_KS_AR", "059",
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"FM3_Op3_KS_AR", "05A",
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"FM1_Op4_KS_AR", "05C",
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"FM2_Op4_KS_AR", "05D",
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"FM3_Op4_KS_AR", "05E",
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"FM1_Op1_AM_DR", "060",
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"FM2_Op1_AM_DR", "061",
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"FM3_Op1_AM_DR", "062",
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"FM1_Op2_AM_DR", "064",
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"FM2_Op2_AM_DR", "065",
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"FM3_Op2_AM_DR", "066",
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"FM1_Op3_AM_DR", "068",
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"FM2_Op3_AM_DR", "069",
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"FM3_Op3_AM_DR", "06A",
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"FM1_Op4_AM_DR", "06C",
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"FM2_Op4_AM_DR", "06D",
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"FM3_Op4_AM_DR", "06E",
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"FM1_Op1_SR", "070",
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"FM2_Op1_SR", "071",
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"FM3_Op1_SR", "072",
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"FM1_Op2_SR", "074",
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"FM2_Op2_SR", "075",
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"FM3_Op2_SR", "076",
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"FM1_Op3_SR", "078",
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"FM2_Op3_SR", "079",
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"FM3_Op3_SR", "07A",
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"FM1_Op4_SR", "07C",
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"FM2_Op4_SR", "07D",
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"FM3_Op4_SR", "07E",
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"FM1_Op1_SL_RR", "080",
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"FM2_Op1_SL_RR", "081",
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"FM3_Op1_SL_RR", "082",
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"FM1_Op2_SL_RR", "084",
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"FM2_Op2_SL_RR", "085",
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"FM3_Op2_SL_RR", "086",
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"FM1_Op3_SL_RR", "088",
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"FM2_Op3_SL_RR", "089",
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"FM3_Op3_SL_RR", "08A",
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"FM1_Op4_SL_RR", "08C",
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"FM2_Op4_SL_RR", "08D",
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"FM3_Op4_SL_RR", "08E",
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"FM1_Op1_SSG_EG", "090",
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"FM2_Op1_SSG_EG", "091",
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"FM3_Op1_SSG_EG", "092",
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"FM1_Op2_SSG_EG", "094",
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"FM2_Op2_SSG_EG", "095",
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"FM3_Op2_SSG_EG", "096",
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"FM1_Op3_SSG_EG", "098",
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"FM2_Op3_SSG_EG", "099",
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"FM3_Op3_SSG_EG", "09A",
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"FM1_Op4_SSG_EG", "09C",
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"FM2_Op4_SSG_EG", "09D",
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"FM3_Op4_SSG_EG", "09E",
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"FM1_FNum1", "0A0",
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"FM2_FNum1", "0A1",
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"FM3_(Op1)FNum1", "0A2",
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"FM1_FNum2", "0A4",
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"FM2_FNum2", "0A5",
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"FM3_(Op1)FNum2", "0A6",
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"FM3_Op2_FNum1", "0A8",
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"FM3_Op3_FNum1", "0A9",
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"FM3_Op4_FNum1", "0AA",
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"FM3_Op2_FNum2", "0AC",
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"FM3_Op3_FNum2", "0AD",
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"FM3_Op4_FNum2", "0AE",
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"FM1_FB_ALG", "0B0",
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"FM2_FB_ALG", "0B1",
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"FM3_FB_ALG", "0B2",
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"FM1_Pan_LFO", "0B4",
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"FM2_Pan_LFO", "0B5",
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"FM3_Pan_LFO", "0B6",
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// ADPCM-A
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"ADPCMA_Control", "100",
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"ADPCMA_MVol", "101",
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"ADPCMA_Test", "102",
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"ADPCMA_Ch1_Vol", "108",
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"ADPCMA_Ch2_Vol", "109",
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"ADPCMA_Ch3_Vol", "10A",
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"ADPCMA_Ch4_Vol", "10B",
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"ADPCMA_Ch5_Vol", "10C",
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"ADPCMA_Ch6_Vol", "10D",
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// FM (Channel 4-6)
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"FM4_Op1_DT_MULT", "130",
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"FM5_Op1_DT_MULT", "131",
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"FM6_Op1_DT_MULT", "132",
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"FM4_Op2_DT_MULT", "134",
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"FM5_Op2_DT_MULT", "135",
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"FM6_Op2_DT_MULT", "136",
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"FM4_Op3_DT_MULT", "138",
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"FM5_Op3_DT_MULT", "139",
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"FM6_Op3_DT_MULT", "13A",
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"FM4_Op4_DT_MULT", "13C",
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"FM5_Op4_DT_MULT", "13D",
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"FM6_Op4_DT_MULT", "13E",
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"FM4_Op1_TL", "140",
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"FM5_Op1_TL", "141",
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"FM6_Op1_TL", "142",
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"FM4_Op2_TL", "144",
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"FM5_Op2_TL", "145",
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"FM6_Op2_TL", "146",
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"FM4_Op3_TL", "148",
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"FM5_Op3_TL", "149",
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"FM6_Op3_TL", "14A",
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"FM4_Op4_TL", "14C",
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"FM5_Op4_TL", "14D",
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"FM6_Op4_TL", "14E",
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"FM4_Op1_KS_AR", "150",
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"FM5_Op1_KS_AR", "151",
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"FM6_Op1_KS_AR", "152",
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"FM4_Op2_KS_AR", "154",
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"FM5_Op2_KS_AR", "155",
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"FM6_Op2_KS_AR", "156",
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"FM4_Op3_KS_AR", "158",
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"FM5_Op3_KS_AR", "159",
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"FM6_Op3_KS_AR", "15A",
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"FM4_Op4_KS_AR", "15C",
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"FM5_Op4_KS_AR", "15D",
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"FM6_Op4_KS_AR", "15E",
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"FM4_Op1_AM_DR", "160",
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"FM5_Op1_AM_DR", "161",
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"FM6_Op1_AM_DR", "162",
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"FM4_Op2_AM_DR", "164",
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"FM5_Op2_AM_DR", "165",
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"FM6_Op2_AM_DR", "166",
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"FM4_Op3_AM_DR", "168",
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"FM5_Op3_AM_DR", "169",
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"FM6_Op3_AM_DR", "16A",
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"FM4_Op4_AM_DR", "16C",
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"FM5_Op4_AM_DR", "16D",
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"FM6_Op4_AM_DR", "16E",
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"FM4_Op1_SR", "170",
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"FM5_Op1_SR", "171",
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"FM6_Op1_SR", "172",
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"FM4_Op2_SR", "174",
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"FM5_Op2_SR", "175",
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"FM6_Op2_SR", "176",
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"FM4_Op3_SR", "178",
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"FM5_Op3_SR", "179",
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"FM6_Op3_SR", "17A",
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"FM4_Op4_SR", "17C",
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"FM5_Op4_SR", "17D",
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"FM6_Op4_SR", "17E",
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"FM4_Op1_SL_RR", "180",
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"FM5_Op1_SL_RR", "181",
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"FM6_Op1_SL_RR", "182",
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"FM4_Op2_SL_RR", "184",
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"FM5_Op2_SL_RR", "185",
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"FM6_Op2_SL_RR", "186",
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"FM4_Op3_SL_RR", "188",
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"FM5_Op3_SL_RR", "189",
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"FM6_Op3_SL_RR", "18A",
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"FM4_Op4_SL_RR", "18C",
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"FM5_Op4_SL_RR", "18D",
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"FM6_Op4_SL_RR", "18E",
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"FM4_Op1_SSG_EG", "190",
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"FM5_Op1_SSG_EG", "191",
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"FM6_Op1_SSG_EG", "192",
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"FM4_Op2_SSG_EG", "194",
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"FM5_Op2_SSG_EG", "195",
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"FM6_Op2_SSG_EG", "196",
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"FM4_Op3_SSG_EG", "198",
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"FM5_Op3_SSG_EG", "199",
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"FM6_Op3_SSG_EG", "19A",
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"FM4_Op4_SSG_EG", "19C",
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"FM5_Op4_SSG_EG", "19D",
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"FM6_Op4_SSG_EG", "19E",
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"FM4_FNum1", "1A0",
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"FM5_FNum1", "1A1",
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"FM6_FNum1", "1A2",
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"FM4_FNum2", "1A4",
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"FM5_FNum2", "1A5",
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"FM6_FNum2", "1A6",
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"FM4_FB_ALG", "1B0",
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"FM5_FB_ALG", "1B1",
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"FM6_FB_ALG", "1B2",
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"FM4_Pan_LFO", "1B4",
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"FM5_Pan_LFO", "1B5",
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"FM6_Pan_LFO", "1B6",
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NULL
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};
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2022-05-13 07:52:43 +00:00
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const char** DivPlatformYM2608::getRegisterSheet() {
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return regCheatSheetYM2608;
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2022-05-11 08:41:02 +00:00
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}
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2022-05-13 07:52:43 +00:00
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const char* DivPlatformYM2608::getEffectName(unsigned char effect) {
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2022-05-11 08:41:02 +00:00
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switch (effect) {
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case 0x10:
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return "10xy: Setup LFO (x: enable; y: speed)";
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break;
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case 0x11:
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return "11xx: Set feedback (0 to 7)";
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break;
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case 0x12:
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return "12xx: Set level of operator 1 (0 highest, 7F lowest)";
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break;
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case 0x13:
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return "13xx: Set level of operator 2 (0 highest, 7F lowest)";
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break;
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case 0x14:
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return "14xx: Set level of operator 3 (0 highest, 7F lowest)";
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break;
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case 0x15:
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return "15xx: Set level of operator 4 (0 highest, 7F lowest)";
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break;
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case 0x16:
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return "16xy: Set operator multiplier (x: operator from 1 to 4; y: multiplier)";
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break;
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case 0x18:
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return "18xx: Toggle extended channel 3 mode";
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break;
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case 0x19:
|
|
|
|
return "19xx: Set attack of all operators (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x1a:
|
|
|
|
return "1Axx: Set attack of operator 1 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x1b:
|
|
|
|
return "1Bxx: Set attack of operator 2 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x1c:
|
|
|
|
return "1Cxx: Set attack of operator 3 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x1d:
|
|
|
|
return "1Dxx: Set attack of operator 4 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x20:
|
|
|
|
return "20xx: Set SSG channel mode (bit 0: square; bit 1: noise; bit 2: envelope)";
|
|
|
|
break;
|
|
|
|
case 0x21:
|
|
|
|
return "21xx: Set SSG noise frequency (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x22:
|
|
|
|
return "22xy: Set SSG envelope mode (x: shape, y: enable for this channel)";
|
|
|
|
break;
|
|
|
|
case 0x23:
|
|
|
|
return "23xx: Set SSG envelope period low byte";
|
|
|
|
break;
|
|
|
|
case 0x24:
|
|
|
|
return "24xx: Set SSG envelope period high byte";
|
|
|
|
break;
|
|
|
|
case 0x25:
|
|
|
|
return "25xx: SSG envelope slide up";
|
|
|
|
break;
|
|
|
|
case 0x26:
|
|
|
|
return "26xx: SSG envelope slide down";
|
|
|
|
break;
|
|
|
|
case 0x29:
|
|
|
|
return "29xy: Set SSG auto-envelope (x: numerator; y: denominator)";
|
|
|
|
break;
|
|
|
|
case 0x30:
|
|
|
|
return "30xx: Toggle hard envelope reset on new notes";
|
|
|
|
break;
|
|
|
|
case 0x50:
|
|
|
|
return "50xy: Set AM (x: operator from 1 to 4 (0 for all ops); y: AM)";
|
|
|
|
break;
|
|
|
|
case 0x51:
|
|
|
|
return "51xy: Set sustain level (x: operator from 1 to 4 (0 for all ops); y: sustain)";
|
|
|
|
break;
|
|
|
|
case 0x52:
|
|
|
|
return "52xy: Set release (x: operator from 1 to 4 (0 for all ops); y: release)";
|
|
|
|
break;
|
|
|
|
case 0x53:
|
|
|
|
return "53xy: Set detune (x: operator from 1 to 4 (0 for all ops); y: detune where 3 is center)";
|
|
|
|
break;
|
|
|
|
case 0x54:
|
|
|
|
return "54xy: Set envelope scale (x: operator from 1 to 4 (0 for all ops); y: scale from 0 to 3)";
|
|
|
|
break;
|
|
|
|
case 0x55:
|
|
|
|
return "55xy: Set SSG envelope (x: operator from 1 to 4 (0 for all ops); y: 0-7 on, 8 off)";
|
|
|
|
break;
|
|
|
|
case 0x56:
|
|
|
|
return "56xx: Set decay of all operators (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x57:
|
|
|
|
return "57xx: Set decay of operator 1 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x58:
|
|
|
|
return "58xx: Set decay of operator 2 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x59:
|
|
|
|
return "59xx: Set decay of operator 3 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x5a:
|
|
|
|
return "5Axx: Set decay of operator 4 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x5b:
|
|
|
|
return "5Bxx: Set decay 2 of all operators (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x5c:
|
|
|
|
return "5Cxx: Set decay 2 of operator 1 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x5d:
|
|
|
|
return "5Dxx: Set decay 2 of operator 2 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x5e:
|
|
|
|
return "5Exx: Set decay 2 of operator 3 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
case 0x5f:
|
|
|
|
return "5Fxx: Set decay 2 of operator 4 (0 to 1F)";
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
double DivPlatformYM2608::NOTE_OPNB(int ch, int note) {
|
2022-05-11 08:41:02 +00:00
|
|
|
if (ch>8) { // ADPCM-B
|
|
|
|
return NOTE_ADPCMB(note);
|
|
|
|
} else if (ch>5) { // PSG
|
|
|
|
return NOTE_PERIODIC(note);
|
|
|
|
}
|
|
|
|
// FM
|
|
|
|
return NOTE_FNUM_BLOCK(note,11);
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
double DivPlatformYM2608::NOTE_ADPCMB(int note) {
|
2022-05-11 08:41:02 +00:00
|
|
|
if (chan[15].sample>=0 && chan[15].sample<parent->song.sampleLen) {
|
|
|
|
double off=65535.0*(double)(parent->getSample(chan[15].sample)->centerRate)/8363.0;
|
|
|
|
return parent->calcBaseFreq((double)chipClock/144,off,note,false);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::acquire(short* bufL, short* bufR, size_t start, size_t len) {
|
2022-05-11 08:41:02 +00:00
|
|
|
static int os[2];
|
|
|
|
|
2022-05-14 06:09:24 +00:00
|
|
|
ymfm::ym2608::fm_engine* fme=fm->debug_fm_engine();
|
2022-05-11 08:41:02 +00:00
|
|
|
ymfm::ssg_engine* ssge=fm->debug_ssg_engine();
|
|
|
|
ymfm::adpcm_a_engine* aae=fm->debug_adpcm_a_engine();
|
|
|
|
ymfm::adpcm_b_engine* abe=fm->debug_adpcm_b_engine();
|
|
|
|
|
|
|
|
ymfm::ssg_engine::output_data ssgOut;
|
|
|
|
|
|
|
|
ymfm::fm_channel<ymfm::opn_registers_base<true>>* fmChan[6];
|
|
|
|
ymfm::adpcm_a_channel* adpcmAChan[6];
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
fmChan[i]=fme->debug_channel(i);
|
|
|
|
adpcmAChan[i]=aae->debug_channel(i);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (size_t h=start; h<start+len; h++) {
|
|
|
|
os[0]=0; os[1]=0;
|
|
|
|
if (!writes.empty()) {
|
|
|
|
if (--delay<1) {
|
|
|
|
QueuedWrite& w=writes.front();
|
|
|
|
fm->write(0x0+((w.addr>>8)<<1),w.addr);
|
|
|
|
fm->write(0x1+((w.addr>>8)<<1),w.val);
|
|
|
|
regPool[w.addr&0x1ff]=w.val;
|
Prepare for reducing duplicates for 4op FM related codes, Add and correct bunch of presets, Add various clock, type options for chips
Prepare for reducing duplicates for 4op FM related codes
Add and correct bunch of presets
- mostly based on MAME source.
- Neo Geo AES uses slightly difference clock for NTSC, PAL colorbust frequency.
- Turbosound FM + SAA: Some Turbosound FM has additional SAA1099, for additional sound channel and Plays SAM coupe tune?
- PC-98:
- Sound Orchestra: OPN with hardpanned stereo, some model has with OPL family FM addons.
V variation has Y8950 and supports ADPCM.
- Sound Blaster 16 for PC-9800: This famous PC sound card is also exists for PC-98, with optional OPN PC-9801-26(K) compatibility on some models.
- IBM PCjr: PC with SN PSG sound, but less popular than previous models, and compatible Tandy 1000.
- Tandy 1000: PCjr and previous IBM PC compatible, also has SN PSG (later embedded in their ASIC, like Sega).
- Hexion: One of konami's budget arcade hardware with SCC + MSM6295 sound system, like their amusement hardware in this era.
- DJ Boy, Atari JSA IIIs, Skimaxx: How to panning sound or plays stereo sound on MSM6295 - just use MSM6295s per each output!
- Air Buster: One of arcade hardware with OPN + MSM6295 sound system, Used this configuration is also some hardwares.
- Tecmo system: One of arcade hardware with pretty unique sound system: OPL3, YMZ280B, MSM6295; first 2 entry is mostly used in music, last entry is mostly used in sound effect.
- Sunsoft Shanghai 3: Predecessor of Sunsoft Arcade is using YM2149 rather than FM, MSM6295 is still there.
- Atari Klax: example of arcade hardware sound system with single MSM6295 only.
- Ikari warriors: This early SNK Triple-Z80 hardware uses 2 OPL1s and no ADPCM supports.
- Coreland Cyber Tank: This rare arcade machine's stereo sound is like SB Pro, but it's actually produced in 2 Y8950s.
- Data East MLC: Latest arcade hardware from Data East, with single YMZ280B for sound.
- Kaneko Jackie Chan: Predecessor of Super Kaneko Nova System hardware, also with YMZ280B.
- Super Kaneko Nova System: Latest arcade hardware from Kaneko, with single YMZ280B for sound. this announced 3D acceleration addon, but finally cancelled.
- Toaplan 1: Home of Late 80-Early 90s Good ol' stuffs, Example of arcade sound system with single OPL2
- Namco Pac-Land: and this era, Namco start to change Custom 15 WSG to their Custom 30 WSG with featured RAM based waveform, and mailbox feature.
- Namco System 1: One of latest usage of Custom 30 WSG, with OPM FM hardware and 8 bit DAC and Stereo output.
Add various clock, type options for chips
- SN7: Prepare to add 17 bit noise variation, Game gear stereo extentsion, NCR PSG variation (MAME core only for now)
- OPN, OPNA: Add placeholder for prescaler option
- OPL: Prepare for OPL3L, OPL4 downscaled output rate option
2022-06-06 10:04:52 +00:00
|
|
|
writes.pop_front();
|
2022-05-11 08:41:02 +00:00
|
|
|
delay=4;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
fm->generate(&fmout);
|
|
|
|
|
|
|
|
os[0]=fmout.data[0]+(fmout.data[2]>>1);
|
|
|
|
if (os[0]<-32768) os[0]=-32768;
|
|
|
|
if (os[0]>32767) os[0]=32767;
|
|
|
|
|
|
|
|
os[1]=fmout.data[1]+(fmout.data[2]>>1);
|
|
|
|
if (os[1]<-32768) os[1]=-32768;
|
|
|
|
if (os[1]>32767) os[1]=32767;
|
|
|
|
|
|
|
|
bufL[h]=os[0];
|
|
|
|
bufR[h]=os[1];
|
|
|
|
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
oscBuf[i]->data[oscBuf[i]->needle++]=(fmChan[i]->debug_output(0)+fmChan[i]->debug_output(1));
|
|
|
|
}
|
|
|
|
|
|
|
|
ssge->get_last_out(ssgOut);
|
|
|
|
for (int i=6; i<9; i++) {
|
|
|
|
oscBuf[i]->data[oscBuf[i]->needle++]=ssgOut.data[i-6];
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i=9; i<15; i++) {
|
|
|
|
oscBuf[i]->data[oscBuf[i]->needle++]=adpcmAChan[i-9]->get_last_out(0)+adpcmAChan[i-9]->get_last_out(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
oscBuf[15]->data[oscBuf[15]->needle++]=abe->get_last_out(0)+abe->get_last_out(1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::tick(bool sysTick) {
|
2022-05-11 08:41:02 +00:00
|
|
|
// PSG
|
|
|
|
ay->tick(sysTick);
|
|
|
|
ay->flushWrites();
|
|
|
|
for (DivRegWrite& i: ay->getRegisterWrites()) {
|
|
|
|
immWrite(i.addr&15,i.val);
|
|
|
|
}
|
|
|
|
ay->getRegisterWrites().clear();
|
|
|
|
|
|
|
|
// FM
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
if (i==2 && extMode) continue;
|
|
|
|
chan[i].std.next();
|
|
|
|
|
|
|
|
if (chan[i].std.vol.had) {
|
2022-06-01 23:02:34 +00:00
|
|
|
chan[i].outVol=VOL_SCALE_LOG(chan[i].vol,MIN(127,chan[i].std.vol.val),127);
|
2022-05-11 08:41:02 +00:00
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
2022-05-11 08:41:02 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[i].std.arp.had) {
|
|
|
|
if (!chan[i].inPorta) {
|
|
|
|
if (chan[i].std.arp.mode) {
|
|
|
|
chan[i].baseFreq=NOTE_FNUM_BLOCK(chan[i].std.arp.val,11);
|
|
|
|
} else {
|
|
|
|
chan[i].baseFreq=NOTE_FNUM_BLOCK(chan[i].note+(signed char)chan[i].std.arp.val,11);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[i].freqChanged=true;
|
|
|
|
} else {
|
|
|
|
if (chan[i].std.arp.mode && chan[i].std.arp.finished) {
|
|
|
|
chan[i].baseFreq=NOTE_FNUM_BLOCK(chan[i].note,11);
|
|
|
|
chan[i].freqChanged=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[i].std.panL.had) {
|
|
|
|
chan[i].pan=chan[i].std.panL.val&3;
|
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[i].std.pitch.had) {
|
|
|
|
if (chan[i].std.pitch.mode) {
|
|
|
|
chan[i].pitch2+=chan[i].std.pitch.val;
|
2022-05-23 03:47:40 +00:00
|
|
|
CLAMP_VAR(chan[i].pitch2,-32768,32767);
|
2022-05-11 08:41:02 +00:00
|
|
|
} else {
|
|
|
|
chan[i].pitch2=chan[i].std.pitch.val;
|
|
|
|
}
|
|
|
|
chan[i].freqChanged=true;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[i].std.phaseReset.had) {
|
2022-05-22 09:30:56 +00:00
|
|
|
if (chan[i].std.phaseReset.val==1 && chan[i].active) {
|
2022-05-11 08:41:02 +00:00
|
|
|
chan[i].keyOn=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[i].std.alg.had) {
|
|
|
|
chan[i].state.alg=chan[i].std.alg.val;
|
|
|
|
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
|
|
|
if (!parent->song.algMacroBehavior) for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
|
|
|
if (isMuted[i]) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,127);
|
|
|
|
} else {
|
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
2022-05-11 08:41:02 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (chan[i].std.fb.had) {
|
|
|
|
chan[i].state.fb=chan[i].std.fb.val;
|
|
|
|
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
|
|
|
}
|
|
|
|
if (chan[i].std.fms.had) {
|
|
|
|
chan[i].state.fms=chan[i].std.fms.val;
|
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
|
|
|
}
|
|
|
|
if (chan[i].std.ams.had) {
|
|
|
|
chan[i].state.ams=chan[i].std.ams.val;
|
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
|
|
|
}
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
|
|
|
DivMacroInt::IntOp& m=chan[i].std.op[j];
|
|
|
|
if (m.am.had) {
|
|
|
|
op.am=m.am.val;
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
if (m.ar.had) {
|
|
|
|
op.ar=m.ar.val;
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
|
|
|
if (m.dr.had) {
|
|
|
|
op.dr=m.dr.val;
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
if (m.mult.had) {
|
|
|
|
op.mult=m.mult.val;
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
|
|
|
if (m.rr.had) {
|
|
|
|
op.rr=m.rr.val;
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
if (m.sl.had) {
|
|
|
|
op.sl=m.sl.val;
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
if (m.tl.had) {
|
|
|
|
op.tl=127-m.tl.val;
|
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
2022-05-11 08:41:02 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (m.rs.had) {
|
|
|
|
op.rs=m.rs.val;
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
|
|
|
if (m.dt.had) {
|
|
|
|
op.dt=m.dt.val;
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
|
|
|
if (m.d2r.had) {
|
|
|
|
op.d2r=m.d2r.val;
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
}
|
|
|
|
if (m.ssg.had) {
|
|
|
|
op.ssgEnv=m.ssg.val;
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[i].keyOn || chan[i].keyOff) {
|
|
|
|
if (chan[i].hardReset && chan[i].keyOn) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
immWrite(baseAddr+ADDR_SL_RR,0x0f);
|
|
|
|
immWrite(baseAddr+ADDR_TL,0x7f);
|
|
|
|
oldWrites[baseAddr+ADDR_SL_RR]=-1;
|
|
|
|
oldWrites[baseAddr+ADDR_TL]=-1;
|
|
|
|
//rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
immWrite(0x28,0x00|konOffs[i]);
|
|
|
|
if (chan[i].hardReset && chan[i].keyOn) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
for (int k=0; k<100; k++) {
|
|
|
|
immWrite(baseAddr+ADDR_SL_RR,0x0f);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[i].keyOff=false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// ADPCM-B
|
|
|
|
if (chan[15].furnacePCM) {
|
|
|
|
chan[15].std.next();
|
|
|
|
|
|
|
|
if (chan[15].std.vol.had) {
|
|
|
|
chan[15].outVol=(chan[15].vol*MIN(64,chan[15].std.vol.val))/64;
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x10b,chan[15].outVol);
|
2022-05-11 08:41:02 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[15].std.arp.had) {
|
|
|
|
if (!chan[15].inPorta) {
|
|
|
|
if (chan[15].std.arp.mode) {
|
|
|
|
chan[15].baseFreq=NOTE_ADPCMB(chan[15].std.arp.val);
|
|
|
|
} else {
|
|
|
|
chan[15].baseFreq=NOTE_ADPCMB(chan[15].note+(signed char)chan[15].std.arp.val);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[15].freqChanged=true;
|
|
|
|
} else {
|
|
|
|
if (chan[15].std.arp.mode && chan[15].std.arp.finished) {
|
|
|
|
chan[15].baseFreq=NOTE_ADPCMB(chan[15].note);
|
|
|
|
chan[15].freqChanged=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (chan[15].freqChanged) {
|
|
|
|
if (chan[15].sample>=0 && chan[15].sample<parent->song.sampleLen) {
|
|
|
|
double off=65535.0*(double)(parent->getSample(chan[15].sample)->centerRate)/8363.0;
|
|
|
|
chan[15].freq=parent->calcFreq(chan[15].baseFreq,chan[15].pitch,false,4,chan[15].pitch2,(double)chipClock/144,off);
|
|
|
|
} else {
|
|
|
|
chan[15].freq=0;
|
|
|
|
}
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x109,chan[15].freq&0xff);
|
|
|
|
immWrite(0x10a,(chan[15].freq>>8)&0xff);
|
2022-05-11 08:41:02 +00:00
|
|
|
chan[15].freqChanged=false;
|
|
|
|
}
|
|
|
|
|
2022-05-14 06:02:28 +00:00
|
|
|
if (writeRSSOff) {
|
|
|
|
immWrite(0x10,0x80|writeRSSOff);
|
|
|
|
writeRSSOff=0;
|
|
|
|
}
|
|
|
|
|
2022-05-11 08:41:02 +00:00
|
|
|
for (int i=16; i<512; i++) {
|
|
|
|
if (pendingWrites[i]!=oldWrites[i]) {
|
|
|
|
immWrite(i,pendingWrites[i]&0xff);
|
|
|
|
oldWrites[i]=pendingWrites[i];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
if (i==2 && extMode) continue;
|
|
|
|
if (chan[i].freqChanged) {
|
|
|
|
if (parent->song.linearPitch==2) {
|
|
|
|
chan[i].freq=parent->calcFreq(chan[i].baseFreq,chan[i].pitch,false,4,chan[i].pitch2,chipClock,CHIP_FREQBASE,11);
|
|
|
|
} else {
|
|
|
|
int fNum=parent->calcFreq(chan[i].baseFreq&0x7ff,chan[i].pitch,false,4,chan[i].pitch2);
|
|
|
|
int block=(chan[i].baseFreq&0xf800)>>11;
|
|
|
|
if (fNum<0) fNum=0;
|
|
|
|
if (fNum>2047) {
|
|
|
|
while (block<7) {
|
|
|
|
fNum>>=1;
|
|
|
|
block++;
|
|
|
|
}
|
|
|
|
if (fNum>2047) fNum=2047;
|
|
|
|
}
|
|
|
|
chan[i].freq=(block<<11)|fNum;
|
|
|
|
}
|
|
|
|
if (chan[i].freq>0x3fff) chan[i].freq=0x3fff;
|
|
|
|
immWrite(chanOffs[i]+ADDR_FREQH,chan[i].freq>>8);
|
|
|
|
immWrite(chanOffs[i]+ADDR_FREQ,chan[i].freq&0xff);
|
|
|
|
chan[i].freqChanged=false;
|
|
|
|
}
|
|
|
|
if (chan[i].keyOn) {
|
|
|
|
immWrite(0x28,0xf0|konOffs[i]);
|
|
|
|
chan[i].keyOn=false;
|
|
|
|
}
|
|
|
|
}
|
2022-05-14 06:02:28 +00:00
|
|
|
|
|
|
|
if (writeRSSOn) {
|
|
|
|
immWrite(0x10,writeRSSOn);
|
|
|
|
writeRSSOn=0;
|
|
|
|
}
|
2022-05-11 08:41:02 +00:00
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
int DivPlatformYM2608::dispatch(DivCommand c) {
|
2022-05-11 08:41:02 +00:00
|
|
|
if (c.chan>5 && c.chan<9) {
|
|
|
|
c.chan-=6;
|
|
|
|
return ay->dispatch(c);
|
|
|
|
}
|
|
|
|
switch (c.cmd) {
|
|
|
|
case DIV_CMD_NOTE_ON: {
|
|
|
|
if (c.chan>14) { // ADPCM-B
|
|
|
|
DivInstrument* ins=parent->getIns(chan[c.chan].ins,DIV_INS_FM);
|
|
|
|
if (ins->type==DIV_INS_AMIGA) {
|
|
|
|
chan[c.chan].furnacePCM=true;
|
|
|
|
} else {
|
|
|
|
chan[c.chan].furnacePCM=false;
|
|
|
|
}
|
|
|
|
if (skipRegisterWrites) break;
|
|
|
|
if (chan[c.chan].furnacePCM) {
|
|
|
|
chan[c.chan].macroInit(ins);
|
|
|
|
if (!chan[c.chan].std.vol.will) {
|
|
|
|
chan[c.chan].outVol=chan[c.chan].vol;
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x10b,chan[c.chan].outVol);
|
2022-05-11 08:41:02 +00:00
|
|
|
}
|
2022-05-14 04:04:40 +00:00
|
|
|
chan[c.chan].sample=ins->amiga.getSample(c.value);
|
2022-05-11 08:41:02 +00:00
|
|
|
if (chan[c.chan].sample>=0 && chan[c.chan].sample<parent->song.sampleLen) {
|
|
|
|
DivSample* s=parent->getSample(chan[c.chan].sample);
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x102,(s->offB>>5)&0xff);
|
|
|
|
immWrite(0x103,(s->offB>>13)&0xff);
|
2022-05-11 08:41:02 +00:00
|
|
|
int end=s->offB+s->lengthB-1;
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x104,(end>>5)&0xff);
|
|
|
|
immWrite(0x105,(end>>13)&0xff);
|
|
|
|
immWrite(0x101,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|2);
|
|
|
|
immWrite(0x100,(s->loopStart>=0)?0xb0:0xa0); // start/repeat
|
2022-05-11 08:41:02 +00:00
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
|
|
|
chan[c.chan].note=c.value;
|
|
|
|
chan[c.chan].baseFreq=NOTE_ADPCMB(chan[c.chan].note);
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
}
|
|
|
|
chan[c.chan].active=true;
|
|
|
|
chan[c.chan].keyOn=true;
|
|
|
|
} else {
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x100,0x01); // reset
|
|
|
|
immWrite(0x102,0);
|
|
|
|
immWrite(0x103,0);
|
|
|
|
immWrite(0x104,0);
|
|
|
|
immWrite(0x105,0);
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
chan[c.chan].sample=-1;
|
|
|
|
chan[c.chan].macroInit(NULL);
|
|
|
|
chan[c.chan].outVol=chan[c.chan].vol;
|
|
|
|
if ((12*sampleBank+c.value%12)>=parent->song.sampleLen) {
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x100,0x01); // reset
|
|
|
|
immWrite(0x102,0);
|
|
|
|
immWrite(0x103,0);
|
|
|
|
immWrite(0x104,0);
|
|
|
|
immWrite(0x105,0);
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
DivSample* s=parent->getSample(12*sampleBank+c.value%12);
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x102,(s->offB>>5)&0xff);
|
|
|
|
immWrite(0x103,(s->offB>>13)&0xff);
|
2022-05-11 08:41:02 +00:00
|
|
|
int end=s->offB+s->lengthB-1;
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x104,(end>>5)&0xff);
|
|
|
|
immWrite(0x105,(end>>13)&0xff);
|
2022-05-14 03:43:00 +00:00
|
|
|
immWrite(0x101,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|2);
|
|
|
|
immWrite(0x100,(s->loopStart>=0)?0xb0:0xa0); // start/repeat
|
|
|
|
int freq=(65536.0*(double)s->rate)/((double)chipClock/144.0);
|
|
|
|
immWrite(0x109,freq&0xff);
|
|
|
|
immWrite(0x10a,(freq>>8)&0xff);
|
2022-05-11 08:41:02 +00:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2022-05-14 06:02:28 +00:00
|
|
|
if (c.chan>8) { // RSS
|
2022-05-11 08:41:02 +00:00
|
|
|
if (skipRegisterWrites) break;
|
2022-05-14 06:05:05 +00:00
|
|
|
if (!isMuted[c.chan]) {
|
|
|
|
writeRSSOn|=(1<<(c.chan-9));
|
|
|
|
}
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x18+(c.chan-9),isMuted[c.chan]?0:((chan[c.chan].pan<<6)|chan[c.chan].vol));
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
DivInstrument* ins=parent->getIns(chan[c.chan].ins,DIV_INS_FM);
|
|
|
|
chan[c.chan].macroInit(ins);
|
|
|
|
if (c.chan<6) {
|
|
|
|
if (!chan[c.chan].std.vol.will) {
|
|
|
|
chan[c.chan].outVol=chan[c.chan].vol;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
chan[c.chan].state=ins->fm;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
if (isOutput[chan[c.chan].state.alg][i]) {
|
|
|
|
if (!chan[c.chan].active || chan[c.chan].insChanged) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
2022-05-11 08:41:02 +00:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (chan[c.chan].insChanged) {
|
|
|
|
rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
|
|
|
rWrite(chanOffs[c.chan]+ADDR_LRAF,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
|
|
|
|
}
|
|
|
|
chan[c.chan].insChanged=false;
|
|
|
|
|
|
|
|
if (c.value!=DIV_NOTE_NULL) {
|
|
|
|
chan[c.chan].baseFreq=NOTE_FNUM_BLOCK(c.value,11);
|
|
|
|
chan[c.chan].portaPause=false;
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
chan[c.chan].note=c.value;
|
|
|
|
}
|
|
|
|
chan[c.chan].keyOn=true;
|
|
|
|
chan[c.chan].active=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_NOTE_OFF:
|
|
|
|
if (c.chan>14) {
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x100,0x01); // reset
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (c.chan>8) {
|
2022-05-14 06:02:28 +00:00
|
|
|
writeRSSOff|=1<<(c.chan-9);
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
chan[c.chan].keyOff=true;
|
|
|
|
chan[c.chan].keyOn=false;
|
|
|
|
chan[c.chan].active=false;
|
|
|
|
chan[c.chan].macroInit(NULL);
|
|
|
|
break;
|
|
|
|
case DIV_CMD_NOTE_OFF_ENV:
|
|
|
|
if (c.chan>14) {
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x100,0x01); // reset
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (c.chan>8) {
|
2022-05-14 06:02:28 +00:00
|
|
|
writeRSSOff|=1<<(c.chan-9);
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
chan[c.chan].keyOff=true;
|
|
|
|
chan[c.chan].keyOn=false;
|
|
|
|
chan[c.chan].active=false;
|
|
|
|
chan[c.chan].std.release();
|
|
|
|
break;
|
|
|
|
case DIV_CMD_ENV_RELEASE:
|
|
|
|
chan[c.chan].std.release();
|
|
|
|
break;
|
|
|
|
case DIV_CMD_VOLUME: {
|
|
|
|
chan[c.chan].vol=c.value;
|
|
|
|
if (!chan[c.chan].std.vol.has) {
|
|
|
|
chan[c.chan].outVol=c.value;
|
|
|
|
}
|
|
|
|
if (c.chan>14) { // ADPCM-B
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x10b,chan[c.chan].outVol);
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (c.chan>8) { // ADPCM-A
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x18+(c.chan-9),isMuted[c.chan]?0:((chan[c.chan].pan<<6)|chan[c.chan].vol));
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
if (isOutput[chan[c.chan].state.alg][i]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
2022-05-11 08:41:02 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_GET_VOLUME: {
|
|
|
|
return chan[c.chan].vol;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_INSTRUMENT:
|
|
|
|
if (chan[c.chan].ins!=c.value || c.value2==1) {
|
|
|
|
chan[c.chan].insChanged=true;
|
|
|
|
}
|
|
|
|
chan[c.chan].ins=c.value;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_PANNING: {
|
|
|
|
if (c.value==0 && c.value2==0) {
|
|
|
|
chan[c.chan].pan=3;
|
|
|
|
} else {
|
|
|
|
chan[c.chan].pan=(c.value2>0)|((c.value>0)<<1);
|
|
|
|
}
|
|
|
|
if (c.chan>14) {
|
2022-05-14 06:05:05 +00:00
|
|
|
immWrite(0x101,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|2);
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (c.chan>8) {
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x18+(c.chan-9),isMuted[c.chan]?0:((chan[c.chan].pan<<6)|chan[c.chan].vol));
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
rWrite(chanOffs[c.chan]+ADDR_LRAF,(isMuted[c.chan]?0:(chan[c.chan].pan<<6))|(chan[c.chan].state.fms&7)|((chan[c.chan].state.ams&3)<<4));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_PITCH: {
|
2022-05-14 03:43:00 +00:00
|
|
|
if (c.chan==15 && !chan[c.chan].furnacePCM) break;
|
2022-05-11 08:41:02 +00:00
|
|
|
chan[c.chan].pitch=c.value;
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_NOTE_PORTA: {
|
|
|
|
if (c.chan>5 || parent->song.linearPitch==2) { // PSG, ADPCM-B
|
|
|
|
int destFreq=NOTE_OPNB(c.chan,c.value2);
|
|
|
|
bool return2=false;
|
|
|
|
if (destFreq>chan[c.chan].baseFreq) {
|
|
|
|
chan[c.chan].baseFreq+=c.value;
|
|
|
|
if (chan[c.chan].baseFreq>=destFreq) {
|
|
|
|
chan[c.chan].baseFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
chan[c.chan].baseFreq-=c.value;
|
|
|
|
if (chan[c.chan].baseFreq<=destFreq) {
|
|
|
|
chan[c.chan].baseFreq=destFreq;
|
|
|
|
return2=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
if (return2) {
|
|
|
|
chan[c.chan].inPorta=false;
|
|
|
|
return 2;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
2022-05-23 04:47:41 +00:00
|
|
|
PLEASE_HELP_ME(chan[c.chan]);
|
2022-05-11 08:41:02 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_SAMPLE_BANK:
|
|
|
|
sampleBank=c.value;
|
|
|
|
if (sampleBank>(parent->song.sample.size()/12)) {
|
|
|
|
sampleBank=parent->song.sample.size()/12;
|
|
|
|
}
|
|
|
|
iface.sampleBank=sampleBank;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_LEGATO: {
|
2022-05-14 03:43:00 +00:00
|
|
|
if (c.chan==15 && !chan[c.chan].furnacePCM) break;
|
2022-05-11 08:41:02 +00:00
|
|
|
chan[c.chan].baseFreq=NOTE_OPNB(c.chan,c.value);
|
|
|
|
chan[c.chan].freqChanged=true;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_LFO: {
|
|
|
|
rWrite(0x22,(c.value&7)|((c.value>>4)<<3));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_FB: {
|
|
|
|
if (c.chan>5) break;
|
|
|
|
chan[c.chan].state.fb=c.value&7;
|
|
|
|
rWrite(chanOffs[c.chan]+ADDR_FB_ALG,(chan[c.chan].state.alg&7)|(chan[c.chan].state.fb<<3));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_MULT: {
|
|
|
|
if (c.chan>5) break;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.mult=c.value2&15;
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_TL: {
|
|
|
|
if (c.chan>5) break;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.tl=c.value2;
|
|
|
|
if (isOutput[chan[c.chan].state.alg][c.value]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[c.chan].outVol&0x7f,127));
|
2022-05-11 08:41:02 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_AR: {
|
|
|
|
if (c.chan>5) break;
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.ar=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.ar=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_RS: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.rs=c.value2&3;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.rs=c.value2&3;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_AM: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.am=c.value2&1;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.am=c.value2&1;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_DR: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.dr=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.dr=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_SL: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.sl=c.value2&15;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.sl=c.value2&15;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_RR: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.rr=c.value2&15;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.rr=c.value2&15;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_D2R: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.d2r=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.d2r=c.value2&31;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_DT: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.dt=c.value&7;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.dt=c.value2&7;
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_SSG: {
|
|
|
|
if (c.value<0) {
|
|
|
|
for (int i=0; i<4; i++) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[i];
|
|
|
|
op.ssgEnv=8^(c.value2&15);
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[i];
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
} else if (c.value<4) {
|
|
|
|
DivInstrumentFM::Operator& op=chan[c.chan].state.op[orderedOps[c.value]];
|
|
|
|
op.ssgEnv=8^(c.value2&15);
|
|
|
|
unsigned short baseAddr=chanOffs[c.chan]|opOffs[orderedOps[c.value]];
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case DIV_CMD_FM_HARD_RESET:
|
|
|
|
chan[c.chan].hardReset=c.value;
|
|
|
|
break;
|
|
|
|
case DIV_ALWAYS_SET_VOLUME:
|
|
|
|
return 0;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_GET_VOLMAX:
|
|
|
|
if (c.chan>14) return 255;
|
|
|
|
if (c.chan>8) return 31;
|
|
|
|
if (c.chan>5) return 15;
|
|
|
|
return 127;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_PRE_PORTA:
|
|
|
|
if (c.chan>5) {
|
|
|
|
if (chan[c.chan].active && c.value2) {
|
|
|
|
if (parent->song.resetMacroOnPorta) chan[c.chan].macroInit(parent->getIns(chan[c.chan].ins,DIV_INS_FM));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
chan[c.chan].inPorta=c.value;
|
|
|
|
break;
|
|
|
|
case DIV_CMD_PRE_NOTE:
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
//printf("WARNING: unimplemented command %d\n",c.cmd);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::muteChannel(int ch, bool mute) {
|
2022-05-11 08:41:02 +00:00
|
|
|
isMuted[ch]=mute;
|
|
|
|
if (ch>14) { // ADPCM-B
|
2022-05-14 06:05:05 +00:00
|
|
|
immWrite(0x101,(isMuted[ch]?0:(chan[ch].pan<<6))|2);
|
2022-05-11 08:41:02 +00:00
|
|
|
}
|
|
|
|
if (ch>8) { // ADPCM-A
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x18+(ch-9),isMuted[ch]?0:((chan[ch].pan<<6)|chan[ch].vol));
|
2022-05-11 08:41:02 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
if (ch>5) { // PSG
|
|
|
|
ay->muteChannel(ch-6,mute);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
// FM
|
|
|
|
rWrite(chanOffs[ch]+ADDR_LRAF,(isMuted[ch]?0:(chan[ch].pan<<6))|(chan[ch].state.fms&7)|((chan[ch].state.ams&3)<<4));
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::forceIns() {
|
2022-05-11 08:41:02 +00:00
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
for (int j=0; j<4; j++) {
|
|
|
|
unsigned short baseAddr=chanOffs[i]|opOffs[j];
|
|
|
|
DivInstrumentFM::Operator& op=chan[i].state.op[j];
|
|
|
|
if (isOutput[chan[i].state.alg][j]) {
|
2022-06-01 23:02:34 +00:00
|
|
|
rWrite(baseAddr+ADDR_TL,127-VOL_SCALE_LOG(127-op.tl,chan[i].outVol&0x7f,127));
|
2022-05-11 08:41:02 +00:00
|
|
|
} else {
|
|
|
|
rWrite(baseAddr+ADDR_TL,op.tl);
|
|
|
|
}
|
|
|
|
rWrite(baseAddr+ADDR_MULT_DT,(op.mult&15)|(dtTable[op.dt&7]<<4));
|
|
|
|
rWrite(baseAddr+ADDR_RS_AR,(op.ar&31)|(op.rs<<6));
|
|
|
|
rWrite(baseAddr+ADDR_AM_DR,(op.dr&31)|(op.am<<7));
|
|
|
|
rWrite(baseAddr+ADDR_DT2_D2R,op.d2r&31);
|
|
|
|
rWrite(baseAddr+ADDR_SL_RR,(op.rr&15)|(op.sl<<4));
|
|
|
|
rWrite(baseAddr+ADDR_SSG,op.ssgEnv&15);
|
|
|
|
}
|
|
|
|
rWrite(chanOffs[i]+ADDR_FB_ALG,(chan[i].state.alg&7)|(chan[i].state.fb<<3));
|
|
|
|
rWrite(chanOffs[i]+ADDR_LRAF,(isMuted[i]?0:(chan[i].pan<<6))|(chan[i].state.fms&7)|((chan[i].state.ams&3)<<4));
|
|
|
|
if (chan[i].active) {
|
|
|
|
chan[i].keyOn=true;
|
|
|
|
chan[i].freqChanged=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
for (int i=9; i<16; i++) {
|
|
|
|
chan[i].insChanged=true;
|
|
|
|
}
|
|
|
|
|
|
|
|
ay->forceIns();
|
|
|
|
ay->flushWrites();
|
|
|
|
for (DivRegWrite& i: ay->getRegisterWrites()) {
|
|
|
|
immWrite(i.addr&15,i.val);
|
|
|
|
}
|
|
|
|
ay->getRegisterWrites().clear();
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void* DivPlatformYM2608::getChanState(int ch) {
|
2022-05-11 08:41:02 +00:00
|
|
|
return &chan[ch];
|
|
|
|
}
|
|
|
|
|
2022-06-05 23:17:00 +00:00
|
|
|
DivMacroInt* DivPlatformYM2608::getChanMacroInt(int ch) {
|
|
|
|
if (ch>=6 && ch<9) return ay->getChanMacroInt(ch-6);
|
|
|
|
return &chan[ch].std;
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
DivDispatchOscBuffer* DivPlatformYM2608::getOscBuffer(int ch) {
|
2022-05-11 08:41:02 +00:00
|
|
|
return oscBuf[ch];
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
unsigned char* DivPlatformYM2608::getRegisterPool() {
|
2022-05-11 08:41:02 +00:00
|
|
|
return regPool;
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
int DivPlatformYM2608::getRegisterPoolSize() {
|
2022-05-11 08:41:02 +00:00
|
|
|
return 512;
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::poke(unsigned int addr, unsigned short val) {
|
2022-05-11 08:41:02 +00:00
|
|
|
immWrite(addr,val);
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::poke(std::vector<DivRegWrite>& wlist) {
|
2022-05-11 08:41:02 +00:00
|
|
|
for (DivRegWrite& i: wlist) immWrite(i.addr,i.val);
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::reset() {
|
Prepare for reducing duplicates for 4op FM related codes, Add and correct bunch of presets, Add various clock, type options for chips
Prepare for reducing duplicates for 4op FM related codes
Add and correct bunch of presets
- mostly based on MAME source.
- Neo Geo AES uses slightly difference clock for NTSC, PAL colorbust frequency.
- Turbosound FM + SAA: Some Turbosound FM has additional SAA1099, for additional sound channel and Plays SAM coupe tune?
- PC-98:
- Sound Orchestra: OPN with hardpanned stereo, some model has with OPL family FM addons.
V variation has Y8950 and supports ADPCM.
- Sound Blaster 16 for PC-9800: This famous PC sound card is also exists for PC-98, with optional OPN PC-9801-26(K) compatibility on some models.
- IBM PCjr: PC with SN PSG sound, but less popular than previous models, and compatible Tandy 1000.
- Tandy 1000: PCjr and previous IBM PC compatible, also has SN PSG (later embedded in their ASIC, like Sega).
- Hexion: One of konami's budget arcade hardware with SCC + MSM6295 sound system, like their amusement hardware in this era.
- DJ Boy, Atari JSA IIIs, Skimaxx: How to panning sound or plays stereo sound on MSM6295 - just use MSM6295s per each output!
- Air Buster: One of arcade hardware with OPN + MSM6295 sound system, Used this configuration is also some hardwares.
- Tecmo system: One of arcade hardware with pretty unique sound system: OPL3, YMZ280B, MSM6295; first 2 entry is mostly used in music, last entry is mostly used in sound effect.
- Sunsoft Shanghai 3: Predecessor of Sunsoft Arcade is using YM2149 rather than FM, MSM6295 is still there.
- Atari Klax: example of arcade hardware sound system with single MSM6295 only.
- Ikari warriors: This early SNK Triple-Z80 hardware uses 2 OPL1s and no ADPCM supports.
- Coreland Cyber Tank: This rare arcade machine's stereo sound is like SB Pro, but it's actually produced in 2 Y8950s.
- Data East MLC: Latest arcade hardware from Data East, with single YMZ280B for sound.
- Kaneko Jackie Chan: Predecessor of Super Kaneko Nova System hardware, also with YMZ280B.
- Super Kaneko Nova System: Latest arcade hardware from Kaneko, with single YMZ280B for sound. this announced 3D acceleration addon, but finally cancelled.
- Toaplan 1: Home of Late 80-Early 90s Good ol' stuffs, Example of arcade sound system with single OPL2
- Namco Pac-Land: and this era, Namco start to change Custom 15 WSG to their Custom 30 WSG with featured RAM based waveform, and mailbox feature.
- Namco System 1: One of latest usage of Custom 30 WSG, with OPM FM hardware and 8 bit DAC and Stereo output.
Add various clock, type options for chips
- SN7: Prepare to add 17 bit noise variation, Game gear stereo extentsion, NCR PSG variation (MAME core only for now)
- OPN, OPNA: Add placeholder for prescaler option
- OPL: Prepare for OPL3L, OPL4 downscaled output rate option
2022-06-06 10:04:52 +00:00
|
|
|
while (!writes.empty()) writes.pop_front();
|
2022-05-11 08:41:02 +00:00
|
|
|
memset(regPool,0,512);
|
|
|
|
if (dumpWrites) {
|
|
|
|
addWrite(0xffffffff,0);
|
|
|
|
}
|
|
|
|
fm->reset();
|
|
|
|
for (int i=0; i<16; i++) {
|
2022-05-13 07:52:43 +00:00
|
|
|
chan[i]=DivPlatformYM2608::Channel();
|
2022-05-11 08:41:02 +00:00
|
|
|
chan[i].std.setEngine(parent);
|
|
|
|
}
|
|
|
|
for (int i=0; i<6; i++) {
|
|
|
|
chan[i].vol=0x7f;
|
|
|
|
chan[i].outVol=0x7f;
|
|
|
|
}
|
|
|
|
for (int i=6; i<9; i++) {
|
|
|
|
chan[i].vol=0x0f;
|
|
|
|
}
|
|
|
|
for (int i=9; i<15; i++) {
|
|
|
|
chan[i].vol=0x1f;
|
|
|
|
}
|
|
|
|
chan[15].vol=0xff;
|
|
|
|
|
|
|
|
for (int i=0; i<512; i++) {
|
|
|
|
oldWrites[i]=-1;
|
|
|
|
pendingWrites[i]=-1;
|
|
|
|
}
|
|
|
|
|
|
|
|
lastBusy=60;
|
|
|
|
sampleBank=0;
|
2022-05-14 06:02:28 +00:00
|
|
|
writeRSSOff=0;
|
|
|
|
writeRSSOn=0;
|
2022-05-11 08:41:02 +00:00
|
|
|
|
|
|
|
delay=0;
|
|
|
|
|
|
|
|
extMode=false;
|
|
|
|
|
|
|
|
// LFO
|
|
|
|
immWrite(0x22,0x08);
|
|
|
|
|
|
|
|
// PCM volume
|
2022-05-13 07:52:43 +00:00
|
|
|
immWrite(0x11,0x3f); // A
|
|
|
|
immWrite(0x10b,0xff); // B
|
|
|
|
|
|
|
|
// ADPCM limit
|
|
|
|
immWrite(0x10d,0xff);
|
|
|
|
immWrite(0x10c,0xff);
|
|
|
|
|
|
|
|
// enable 6 channel mode
|
|
|
|
immWrite(0x29,0x80);
|
2022-05-11 08:41:02 +00:00
|
|
|
|
|
|
|
ay->reset();
|
|
|
|
ay->getRegisterWrites().clear();
|
|
|
|
ay->flushWrites();
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
bool DivPlatformYM2608::isStereo() {
|
2022-05-11 08:41:02 +00:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
bool DivPlatformYM2608::keyOffAffectsArp(int ch) {
|
2022-05-11 08:41:02 +00:00
|
|
|
return (ch>5);
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::notifyInsChange(int ins) {
|
2022-05-11 08:41:02 +00:00
|
|
|
for (int i=0; i<16; i++) {
|
|
|
|
if (chan[i].ins==ins) {
|
|
|
|
chan[i].insChanged=true;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
ay->notifyInsChange(ins);
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::notifyInsDeletion(void* ins) {
|
2022-05-11 08:41:02 +00:00
|
|
|
ay->notifyInsDeletion(ins);
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::setSkipRegisterWrites(bool value) {
|
2022-05-11 08:41:02 +00:00
|
|
|
DivDispatch::setSkipRegisterWrites(value);
|
|
|
|
ay->setSkipRegisterWrites(value);
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
const void* DivPlatformYM2608::getSampleMem(int index) {
|
|
|
|
return index == 0 ? adpcmBMem : NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
size_t DivPlatformYM2608::getSampleMemCapacity(int index) {
|
2022-05-15 07:02:31 +00:00
|
|
|
return index == 0 ? 262144 : 0;
|
2022-05-13 07:52:43 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
size_t DivPlatformYM2608::getSampleMemUsage(int index) {
|
|
|
|
return index == 0 ? adpcmBMemLen : 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void DivPlatformYM2608::renderSamples() {
|
|
|
|
memset(adpcmBMem,0,getSampleMemCapacity(0));
|
|
|
|
|
|
|
|
size_t memPos=0;
|
|
|
|
for (int i=0; i<parent->song.sampleLen; i++) {
|
|
|
|
DivSample* s=parent->song.sample[i];
|
|
|
|
int paddedLen=(s->lengthB+255)&(~0xff);
|
|
|
|
if ((memPos&0xf00000)!=((memPos+paddedLen)&0xf00000)) {
|
|
|
|
memPos=(memPos+0xfffff)&0xf00000;
|
|
|
|
}
|
|
|
|
if (memPos>=getSampleMemCapacity(0)) {
|
|
|
|
logW("out of ADPCM memory for sample %d!",i);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (memPos+paddedLen>=getSampleMemCapacity(0)) {
|
|
|
|
memcpy(adpcmBMem+memPos,s->dataB,getSampleMemCapacity(0)-memPos);
|
|
|
|
logW("out of ADPCM memory for sample %d!",i);
|
|
|
|
} else {
|
|
|
|
memcpy(adpcmBMem+memPos,s->dataB,paddedLen);
|
|
|
|
}
|
|
|
|
s->offB=memPos;
|
|
|
|
memPos+=paddedLen;
|
|
|
|
}
|
|
|
|
adpcmBMemLen=memPos+256;
|
|
|
|
}
|
|
|
|
|
Prepare for reducing duplicates for 4op FM related codes, Add and correct bunch of presets, Add various clock, type options for chips
Prepare for reducing duplicates for 4op FM related codes
Add and correct bunch of presets
- mostly based on MAME source.
- Neo Geo AES uses slightly difference clock for NTSC, PAL colorbust frequency.
- Turbosound FM + SAA: Some Turbosound FM has additional SAA1099, for additional sound channel and Plays SAM coupe tune?
- PC-98:
- Sound Orchestra: OPN with hardpanned stereo, some model has with OPL family FM addons.
V variation has Y8950 and supports ADPCM.
- Sound Blaster 16 for PC-9800: This famous PC sound card is also exists for PC-98, with optional OPN PC-9801-26(K) compatibility on some models.
- IBM PCjr: PC with SN PSG sound, but less popular than previous models, and compatible Tandy 1000.
- Tandy 1000: PCjr and previous IBM PC compatible, also has SN PSG (later embedded in their ASIC, like Sega).
- Hexion: One of konami's budget arcade hardware with SCC + MSM6295 sound system, like their amusement hardware in this era.
- DJ Boy, Atari JSA IIIs, Skimaxx: How to panning sound or plays stereo sound on MSM6295 - just use MSM6295s per each output!
- Air Buster: One of arcade hardware with OPN + MSM6295 sound system, Used this configuration is also some hardwares.
- Tecmo system: One of arcade hardware with pretty unique sound system: OPL3, YMZ280B, MSM6295; first 2 entry is mostly used in music, last entry is mostly used in sound effect.
- Sunsoft Shanghai 3: Predecessor of Sunsoft Arcade is using YM2149 rather than FM, MSM6295 is still there.
- Atari Klax: example of arcade hardware sound system with single MSM6295 only.
- Ikari warriors: This early SNK Triple-Z80 hardware uses 2 OPL1s and no ADPCM supports.
- Coreland Cyber Tank: This rare arcade machine's stereo sound is like SB Pro, but it's actually produced in 2 Y8950s.
- Data East MLC: Latest arcade hardware from Data East, with single YMZ280B for sound.
- Kaneko Jackie Chan: Predecessor of Super Kaneko Nova System hardware, also with YMZ280B.
- Super Kaneko Nova System: Latest arcade hardware from Kaneko, with single YMZ280B for sound. this announced 3D acceleration addon, but finally cancelled.
- Toaplan 1: Home of Late 80-Early 90s Good ol' stuffs, Example of arcade sound system with single OPL2
- Namco Pac-Land: and this era, Namco start to change Custom 15 WSG to their Custom 30 WSG with featured RAM based waveform, and mailbox feature.
- Namco System 1: One of latest usage of Custom 30 WSG, with OPM FM hardware and 8 bit DAC and Stereo output.
Add various clock, type options for chips
- SN7: Prepare to add 17 bit noise variation, Game gear stereo extentsion, NCR PSG variation (MAME core only for now)
- OPN, OPNA: Add placeholder for prescaler option
- OPL: Prepare for OPL3L, OPL4 downscaled output rate option
2022-06-06 10:04:52 +00:00
|
|
|
void DivPlatformYM2608::setFlags(unsigned int flags) {
|
|
|
|
switch (flags&0x3f) {
|
|
|
|
default:
|
|
|
|
case 0x00:
|
|
|
|
chipClock=8000000.0;
|
|
|
|
break;
|
|
|
|
case 0x01:
|
2022-06-07 03:57:09 +00:00
|
|
|
chipClock=38400*13*16; // 31948800/4
|
Prepare for reducing duplicates for 4op FM related codes, Add and correct bunch of presets, Add various clock, type options for chips
Prepare for reducing duplicates for 4op FM related codes
Add and correct bunch of presets
- mostly based on MAME source.
- Neo Geo AES uses slightly difference clock for NTSC, PAL colorbust frequency.
- Turbosound FM + SAA: Some Turbosound FM has additional SAA1099, for additional sound channel and Plays SAM coupe tune?
- PC-98:
- Sound Orchestra: OPN with hardpanned stereo, some model has with OPL family FM addons.
V variation has Y8950 and supports ADPCM.
- Sound Blaster 16 for PC-9800: This famous PC sound card is also exists for PC-98, with optional OPN PC-9801-26(K) compatibility on some models.
- IBM PCjr: PC with SN PSG sound, but less popular than previous models, and compatible Tandy 1000.
- Tandy 1000: PCjr and previous IBM PC compatible, also has SN PSG (later embedded in their ASIC, like Sega).
- Hexion: One of konami's budget arcade hardware with SCC + MSM6295 sound system, like their amusement hardware in this era.
- DJ Boy, Atari JSA IIIs, Skimaxx: How to panning sound or plays stereo sound on MSM6295 - just use MSM6295s per each output!
- Air Buster: One of arcade hardware with OPN + MSM6295 sound system, Used this configuration is also some hardwares.
- Tecmo system: One of arcade hardware with pretty unique sound system: OPL3, YMZ280B, MSM6295; first 2 entry is mostly used in music, last entry is mostly used in sound effect.
- Sunsoft Shanghai 3: Predecessor of Sunsoft Arcade is using YM2149 rather than FM, MSM6295 is still there.
- Atari Klax: example of arcade hardware sound system with single MSM6295 only.
- Ikari warriors: This early SNK Triple-Z80 hardware uses 2 OPL1s and no ADPCM supports.
- Coreland Cyber Tank: This rare arcade machine's stereo sound is like SB Pro, but it's actually produced in 2 Y8950s.
- Data East MLC: Latest arcade hardware from Data East, with single YMZ280B for sound.
- Kaneko Jackie Chan: Predecessor of Super Kaneko Nova System hardware, also with YMZ280B.
- Super Kaneko Nova System: Latest arcade hardware from Kaneko, with single YMZ280B for sound. this announced 3D acceleration addon, but finally cancelled.
- Toaplan 1: Home of Late 80-Early 90s Good ol' stuffs, Example of arcade sound system with single OPL2
- Namco Pac-Land: and this era, Namco start to change Custom 15 WSG to their Custom 30 WSG with featured RAM based waveform, and mailbox feature.
- Namco System 1: One of latest usage of Custom 30 WSG, with OPM FM hardware and 8 bit DAC and Stereo output.
Add various clock, type options for chips
- SN7: Prepare to add 17 bit noise variation, Game gear stereo extentsion, NCR PSG variation (MAME core only for now)
- OPN, OPNA: Add placeholder for prescaler option
- OPL: Prepare for OPL3L, OPL4 downscaled output rate option
2022-06-06 10:04:52 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
rate=fm->sample_rate(chipClock);
|
|
|
|
for (int i=0; i<16; i++) {
|
|
|
|
oscBuf[i]->rate=rate;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
int DivPlatformYM2608::init(DivEngine* p, int channels, int sugRate, unsigned int flags) {
|
|
|
|
parent=p;
|
|
|
|
adpcmBMem=new unsigned char[getSampleMemCapacity(0)];
|
|
|
|
adpcmBMemLen=0;
|
|
|
|
iface.adpcmBMem=adpcmBMem;
|
|
|
|
iface.sampleBank=0;
|
2022-05-11 08:41:02 +00:00
|
|
|
dumpWrites=false;
|
|
|
|
skipRegisterWrites=false;
|
|
|
|
for (int i=0; i<16; i++) {
|
|
|
|
isMuted[i]=false;
|
|
|
|
oscBuf[i]=new DivDispatchOscBuffer;
|
|
|
|
}
|
2022-05-13 07:52:43 +00:00
|
|
|
fm=new ymfm::ym2608(iface);
|
Prepare for reducing duplicates for 4op FM related codes, Add and correct bunch of presets, Add various clock, type options for chips
Prepare for reducing duplicates for 4op FM related codes
Add and correct bunch of presets
- mostly based on MAME source.
- Neo Geo AES uses slightly difference clock for NTSC, PAL colorbust frequency.
- Turbosound FM + SAA: Some Turbosound FM has additional SAA1099, for additional sound channel and Plays SAM coupe tune?
- PC-98:
- Sound Orchestra: OPN with hardpanned stereo, some model has with OPL family FM addons.
V variation has Y8950 and supports ADPCM.
- Sound Blaster 16 for PC-9800: This famous PC sound card is also exists for PC-98, with optional OPN PC-9801-26(K) compatibility on some models.
- IBM PCjr: PC with SN PSG sound, but less popular than previous models, and compatible Tandy 1000.
- Tandy 1000: PCjr and previous IBM PC compatible, also has SN PSG (later embedded in their ASIC, like Sega).
- Hexion: One of konami's budget arcade hardware with SCC + MSM6295 sound system, like their amusement hardware in this era.
- DJ Boy, Atari JSA IIIs, Skimaxx: How to panning sound or plays stereo sound on MSM6295 - just use MSM6295s per each output!
- Air Buster: One of arcade hardware with OPN + MSM6295 sound system, Used this configuration is also some hardwares.
- Tecmo system: One of arcade hardware with pretty unique sound system: OPL3, YMZ280B, MSM6295; first 2 entry is mostly used in music, last entry is mostly used in sound effect.
- Sunsoft Shanghai 3: Predecessor of Sunsoft Arcade is using YM2149 rather than FM, MSM6295 is still there.
- Atari Klax: example of arcade hardware sound system with single MSM6295 only.
- Ikari warriors: This early SNK Triple-Z80 hardware uses 2 OPL1s and no ADPCM supports.
- Coreland Cyber Tank: This rare arcade machine's stereo sound is like SB Pro, but it's actually produced in 2 Y8950s.
- Data East MLC: Latest arcade hardware from Data East, with single YMZ280B for sound.
- Kaneko Jackie Chan: Predecessor of Super Kaneko Nova System hardware, also with YMZ280B.
- Super Kaneko Nova System: Latest arcade hardware from Kaneko, with single YMZ280B for sound. this announced 3D acceleration addon, but finally cancelled.
- Toaplan 1: Home of Late 80-Early 90s Good ol' stuffs, Example of arcade sound system with single OPL2
- Namco Pac-Land: and this era, Namco start to change Custom 15 WSG to their Custom 30 WSG with featured RAM based waveform, and mailbox feature.
- Namco System 1: One of latest usage of Custom 30 WSG, with OPM FM hardware and 8 bit DAC and Stereo output.
Add various clock, type options for chips
- SN7: Prepare to add 17 bit noise variation, Game gear stereo extentsion, NCR PSG variation (MAME core only for now)
- OPN, OPNA: Add placeholder for prescaler option
- OPL: Prepare for OPL3L, OPL4 downscaled output rate option
2022-06-06 10:04:52 +00:00
|
|
|
setFlags(flags);
|
2022-05-11 08:41:02 +00:00
|
|
|
// YM2149, 2MHz
|
Prepare for reducing duplicates for 4op FM related codes, Add and correct bunch of presets, Add various clock, type options for chips
Prepare for reducing duplicates for 4op FM related codes
Add and correct bunch of presets
- mostly based on MAME source.
- Neo Geo AES uses slightly difference clock for NTSC, PAL colorbust frequency.
- Turbosound FM + SAA: Some Turbosound FM has additional SAA1099, for additional sound channel and Plays SAM coupe tune?
- PC-98:
- Sound Orchestra: OPN with hardpanned stereo, some model has with OPL family FM addons.
V variation has Y8950 and supports ADPCM.
- Sound Blaster 16 for PC-9800: This famous PC sound card is also exists for PC-98, with optional OPN PC-9801-26(K) compatibility on some models.
- IBM PCjr: PC with SN PSG sound, but less popular than previous models, and compatible Tandy 1000.
- Tandy 1000: PCjr and previous IBM PC compatible, also has SN PSG (later embedded in their ASIC, like Sega).
- Hexion: One of konami's budget arcade hardware with SCC + MSM6295 sound system, like their amusement hardware in this era.
- DJ Boy, Atari JSA IIIs, Skimaxx: How to panning sound or plays stereo sound on MSM6295 - just use MSM6295s per each output!
- Air Buster: One of arcade hardware with OPN + MSM6295 sound system, Used this configuration is also some hardwares.
- Tecmo system: One of arcade hardware with pretty unique sound system: OPL3, YMZ280B, MSM6295; first 2 entry is mostly used in music, last entry is mostly used in sound effect.
- Sunsoft Shanghai 3: Predecessor of Sunsoft Arcade is using YM2149 rather than FM, MSM6295 is still there.
- Atari Klax: example of arcade hardware sound system with single MSM6295 only.
- Ikari warriors: This early SNK Triple-Z80 hardware uses 2 OPL1s and no ADPCM supports.
- Coreland Cyber Tank: This rare arcade machine's stereo sound is like SB Pro, but it's actually produced in 2 Y8950s.
- Data East MLC: Latest arcade hardware from Data East, with single YMZ280B for sound.
- Kaneko Jackie Chan: Predecessor of Super Kaneko Nova System hardware, also with YMZ280B.
- Super Kaneko Nova System: Latest arcade hardware from Kaneko, with single YMZ280B for sound. this announced 3D acceleration addon, but finally cancelled.
- Toaplan 1: Home of Late 80-Early 90s Good ol' stuffs, Example of arcade sound system with single OPL2
- Namco Pac-Land: and this era, Namco start to change Custom 15 WSG to their Custom 30 WSG with featured RAM based waveform, and mailbox feature.
- Namco System 1: One of latest usage of Custom 30 WSG, with OPM FM hardware and 8 bit DAC and Stereo output.
Add various clock, type options for chips
- SN7: Prepare to add 17 bit noise variation, Game gear stereo extentsion, NCR PSG variation (MAME core only for now)
- OPN, OPNA: Add placeholder for prescaler option
- OPL: Prepare for OPL3L, OPL4 downscaled output rate option
2022-06-06 10:04:52 +00:00
|
|
|
ay=new DivPlatformAY8910(true,chipClock,32);
|
|
|
|
ay->init(p,3,sugRate,16);
|
2022-05-11 08:41:02 +00:00
|
|
|
ay->toggleRegisterDump(true);
|
|
|
|
reset();
|
|
|
|
return 16;
|
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
void DivPlatformYM2608::quit() {
|
2022-05-11 08:41:02 +00:00
|
|
|
for (int i=0; i<16; i++) {
|
|
|
|
delete oscBuf[i];
|
|
|
|
}
|
|
|
|
ay->quit();
|
|
|
|
delete ay;
|
|
|
|
delete fm;
|
2022-05-13 07:52:43 +00:00
|
|
|
delete[] adpcmBMem;
|
2022-05-11 08:41:02 +00:00
|
|
|
}
|
|
|
|
|
2022-05-13 07:52:43 +00:00
|
|
|
DivPlatformYM2608::~DivPlatformYM2608() {
|
2022-05-11 08:41:02 +00:00
|
|
|
}
|