mirror of
https://github.com/tildearrow/furnace.git
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317 lines
11 KiB
C
317 lines
11 KiB
C
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/*
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* Copyright (c) 2003, 2007-11 Matteo Frigo
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* Copyright (c) 2003, 2007-11 Massachusetts Institute of Technology
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*
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* AVX-512 support implemented by Romain Dolbeau.
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* Romain Dolbeau hereby places his modifications in the public domain.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#if defined(FFTW_LDOUBLE) || defined(FFTW_QUAD)
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#error "AVX-512 vector instructions only works in single or double precision"
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#endif
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#ifdef FFTW_SINGLE
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# define DS(d,s) s /* single-precision option */
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# define SUFF(name) name ## _ps
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# define SCAL(x) x ## f
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#else /* !FFTW_SINGLE */
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# define DS(d,s) d /* double-precision option */
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# define SUFF(name) name ## _pd
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# define SCAL(x) x
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#endif /* FFTW_SINGLE */
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#define SIMD_SUFFIX _avx512 /* for renaming */
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#define VL DS(4, 8) /* SIMD complex vector length */
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#define SIMD_VSTRIDE_OKA(x) ((x) == 2)
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#define SIMD_STRIDE_OKPAIR SIMD_STRIDE_OK
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#if defined(__GNUC__) && !defined(__AVX512F__) /* sanity check */
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#error "compiling simd-avx512.h without avx-512f support"
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#endif
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#if !defined(HAVE_AVX2)
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#warning "You should probably enable AVX2 with --enable-avx2 for AVX-512"
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#endif
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#include <immintrin.h>
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typedef DS(__m512d, __m512) V;
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#define VLIT(re, im) DS(SUFF(_mm512_setr)(im, re, im, re, im, re, im, re),SUFF(_mm512_setr)(im, re, im, re, im, re, im, re, im, re, im, re, im, re, im, re))
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#define VLIT1(val) SUFF(_mm512_set1)(val)
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#define LDK(x) x
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#define DVK(var, val) V var = VLIT1(val)
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#define VZERO SUFF(_mm512_setzero)()
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#define VDUPL(x) DS(_mm512_movedup_pd(x),_mm512_moveldup_ps(x))
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#define VDUPH(x) DS(_mm512_unpackhi_pd(x, x),_mm512_movehdup_ps(x))
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#define FLIP_RI(x) SUFF(_mm512_shuffle)(x, x, DS(0x55,0xB1))
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#define VCONJ(x) SUFF(_mm512_fmsubadd)(VZERO, VZERO, x)
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static inline V VBYI(V x)
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{
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return FLIP_RI(VCONJ(x));
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}
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#define VADD(a,b) SUFF(_mm512_add)(a,b)
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#define VSUB(a,b) SUFF(_mm512_sub)(a,b)
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#define VMUL(a,b) SUFF(_mm512_mul)(a,b)
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#define VFMA(a, b, c) SUFF(_mm512_fmadd)(a, b, c)
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#define VFMS(a, b, c) SUFF(_mm512_fmsub)(a, b, c)
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#define VFNMS(a, b, c) SUFF(_mm512_fnmadd)(a, b, c)
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#define VFMAI(b, c) SUFF(_mm512_fmaddsub)(VLIT1(1.), c, FLIP_RI(b))
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#define VFNMSI(b, c) SUFF(_mm512_fmsubadd)(VLIT1(1.), c, FLIP_RI(b))
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#define VFMACONJ(b,c) SUFF(_mm512_fmsubadd)(VLIT1(1.), c, b)
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#define VFMSCONJ(b,c) SUFF(_mm512_fmsubadd)(VLIT1(-1.), c, b)
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#define VFNMSCONJ(b,c) SUFF(_mm512_fmaddsub)(VLIT1(1.), c, b)
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static inline V LDA(const R *x, INT ivs, const R *aligned_like) {
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(void)aligned_like; /* UNUSED */
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(void)ivs; /* UNUSED */
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return SUFF(_mm512_loadu)(x);
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}
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static inline void STA(R *x, V v, INT ovs, const R *aligned_like) {
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(void)aligned_like; /* UNUSED */
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(void)ovs; /* UNUSED */
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SUFF(_mm512_storeu)(x, v);
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}
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#if FFTW_SINGLE
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static inline V LDu(const R *x, INT ivs, const R *aligned_like)
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{
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(void)aligned_like; /* UNUSED */
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__m512i index = _mm512_set_epi32(7 * ivs + 1, 7 * ivs,
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6 * ivs + 1, 6 * ivs,
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5 * ivs + 1, 5 * ivs,
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4 * ivs + 1, 4 * ivs,
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3 * ivs + 1, 3 * ivs,
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2 * ivs + 1, 2 * ivs,
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1 * ivs + 1, 1 * ivs,
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0 * ivs + 1, 0 * ivs);
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return _mm512_i32gather_ps(index, x, 4);
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}
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static inline void STu(R *x, V v, INT ovs, const R *aligned_like)
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{
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(void)aligned_like; /* UNUSED */
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__m512i index = _mm512_set_epi32(7 * ovs + 1, 7 * ovs,
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6 * ovs + 1, 6 * ovs,
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5 * ovs + 1, 5 * ovs,
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4 * ovs + 1, 4 * ovs,
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3 * ovs + 1, 3 * ovs,
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2 * ovs + 1, 2 * ovs,
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1 * ovs + 1, 1 * ovs,
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0 * ovs + 1, 0 * ovs);
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_mm512_i32scatter_ps(x, index, v, 4);
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}
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#else /* !FFTW_SINGLE */
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static inline V LDu(const R *x, INT ivs, const R *aligned_like)
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{
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(void)aligned_like; /* UNUSED */
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__m256i index = _mm256_set_epi32(3 * ivs + 1, 3 * ivs,
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2 * ivs + 1, 2 * ivs,
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1 * ivs + 1, 1 * ivs,
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0 * ivs + 1, 0 * ivs);
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return _mm512_i32gather_pd(index, x, 8);
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}
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static inline void STu(R *x, V v, INT ovs, const R *aligned_like)
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{
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(void)aligned_like; /* UNUSED */
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__m256i index = _mm256_set_epi32(3 * ovs + 1, 3 * ovs,
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2 * ovs + 1, 2 * ovs,
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1 * ovs + 1, 1 * ovs,
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0 * ovs + 1, 0 * ovs);
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_mm512_i32scatter_pd(x, index, v, 8);
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}
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#endif /* FFTW_SINGLE */
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#define LD LDu
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#define ST STu
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#ifdef FFTW_SINGLE
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#define STM2(x, v, ovs, a) ST(x, v, ovs, a)
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#define STN2(x, v0, v1, ovs) /* nop */
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static inline void STM4(R *x, V v, INT ovs, const R *aligned_like)
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{
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(void)aligned_like; /* UNUSED */
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__m512i index = _mm512_set_epi32(15 * ovs, 14 * ovs,
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13 * ovs, 12 * ovs,
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11 * ovs, 10 * ovs,
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9 * ovs, 8 * ovs,
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7 * ovs, 6 * ovs,
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5 * ovs, 4 * ovs,
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3 * ovs, 2 * ovs,
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1 * ovs, 0 * ovs);
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_mm512_i32scatter_ps(x, index, v, 4);
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}
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#define STN4(x, v0, v1, v2, v3, ovs) /* no-op */
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#else /* !FFTW_SINGLE */
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#define STM2(x, v, ovs, a) ST(x, v, ovs, a)
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#define STN2(x, v0, v1, ovs) /* nop */
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static inline void STM4(R *x, V v, INT ovs, const R *aligned_like)
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{
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(void)aligned_like; /* UNUSED */
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__m256i index = _mm256_set_epi32(7 * ovs, 6 * ovs,
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5 * ovs, 4 * ovs,
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3 * ovs, 2 * ovs,
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1 * ovs, 0 * ovs);
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_mm512_i32scatter_pd(x, index, v, 8);
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}
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#define STN4(x, v0, v1, v2, v3, ovs) /* no-op */
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#endif /* FFTW_SINGLE */
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static inline V VZMUL(V tx, V sr)
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{
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/* V tr = VDUPL(tx); */
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/* V ti = VDUPH(tx); */
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/* tr = VMUL(sr, tr); */
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/* sr = VBYI(sr); */
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/* return VFMA(ti, sr, tr); */
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return SUFF(_mm512_fmaddsub)(sr, VDUPL(tx), VMUL(FLIP_RI(sr), VDUPH(tx)));
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}
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static inline V VZMULJ(V tx, V sr)
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{
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/* V tr = VDUPL(tx); */
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/* V ti = VDUPH(tx); */
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/* tr = VMUL(sr, tr); */
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/* sr = VBYI(sr); */
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/* return VFNMS(ti, sr, tr); */
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return SUFF(_mm512_fmsubadd)(sr, VDUPL(tx), VMUL(FLIP_RI(sr), VDUPH(tx)));
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}
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static inline V VZMULI(V tx, V sr)
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{
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V tr = VDUPL(tx);
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V ti = VDUPH(tx);
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ti = VMUL(ti, sr);
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sr = VBYI(sr);
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return VFMS(tr, sr, ti);
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/* return SUFF(_mm512_addsub)(SUFF(_mm512_fnmadd)(sr, VDUPH(tx), VZERO), VMUL(FLIP_RI(sr), VDUPL(tx))); */
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}
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static inline V VZMULIJ(V tx, V sr)
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{
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/* V tr = VDUPL(tx); */
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/* V ti = VDUPH(tx); */
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/* ti = VMUL(ti, sr); */
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/* sr = VBYI(sr); */
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/* return VFMA(tr, sr, ti); */
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return SUFF(_mm512_fmaddsub)(sr, VDUPH(tx), VMUL(FLIP_RI(sr), VDUPL(tx)));
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}
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/* twiddle storage #1: compact, slower */
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#ifdef FFTW_SINGLE
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# define VTW1(v,x) {TW_CEXP, v, x}, {TW_CEXP, v+1, x}, {TW_CEXP, v+2, x}, {TW_CEXP, v+3, x}, {TW_CEXP, v+4, x}, {TW_CEXP, v+5, x}, {TW_CEXP, v+6, x}, {TW_CEXP, v+7, x}
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#else /* !FFTW_SINGLE */
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# define VTW1(v,x) {TW_CEXP, v, x}, {TW_CEXP, v+1, x}, {TW_CEXP, v+2, x}, {TW_CEXP, v+3, x}
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#endif /* FFTW_SINGLE */
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#define TWVL1 (VL)
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static inline V BYTW1(const R *t, V sr)
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{
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return VZMUL(LDA(t, 2, t), sr);
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}
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static inline V BYTWJ1(const R *t, V sr)
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{
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return VZMULJ(LDA(t, 2, t), sr);
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}
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/* twiddle storage #2: twice the space, faster (when in cache) */
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#ifdef FFTW_SINGLE
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# define VTW2(v,x) \
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{TW_COS, v , x}, {TW_COS, v , x}, {TW_COS, v+1, x}, {TW_COS, v+1, x}, \
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{TW_COS, v+2, x}, {TW_COS, v+2, x}, {TW_COS, v+3, x}, {TW_COS, v+3, x}, \
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{TW_COS, v+4, x}, {TW_COS, v+4, x}, {TW_COS, v+5, x}, {TW_COS, v+5, x}, \
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{TW_COS, v+6, x}, {TW_COS, v+6, x}, {TW_COS, v+7, x}, {TW_COS, v+7, x}, \
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{TW_SIN, v , -x}, {TW_SIN, v , x}, {TW_SIN, v+1, -x}, {TW_SIN, v+1, x}, \
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{TW_SIN, v+2, -x}, {TW_SIN, v+2, x}, {TW_SIN, v+3, -x}, {TW_SIN, v+3, x}, \
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{TW_SIN, v+4, -x}, {TW_SIN, v+4, x}, {TW_SIN, v+5, -x}, {TW_SIN, v+5, x}, \
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{TW_SIN, v+6, -x}, {TW_SIN, v+6, x}, {TW_SIN, v+7, -x}, {TW_SIN, v+7, x}
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#else /* !FFTW_SINGLE */
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# define VTW2(v,x) \
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{TW_COS, v , x}, {TW_COS, v , x}, {TW_COS, v+1, x}, {TW_COS, v+1, x}, \
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{TW_COS, v+2, x}, {TW_COS, v+2, x}, {TW_COS, v+3, x}, {TW_COS, v+3, x}, \
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{TW_SIN, v , -x}, {TW_SIN, v , x}, {TW_SIN, v+1, -x}, {TW_SIN, v+1, x}, \
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{TW_SIN, v+2, -x}, {TW_SIN, v+2, x}, {TW_SIN, v+3, -x}, {TW_SIN, v+3, x}
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#endif /* FFTW_SINGLE */
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#define TWVL2 (2 * VL)
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static inline V BYTW2(const R *t, V sr)
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{
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const V *twp = (const V *)t;
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V si = FLIP_RI(sr);
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V tr = twp[0], ti = twp[1];
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/* V tr = LD(t, 2, t), ti = LD(t + VL, 2, t + VL); */
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return VFMA(tr, sr, VMUL(ti, si));
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}
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static inline V BYTWJ2(const R *t, V sr)
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{
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const V *twp = (const V *)t;
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V si = FLIP_RI(sr);
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V tr = twp[0], ti = twp[1];
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/* V tr = LD(t, 2, t), ti = LD(t + VL, 2, t + VL); */
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return VFNMS(ti, si, VMUL(tr, sr));
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}
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/* twiddle storage #3 */
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#define VTW3(v,x) VTW1(v,x)
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#define TWVL3 TWVL1
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/* twiddle storage for split arrays */
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#ifdef FFTW_SINGLE
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# define VTWS(v,x) \
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{TW_COS, v , x}, {TW_COS, v+1 , x}, {TW_COS, v+2 , x}, {TW_COS, v+3 , x}, \
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{TW_COS, v+4 , x}, {TW_COS, v+5 , x}, {TW_COS, v+6 , x}, {TW_COS, v+7 , x}, \
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{TW_COS, v+8 , x}, {TW_COS, v+9 , x}, {TW_COS, v+10, x}, {TW_COS, v+11, x}, \
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{TW_COS, v+12, x}, {TW_COS, v+13, x}, {TW_COS, v+14, x}, {TW_COS, v+15, x}, \
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{TW_SIN, v , x}, {TW_SIN, v+1 , x}, {TW_SIN, v+2 , x}, {TW_SIN, v+3 , x}, \
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{TW_SIN, v+4 , x}, {TW_SIN, v+5 , x}, {TW_SIN, v+6 , x}, {TW_SIN, v+7 , x}, \
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{TW_SIN, v+8 , x}, {TW_SIN, v+9 , x}, {TW_SIN, v+10, x}, {TW_SIN, v+11, x}, \
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{TW_SIN, v+12, x}, {TW_SIN, v+13, x}, {TW_SIN, v+14, x}, {TW_SIN, v+15, x}
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#else /* !FFTW_SINGLE */
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# define VTWS(v,x) \
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{TW_COS, v , x}, {TW_COS, v+1, x}, {TW_COS, v+2, x}, {TW_COS, v+3, x}, \
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{TW_COS, v+4, x}, {TW_COS, v+5, x}, {TW_COS, v+6, x}, {TW_COS, v+7, x}, \
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{TW_SIN, v , x}, {TW_SIN, v+1, x}, {TW_SIN, v+2, x}, {TW_SIN, v+3, x}, \
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{TW_SIN, v+4, x}, {TW_SIN, v+5, x}, {TW_SIN, v+6, x}, {TW_SIN, v+7, x}
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#endif /* FFTW_SINGLE */
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#define TWVLS (2 * VL)
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#define VLEAVE _mm256_zeroupper
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#include "simd-common.h"
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