mirror of
https://github.com/tildearrow/furnace.git
synced 2024-11-27 15:03:01 +00:00
279 lines
9.3 KiB
C
279 lines
9.3 KiB
C
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/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:45:49 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_twiddle_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -n 10 -name t1bv_10 -include dft/simd/t1b.h -sign 1 */
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/*
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* This function contains 51 FP additions, 40 FP multiplications,
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* (or, 33 additions, 22 multiplications, 18 fused multiply/add),
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* 32 stack variables, 4 constants, and 20 memory accesses
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*/
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#include "dft/simd/t1b.h"
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static void t1bv_10(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP559016994, +0.559016994374947424102293417182819058860154590);
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DVK(KP618033988, +0.618033988749894848204586834365638117720309180);
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DVK(KP951056516, +0.951056516295153572116439333379382143405698634);
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DVK(KP250000000, +0.250000000000000000000000000000000000000000000);
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{
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INT m;
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R *x;
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x = ii;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 18)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 18), MAKE_VOLATILE_STRIDE(10, rs)) {
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V T4, TA, Tk, Tp, Tq, TE, TF, TG, T9, Te, Tf, TB, TC, TD, T1;
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V T3, T2;
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T1 = LD(&(x[0]), ms, &(x[0]));
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T2 = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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T3 = BYTW(&(W[TWVL * 8]), T2);
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T4 = VSUB(T1, T3);
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TA = VADD(T1, T3);
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{
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V Th, To, Tj, Tm;
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{
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V Tg, Tn, Ti, Tl;
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Tg = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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Th = BYTW(&(W[TWVL * 6]), Tg);
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Tn = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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To = BYTW(&(W[0]), Tn);
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Ti = LD(&(x[WS(rs, 9)]), ms, &(x[WS(rs, 1)]));
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Tj = BYTW(&(W[TWVL * 16]), Ti);
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Tl = LD(&(x[WS(rs, 6)]), ms, &(x[0]));
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Tm = BYTW(&(W[TWVL * 10]), Tl);
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}
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Tk = VSUB(Th, Tj);
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Tp = VSUB(Tm, To);
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Tq = VADD(Tk, Tp);
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TE = VADD(Th, Tj);
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TF = VADD(Tm, To);
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TG = VADD(TE, TF);
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}
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{
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V T6, Td, T8, Tb;
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{
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V T5, Tc, T7, Ta;
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T5 = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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T6 = BYTW(&(W[TWVL * 2]), T5);
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Tc = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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Td = BYTW(&(W[TWVL * 4]), Tc);
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T7 = LD(&(x[WS(rs, 7)]), ms, &(x[WS(rs, 1)]));
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T8 = BYTW(&(W[TWVL * 12]), T7);
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Ta = LD(&(x[WS(rs, 8)]), ms, &(x[0]));
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Tb = BYTW(&(W[TWVL * 14]), Ta);
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}
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T9 = VSUB(T6, T8);
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Te = VSUB(Tb, Td);
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Tf = VADD(T9, Te);
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TB = VADD(T6, T8);
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TC = VADD(Tb, Td);
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TD = VADD(TB, TC);
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}
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{
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V Tt, Tr, Ts, Tx, Tz, Tv, Tw, Ty, Tu;
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Tt = VSUB(Tf, Tq);
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Tr = VADD(Tf, Tq);
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Ts = VFNMS(LDK(KP250000000), Tr, T4);
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Tv = VSUB(T9, Te);
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Tw = VSUB(Tk, Tp);
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Tx = VMUL(LDK(KP951056516), VFMA(LDK(KP618033988), Tw, Tv));
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Tz = VMUL(LDK(KP951056516), VFNMS(LDK(KP618033988), Tv, Tw));
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ST(&(x[WS(rs, 5)]), VADD(T4, Tr), ms, &(x[WS(rs, 1)]));
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Ty = VFNMS(LDK(KP559016994), Tt, Ts);
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ST(&(x[WS(rs, 3)]), VFMAI(Tz, Ty), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 7)]), VFNMSI(Tz, Ty), ms, &(x[WS(rs, 1)]));
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Tu = VFMA(LDK(KP559016994), Tt, Ts);
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ST(&(x[WS(rs, 1)]), VFMAI(Tx, Tu), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 9)]), VFNMSI(Tx, Tu), ms, &(x[WS(rs, 1)]));
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}
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{
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V TJ, TH, TI, TN, TP, TL, TM, TO, TK;
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TJ = VSUB(TD, TG);
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TH = VADD(TD, TG);
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TI = VFNMS(LDK(KP250000000), TH, TA);
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TL = VSUB(TE, TF);
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TM = VSUB(TB, TC);
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TN = VMUL(LDK(KP951056516), VFNMS(LDK(KP618033988), TM, TL));
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TP = VMUL(LDK(KP951056516), VFMA(LDK(KP618033988), TL, TM));
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ST(&(x[0]), VADD(TA, TH), ms, &(x[0]));
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TO = VFMA(LDK(KP559016994), TJ, TI);
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ST(&(x[WS(rs, 4)]), VFNMSI(TP, TO), ms, &(x[0]));
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ST(&(x[WS(rs, 6)]), VFMAI(TP, TO), ms, &(x[0]));
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TK = VFNMS(LDK(KP559016994), TJ, TI);
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ST(&(x[WS(rs, 2)]), VFNMSI(TN, TK), ms, &(x[0]));
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ST(&(x[WS(rs, 8)]), VFMAI(TN, TK), ms, &(x[0]));
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 2),
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VTW(0, 3),
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VTW(0, 4),
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VTW(0, 5),
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VTW(0, 6),
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VTW(0, 7),
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VTW(0, 8),
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VTW(0, 9),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 10, XSIMD_STRING("t1bv_10"), twinstr, &GENUS, { 33, 22, 18, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t1bv_10) (planner *p) {
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X(kdft_dit_register) (p, t1bv_10, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_twiddle_c.native -simd -compact -variables 4 -pipeline-latency 8 -n 10 -name t1bv_10 -include dft/simd/t1b.h -sign 1 */
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/*
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* This function contains 51 FP additions, 30 FP multiplications,
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* (or, 45 additions, 24 multiplications, 6 fused multiply/add),
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* 32 stack variables, 4 constants, and 20 memory accesses
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*/
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#include "dft/simd/t1b.h"
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static void t1bv_10(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP587785252, +0.587785252292473129168705954639072768597652438);
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DVK(KP951056516, +0.951056516295153572116439333379382143405698634);
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DVK(KP250000000, +0.250000000000000000000000000000000000000000000);
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DVK(KP559016994, +0.559016994374947424102293417182819058860154590);
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{
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INT m;
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R *x;
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x = ii;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 18)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 18), MAKE_VOLATILE_STRIDE(10, rs)) {
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V Tu, TH, Tg, Tl, Tp, TD, TE, TJ, T5, Ta, To, TA, TB, TI, Tr;
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V Tt, Ts;
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Tr = LD(&(x[0]), ms, &(x[0]));
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Ts = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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Tt = BYTW(&(W[TWVL * 8]), Ts);
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Tu = VSUB(Tr, Tt);
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TH = VADD(Tr, Tt);
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{
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V Td, Tk, Tf, Ti;
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{
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V Tc, Tj, Te, Th;
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Tc = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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Td = BYTW(&(W[TWVL * 6]), Tc);
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Tj = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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Tk = BYTW(&(W[0]), Tj);
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Te = LD(&(x[WS(rs, 9)]), ms, &(x[WS(rs, 1)]));
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Tf = BYTW(&(W[TWVL * 16]), Te);
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Th = LD(&(x[WS(rs, 6)]), ms, &(x[0]));
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Ti = BYTW(&(W[TWVL * 10]), Th);
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}
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Tg = VSUB(Td, Tf);
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Tl = VSUB(Ti, Tk);
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Tp = VADD(Tg, Tl);
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TD = VADD(Td, Tf);
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TE = VADD(Ti, Tk);
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TJ = VADD(TD, TE);
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}
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{
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V T2, T9, T4, T7;
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{
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V T1, T8, T3, T6;
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T1 = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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T2 = BYTW(&(W[TWVL * 2]), T1);
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T8 = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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T9 = BYTW(&(W[TWVL * 4]), T8);
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T3 = LD(&(x[WS(rs, 7)]), ms, &(x[WS(rs, 1)]));
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T4 = BYTW(&(W[TWVL * 12]), T3);
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T6 = LD(&(x[WS(rs, 8)]), ms, &(x[0]));
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T7 = BYTW(&(W[TWVL * 14]), T6);
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}
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T5 = VSUB(T2, T4);
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Ta = VSUB(T7, T9);
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To = VADD(T5, Ta);
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TA = VADD(T2, T4);
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TB = VADD(T7, T9);
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TI = VADD(TA, TB);
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}
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{
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V Tq, Tv, Tw, Tn, Tz, Tb, Tm, Ty, Tx;
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Tq = VMUL(LDK(KP559016994), VSUB(To, Tp));
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Tv = VADD(To, Tp);
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Tw = VFNMS(LDK(KP250000000), Tv, Tu);
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Tb = VSUB(T5, Ta);
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Tm = VSUB(Tg, Tl);
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Tn = VBYI(VFMA(LDK(KP951056516), Tb, VMUL(LDK(KP587785252), Tm)));
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Tz = VBYI(VFNMS(LDK(KP951056516), Tm, VMUL(LDK(KP587785252), Tb)));
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ST(&(x[WS(rs, 5)]), VADD(Tu, Tv), ms, &(x[WS(rs, 1)]));
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Ty = VSUB(Tw, Tq);
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ST(&(x[WS(rs, 3)]), VSUB(Ty, Tz), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 7)]), VADD(Tz, Ty), ms, &(x[WS(rs, 1)]));
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Tx = VADD(Tq, Tw);
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ST(&(x[WS(rs, 1)]), VADD(Tn, Tx), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 9)]), VSUB(Tx, Tn), ms, &(x[WS(rs, 1)]));
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}
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{
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V TM, TK, TL, TG, TP, TC, TF, TO, TN;
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TM = VMUL(LDK(KP559016994), VSUB(TI, TJ));
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TK = VADD(TI, TJ);
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TL = VFNMS(LDK(KP250000000), TK, TH);
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TC = VSUB(TA, TB);
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TF = VSUB(TD, TE);
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TG = VBYI(VFNMS(LDK(KP951056516), TF, VMUL(LDK(KP587785252), TC)));
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TP = VBYI(VFMA(LDK(KP951056516), TC, VMUL(LDK(KP587785252), TF)));
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ST(&(x[0]), VADD(TH, TK), ms, &(x[0]));
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TO = VADD(TM, TL);
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ST(&(x[WS(rs, 4)]), VSUB(TO, TP), ms, &(x[0]));
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ST(&(x[WS(rs, 6)]), VADD(TP, TO), ms, &(x[0]));
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TN = VSUB(TL, TM);
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ST(&(x[WS(rs, 2)]), VADD(TG, TN), ms, &(x[0]));
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ST(&(x[WS(rs, 8)]), VSUB(TN, TG), ms, &(x[0]));
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 2),
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VTW(0, 3),
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VTW(0, 4),
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VTW(0, 5),
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VTW(0, 6),
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VTW(0, 7),
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VTW(0, 8),
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VTW(0, 9),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 10, XSIMD_STRING("t1bv_10"), twinstr, &GENUS, { 45, 24, 6, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t1bv_10) (planner *p) {
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X(kdft_dit_register) (p, t1bv_10, &desc);
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}
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#endif
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