mirror of
https://github.com/tildearrow/furnace.git
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145 lines
5.2 KiB
C
145 lines
5.2 KiB
C
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/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:47:22 EDT 2021 */
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#include "rdft/codelet-rdft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_hc2cdft_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -trivial-stores -variables 32 -no-generate-bytw -n 4 -dif -sign 1 -name hc2cbdftv_4 -include rdft/simd/hc2cbv.h */
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/*
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* This function contains 15 FP additions, 12 FP multiplications,
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* (or, 9 additions, 6 multiplications, 6 fused multiply/add),
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* 20 stack variables, 0 constants, and 8 memory accesses
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*/
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#include "rdft/simd/hc2cbv.h"
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static void hc2cbdftv_4(R *Rp, R *Ip, R *Rm, R *Im, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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{
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INT m;
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for (m = mb, W = W + ((mb - 1) * ((TWVL / VL) * 6)); m < me; m = m + VL, Rp = Rp + (VL * ms), Ip = Ip + (VL * ms), Rm = Rm - (VL * ms), Im = Im - (VL * ms), W = W + (TWVL * 6), MAKE_VOLATILE_STRIDE(16, rs)) {
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V Th, Tg, T8, Tc, T4, Ta, T7, Tb, T2, T3, T5, T6, Tf, T1, T9;
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V Td, Tj, Te, Ti;
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T2 = LD(&(Rp[0]), ms, &(Rp[0]));
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T3 = LD(&(Rm[WS(rs, 1)]), -ms, &(Rm[WS(rs, 1)]));
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T4 = VFNMSCONJ(T3, T2);
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Ta = VFMACONJ(T3, T2);
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T5 = LD(&(Rp[WS(rs, 1)]), ms, &(Rp[WS(rs, 1)]));
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T6 = LD(&(Rm[0]), -ms, &(Rm[0]));
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T7 = VFNMSCONJ(T6, T5);
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Tb = VFMACONJ(T6, T5);
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Th = VADD(Ta, Tb);
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Tf = LDW(&(W[0]));
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Tg = VZMULI(Tf, VFMAI(T7, T4));
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T1 = LDW(&(W[TWVL * 4]));
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T8 = VZMULI(T1, VFNMSI(T7, T4));
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T9 = LDW(&(W[TWVL * 2]));
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Tc = VZMUL(T9, VSUB(Ta, Tb));
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Td = VADD(T8, Tc);
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ST(&(Rp[WS(rs, 1)]), Td, ms, &(Rp[WS(rs, 1)]));
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Tj = VCONJ(VSUB(Th, Tg));
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ST(&(Rm[0]), Tj, -ms, &(Rm[0]));
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Te = VCONJ(VSUB(Tc, T8));
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ST(&(Rm[WS(rs, 1)]), Te, -ms, &(Rm[WS(rs, 1)]));
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Ti = VADD(Tg, Th);
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ST(&(Rp[0]), Ti, ms, &(Rp[0]));
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(1, 1),
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VTW(1, 2),
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VTW(1, 3),
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{ TW_NEXT, VL, 0 }
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};
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static const hc2c_desc desc = { 4, XSIMD_STRING("hc2cbdftv_4"), twinstr, &GENUS, { 9, 6, 6, 0 } };
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void XSIMD(codelet_hc2cbdftv_4) (planner *p) {
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X(khc2c_register) (p, hc2cbdftv_4, &desc, HC2C_VIA_DFT);
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}
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#else
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/* Generated by: ../../../genfft/gen_hc2cdft_c.native -simd -compact -variables 4 -pipeline-latency 8 -trivial-stores -variables 32 -no-generate-bytw -n 4 -dif -sign 1 -name hc2cbdftv_4 -include rdft/simd/hc2cbv.h */
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/*
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* This function contains 15 FP additions, 6 FP multiplications,
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* (or, 15 additions, 6 multiplications, 0 fused multiply/add),
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* 22 stack variables, 0 constants, and 8 memory accesses
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*/
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#include "rdft/simd/hc2cbv.h"
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static void hc2cbdftv_4(R *Rp, R *Ip, R *Rm, R *Im, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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{
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INT m;
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for (m = mb, W = W + ((mb - 1) * ((TWVL / VL) * 6)); m < me; m = m + VL, Rp = Rp + (VL * ms), Ip = Ip + (VL * ms), Rm = Rm - (VL * ms), Im = Im - (VL * ms), W = W + (TWVL * 6), MAKE_VOLATILE_STRIDE(16, rs)) {
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V T5, Tc, T9, Td, T2, T4, T3, T6, T8, T7, Tj, Ti, Th, Tk, Tl;
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V Ta, Te, T1, Tb, Tf, Tg;
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T2 = LD(&(Rp[0]), ms, &(Rp[0]));
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T3 = LD(&(Rm[WS(rs, 1)]), -ms, &(Rm[WS(rs, 1)]));
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T4 = VCONJ(T3);
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T5 = VSUB(T2, T4);
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Tc = VADD(T2, T4);
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T6 = LD(&(Rp[WS(rs, 1)]), ms, &(Rp[WS(rs, 1)]));
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T7 = LD(&(Rm[0]), -ms, &(Rm[0]));
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T8 = VCONJ(T7);
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T9 = VBYI(VSUB(T6, T8));
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Td = VADD(T6, T8);
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Tj = VADD(Tc, Td);
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Th = LDW(&(W[0]));
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Ti = VZMULI(Th, VADD(T5, T9));
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Tk = VADD(Ti, Tj);
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ST(&(Rp[0]), Tk, ms, &(Rp[0]));
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Tl = VCONJ(VSUB(Tj, Ti));
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ST(&(Rm[0]), Tl, -ms, &(Rm[0]));
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T1 = LDW(&(W[TWVL * 4]));
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Ta = VZMULI(T1, VSUB(T5, T9));
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Tb = LDW(&(W[TWVL * 2]));
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Te = VZMUL(Tb, VSUB(Tc, Td));
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Tf = VADD(Ta, Te);
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ST(&(Rp[WS(rs, 1)]), Tf, ms, &(Rp[WS(rs, 1)]));
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Tg = VCONJ(VSUB(Te, Ta));
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ST(&(Rm[WS(rs, 1)]), Tg, -ms, &(Rm[WS(rs, 1)]));
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(1, 1),
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VTW(1, 2),
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VTW(1, 3),
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{ TW_NEXT, VL, 0 }
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};
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static const hc2c_desc desc = { 4, XSIMD_STRING("hc2cbdftv_4"), twinstr, &GENUS, { 15, 6, 0, 0 } };
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void XSIMD(codelet_hc2cbdftv_4) (planner *p) {
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X(khc2c_register) (p, hc2cbdftv_4, &desc, HC2C_VIA_DFT);
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}
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#endif
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