mirror of
https://github.com/tildearrow/furnace.git
synced 2024-11-06 21:05:04 +00:00
327 lines
10 KiB
C
327 lines
10 KiB
C
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/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:45:23 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_notw.native -fma -simd -compact -variables 4 -pipeline-latency 8 -n 8 -name n2sv_8 -with-ostride 1 -include dft/simd/n2s.h -store-multiple 4 */
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/*
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* This function contains 52 FP additions, 8 FP multiplications,
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* (or, 44 additions, 0 multiplications, 8 fused multiply/add),
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* 34 stack variables, 1 constants, and 36 memory accesses
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*/
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#include "dft/simd/n2s.h"
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static void n2sv_8(const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs)
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{
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DVK(KP707106781, +0.707106781186547524400844362104849039284835938);
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{
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INT i;
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for (i = v; i > 0; i = i - (2 * VL), ri = ri + ((2 * VL) * ivs), ii = ii + ((2 * VL) * ivs), ro = ro + ((2 * VL) * ovs), io = io + ((2 * VL) * ovs), MAKE_VOLATILE_STRIDE(32, is), MAKE_VOLATILE_STRIDE(32, os)) {
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V T3, Tn, Ti, TC, T6, TB, Tl, To, Td, TN, Tz, TH, Ta, TM, Tu;
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V TG;
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{
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V T1, T2, Tj, Tk;
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T1 = LD(&(ri[0]), ivs, &(ri[0]));
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T2 = LD(&(ri[WS(is, 4)]), ivs, &(ri[0]));
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T3 = VADD(T1, T2);
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Tn = VSUB(T1, T2);
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{
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V Tg, Th, T4, T5;
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Tg = LD(&(ii[0]), ivs, &(ii[0]));
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Th = LD(&(ii[WS(is, 4)]), ivs, &(ii[0]));
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Ti = VADD(Tg, Th);
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TC = VSUB(Tg, Th);
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T4 = LD(&(ri[WS(is, 2)]), ivs, &(ri[0]));
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T5 = LD(&(ri[WS(is, 6)]), ivs, &(ri[0]));
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T6 = VADD(T4, T5);
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TB = VSUB(T4, T5);
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}
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Tj = LD(&(ii[WS(is, 2)]), ivs, &(ii[0]));
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Tk = LD(&(ii[WS(is, 6)]), ivs, &(ii[0]));
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Tl = VADD(Tj, Tk);
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To = VSUB(Tj, Tk);
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{
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V Tb, Tc, Tv, Tw, Tx, Ty;
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Tb = LD(&(ri[WS(is, 7)]), ivs, &(ri[WS(is, 1)]));
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Tc = LD(&(ri[WS(is, 3)]), ivs, &(ri[WS(is, 1)]));
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Tv = VSUB(Tb, Tc);
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Tw = LD(&(ii[WS(is, 7)]), ivs, &(ii[WS(is, 1)]));
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Tx = LD(&(ii[WS(is, 3)]), ivs, &(ii[WS(is, 1)]));
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Ty = VSUB(Tw, Tx);
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Td = VADD(Tb, Tc);
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TN = VADD(Tw, Tx);
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Tz = VSUB(Tv, Ty);
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TH = VADD(Tv, Ty);
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}
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{
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V T8, T9, Tq, Tr, Ts, Tt;
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T8 = LD(&(ri[WS(is, 1)]), ivs, &(ri[WS(is, 1)]));
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T9 = LD(&(ri[WS(is, 5)]), ivs, &(ri[WS(is, 1)]));
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Tq = VSUB(T8, T9);
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Tr = LD(&(ii[WS(is, 1)]), ivs, &(ii[WS(is, 1)]));
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Ts = LD(&(ii[WS(is, 5)]), ivs, &(ii[WS(is, 1)]));
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Tt = VSUB(Tr, Ts);
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Ta = VADD(T8, T9);
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TM = VADD(Tr, Ts);
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Tu = VADD(Tq, Tt);
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TG = VSUB(Tt, Tq);
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}
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}
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{
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V TR, TS, TT, TU, TV, TW, TX, TY;
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{
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V T7, Te, TP, TQ;
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T7 = VADD(T3, T6);
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Te = VADD(Ta, Td);
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TR = VSUB(T7, Te);
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STM4(&(ro[4]), TR, ovs, &(ro[0]));
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TS = VADD(T7, Te);
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STM4(&(ro[0]), TS, ovs, &(ro[0]));
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TP = VADD(Ti, Tl);
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TQ = VADD(TM, TN);
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TT = VSUB(TP, TQ);
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STM4(&(io[4]), TT, ovs, &(io[0]));
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TU = VADD(TP, TQ);
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STM4(&(io[0]), TU, ovs, &(io[0]));
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}
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{
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V Tf, Tm, TL, TO;
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Tf = VSUB(Td, Ta);
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Tm = VSUB(Ti, Tl);
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TV = VADD(Tf, Tm);
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STM4(&(io[2]), TV, ovs, &(io[0]));
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TW = VSUB(Tm, Tf);
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STM4(&(io[6]), TW, ovs, &(io[0]));
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TL = VSUB(T3, T6);
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TO = VSUB(TM, TN);
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TX = VSUB(TL, TO);
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STM4(&(ro[6]), TX, ovs, &(ro[0]));
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TY = VADD(TL, TO);
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STM4(&(ro[2]), TY, ovs, &(ro[0]));
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}
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{
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V TZ, T10, T11, T12;
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{
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V Tp, TA, TJ, TK;
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Tp = VADD(Tn, To);
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TA = VADD(Tu, Tz);
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TZ = VFNMS(LDK(KP707106781), TA, Tp);
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STM4(&(ro[5]), TZ, ovs, &(ro[1]));
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T10 = VFMA(LDK(KP707106781), TA, Tp);
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STM4(&(ro[1]), T10, ovs, &(ro[1]));
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TJ = VSUB(TC, TB);
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TK = VADD(TG, TH);
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T11 = VFNMS(LDK(KP707106781), TK, TJ);
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STM4(&(io[5]), T11, ovs, &(io[1]));
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T12 = VFMA(LDK(KP707106781), TK, TJ);
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STM4(&(io[1]), T12, ovs, &(io[1]));
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}
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{
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V TD, TE, T13, T14;
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TD = VADD(TB, TC);
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TE = VSUB(Tz, Tu);
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T13 = VFNMS(LDK(KP707106781), TE, TD);
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STM4(&(io[7]), T13, ovs, &(io[1]));
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STN4(&(io[4]), TT, T11, TW, T13, ovs);
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T14 = VFMA(LDK(KP707106781), TE, TD);
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STM4(&(io[3]), T14, ovs, &(io[1]));
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STN4(&(io[0]), TU, T12, TV, T14, ovs);
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}
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{
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V TF, TI, T15, T16;
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TF = VSUB(Tn, To);
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TI = VSUB(TG, TH);
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T15 = VFNMS(LDK(KP707106781), TI, TF);
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STM4(&(ro[7]), T15, ovs, &(ro[1]));
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STN4(&(ro[4]), TR, TZ, TX, T15, ovs);
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T16 = VFMA(LDK(KP707106781), TI, TF);
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STM4(&(ro[3]), T16, ovs, &(ro[1]));
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STN4(&(ro[0]), TS, T10, TY, T16, ovs);
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}
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}
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}
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}
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}
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VLEAVE();
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}
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static const kdft_desc desc = { 8, XSIMD_STRING("n2sv_8"), { 44, 0, 8, 0 }, &GENUS, 0, 1, 0, 0 };
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void XSIMD(codelet_n2sv_8) (planner *p) { X(kdft_register) (p, n2sv_8, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_notw.native -simd -compact -variables 4 -pipeline-latency 8 -n 8 -name n2sv_8 -with-ostride 1 -include dft/simd/n2s.h -store-multiple 4 */
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/*
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* This function contains 52 FP additions, 4 FP multiplications,
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* (or, 52 additions, 4 multiplications, 0 fused multiply/add),
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* 34 stack variables, 1 constants, and 36 memory accesses
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*/
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#include "dft/simd/n2s.h"
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static void n2sv_8(const R *ri, const R *ii, R *ro, R *io, stride is, stride os, INT v, INT ivs, INT ovs)
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{
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DVK(KP707106781, +0.707106781186547524400844362104849039284835938);
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{
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INT i;
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for (i = v; i > 0; i = i - (2 * VL), ri = ri + ((2 * VL) * ivs), ii = ii + ((2 * VL) * ivs), ro = ro + ((2 * VL) * ovs), io = io + ((2 * VL) * ovs), MAKE_VOLATILE_STRIDE(32, is), MAKE_VOLATILE_STRIDE(32, os)) {
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V T3, Tn, Ti, TC, T6, TB, Tl, To, Td, TN, Tz, TH, Ta, TM, Tu;
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V TG;
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{
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V T1, T2, Tj, Tk;
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T1 = LD(&(ri[0]), ivs, &(ri[0]));
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T2 = LD(&(ri[WS(is, 4)]), ivs, &(ri[0]));
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T3 = VADD(T1, T2);
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Tn = VSUB(T1, T2);
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{
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V Tg, Th, T4, T5;
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Tg = LD(&(ii[0]), ivs, &(ii[0]));
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Th = LD(&(ii[WS(is, 4)]), ivs, &(ii[0]));
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Ti = VADD(Tg, Th);
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TC = VSUB(Tg, Th);
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T4 = LD(&(ri[WS(is, 2)]), ivs, &(ri[0]));
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T5 = LD(&(ri[WS(is, 6)]), ivs, &(ri[0]));
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T6 = VADD(T4, T5);
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TB = VSUB(T4, T5);
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}
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Tj = LD(&(ii[WS(is, 2)]), ivs, &(ii[0]));
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Tk = LD(&(ii[WS(is, 6)]), ivs, &(ii[0]));
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Tl = VADD(Tj, Tk);
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To = VSUB(Tj, Tk);
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{
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V Tb, Tc, Tv, Tw, Tx, Ty;
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Tb = LD(&(ri[WS(is, 7)]), ivs, &(ri[WS(is, 1)]));
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Tc = LD(&(ri[WS(is, 3)]), ivs, &(ri[WS(is, 1)]));
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Tv = VSUB(Tb, Tc);
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Tw = LD(&(ii[WS(is, 7)]), ivs, &(ii[WS(is, 1)]));
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Tx = LD(&(ii[WS(is, 3)]), ivs, &(ii[WS(is, 1)]));
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Ty = VSUB(Tw, Tx);
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Td = VADD(Tb, Tc);
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TN = VADD(Tw, Tx);
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Tz = VSUB(Tv, Ty);
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TH = VADD(Tv, Ty);
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}
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{
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V T8, T9, Tq, Tr, Ts, Tt;
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T8 = LD(&(ri[WS(is, 1)]), ivs, &(ri[WS(is, 1)]));
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T9 = LD(&(ri[WS(is, 5)]), ivs, &(ri[WS(is, 1)]));
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Tq = VSUB(T8, T9);
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Tr = LD(&(ii[WS(is, 1)]), ivs, &(ii[WS(is, 1)]));
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Ts = LD(&(ii[WS(is, 5)]), ivs, &(ii[WS(is, 1)]));
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Tt = VSUB(Tr, Ts);
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Ta = VADD(T8, T9);
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TM = VADD(Tr, Ts);
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Tu = VADD(Tq, Tt);
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TG = VSUB(Tt, Tq);
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}
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}
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{
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V TR, TS, TT, TU, TV, TW, TX, TY;
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{
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V T7, Te, TP, TQ;
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T7 = VADD(T3, T6);
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Te = VADD(Ta, Td);
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TR = VSUB(T7, Te);
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STM4(&(ro[4]), TR, ovs, &(ro[0]));
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TS = VADD(T7, Te);
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STM4(&(ro[0]), TS, ovs, &(ro[0]));
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TP = VADD(Ti, Tl);
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TQ = VADD(TM, TN);
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TT = VSUB(TP, TQ);
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STM4(&(io[4]), TT, ovs, &(io[0]));
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TU = VADD(TP, TQ);
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STM4(&(io[0]), TU, ovs, &(io[0]));
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}
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{
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V Tf, Tm, TL, TO;
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Tf = VSUB(Td, Ta);
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Tm = VSUB(Ti, Tl);
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TV = VADD(Tf, Tm);
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STM4(&(io[2]), TV, ovs, &(io[0]));
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TW = VSUB(Tm, Tf);
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STM4(&(io[6]), TW, ovs, &(io[0]));
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TL = VSUB(T3, T6);
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TO = VSUB(TM, TN);
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TX = VSUB(TL, TO);
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STM4(&(ro[6]), TX, ovs, &(ro[0]));
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TY = VADD(TL, TO);
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STM4(&(ro[2]), TY, ovs, &(ro[0]));
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}
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{
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V TZ, T10, T11, T12;
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{
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V Tp, TA, TJ, TK;
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Tp = VADD(Tn, To);
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TA = VMUL(LDK(KP707106781), VADD(Tu, Tz));
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TZ = VSUB(Tp, TA);
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STM4(&(ro[5]), TZ, ovs, &(ro[1]));
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T10 = VADD(Tp, TA);
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STM4(&(ro[1]), T10, ovs, &(ro[1]));
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TJ = VSUB(TC, TB);
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TK = VMUL(LDK(KP707106781), VADD(TG, TH));
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T11 = VSUB(TJ, TK);
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STM4(&(io[5]), T11, ovs, &(io[1]));
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T12 = VADD(TJ, TK);
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STM4(&(io[1]), T12, ovs, &(io[1]));
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}
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{
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V TD, TE, T13, T14;
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TD = VADD(TB, TC);
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TE = VMUL(LDK(KP707106781), VSUB(Tz, Tu));
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T13 = VSUB(TD, TE);
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STM4(&(io[7]), T13, ovs, &(io[1]));
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STN4(&(io[4]), TT, T11, TW, T13, ovs);
|
||
|
|
T14 = VADD(TD, TE);
|
||
|
|
STM4(&(io[3]), T14, ovs, &(io[1]));
|
||
|
|
STN4(&(io[0]), TU, T12, TV, T14, ovs);
|
||
|
|
}
|
||
|
|
{
|
||
|
|
V TF, TI, T15, T16;
|
||
|
|
TF = VSUB(Tn, To);
|
||
|
|
TI = VMUL(LDK(KP707106781), VSUB(TG, TH));
|
||
|
|
T15 = VSUB(TF, TI);
|
||
|
|
STM4(&(ro[7]), T15, ovs, &(ro[1]));
|
||
|
|
STN4(&(ro[4]), TR, TZ, TX, T15, ovs);
|
||
|
|
T16 = VADD(TF, TI);
|
||
|
|
STM4(&(ro[3]), T16, ovs, &(ro[1]));
|
||
|
|
STN4(&(ro[0]), TS, T10, TY, T16, ovs);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
VLEAVE();
|
||
|
|
}
|
||
|
|
|
||
|
|
static const kdft_desc desc = { 8, XSIMD_STRING("n2sv_8"), { 52, 4, 0, 0 }, &GENUS, 0, 1, 0, 0 };
|
||
|
|
|
||
|
|
void XSIMD(codelet_n2sv_8) (planner *p) { X(kdft_register) (p, n2sv_8, &desc);
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|