2021-12-09 18:25:02 +00:00
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static unsigned short chanOffs[4]={
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0x01, 0x02, 0x101, 0x102
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};
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static unsigned short opOffs[4]={
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0x00, 0x04, 0x08, 0x0c
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};
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static bool isOutput[8][4]={
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// 1 3 2 4
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{false,false,false,true},
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{false,false,false,true},
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{false,false,false,true},
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{false,false,false,true},
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{false,false,true ,true},
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{false,true ,true ,true},
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{false,true ,true ,true},
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{true ,true ,true ,true},
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};
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static unsigned char dtTable[8]={
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7,6,5,0,1,2,3,0
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};
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static int orderedOps[4]={
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0,2,1,3
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};
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2021-12-21 06:29:07 +00:00
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#define rWrite(a,v) if (!skipRegisterWrites) {pendingWrites[a]=v;}
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2022-01-17 18:29:35 +00:00
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#define immWrite(a,v) if (!skipRegisterWrites) {writes.emplace(a,v); if (dumpWrites) {addWrite(a,v);} }
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2021-12-14 19:31:57 +00:00
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#define FM_FREQ_BASE 622.0f
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#define PSG_FREQ_BASE 7640.0f
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