mirror of
https://github.com/tildearrow/furnace.git
synced 2024-11-06 12:55:05 +00:00
233 lines
7.2 KiB
C
233 lines
7.2 KiB
C
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/*
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* Copyright (c) 2003, 2007-14 Matteo Frigo
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* Copyright (c) 2003, 2007-14 Massachusetts Institute of Technology
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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/* This file was automatically generated --- DO NOT EDIT */
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/* Generated on Tue Sep 14 10:45:55 EDT 2021 */
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#include "dft/codelet-dft.h"
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#if defined(ARCH_PREFERS_FMA) || defined(ISA_EXTENSION_PREFERS_FMA)
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/* Generated by: ../../../genfft/gen_twiddle_c.native -fma -simd -compact -variables 4 -pipeline-latency 8 -twiddle-log3 -precompute-twiddles -no-generate-bytw -n 8 -name t3bv_8 -include dft/simd/t3b.h -sign 1 */
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/*
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* This function contains 37 FP additions, 32 FP multiplications,
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* (or, 27 additions, 22 multiplications, 10 fused multiply/add),
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* 31 stack variables, 1 constants, and 16 memory accesses
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*/
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#include "dft/simd/t3b.h"
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static void t3bv_8(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP707106781, +0.707106781186547524400844362104849039284835938);
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{
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INT m;
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R *x;
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x = ii;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 6)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 6), MAKE_VOLATILE_STRIDE(8, rs)) {
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V T2, T3, Ta, T4, Tb, Tc, Tp;
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T2 = LDW(&(W[0]));
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T3 = LDW(&(W[TWVL * 2]));
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Ta = VZMULJ(T2, T3);
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T4 = VZMUL(T2, T3);
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Tb = LDW(&(W[TWVL * 4]));
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Tc = VZMULJ(Ta, Tb);
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Tp = VZMULJ(T2, Tb);
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{
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V T7, Tx, Ts, Ty, Tf, TA, Tk, TB, T1, T6, T5;
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T1 = LD(&(x[0]), ms, &(x[0]));
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T5 = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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T6 = VZMUL(T4, T5);
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T7 = VSUB(T1, T6);
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Tx = VADD(T1, T6);
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{
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V To, Tr, Tn, Tq;
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Tn = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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To = VZMUL(Ta, Tn);
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Tq = LD(&(x[WS(rs, 6)]), ms, &(x[0]));
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Tr = VZMUL(Tp, Tq);
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Ts = VSUB(To, Tr);
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Ty = VADD(To, Tr);
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}
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{
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V T9, Te, T8, Td;
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T8 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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T9 = VZMUL(T2, T8);
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Td = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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Te = VZMUL(Tc, Td);
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Tf = VSUB(T9, Te);
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TA = VADD(T9, Te);
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}
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{
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V Th, Tj, Tg, Ti;
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Tg = LD(&(x[WS(rs, 7)]), ms, &(x[WS(rs, 1)]));
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Th = VZMUL(Tb, Tg);
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Ti = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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Tj = VZMUL(T3, Ti);
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Tk = VSUB(Th, Tj);
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TB = VADD(Th, Tj);
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}
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{
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V Tz, TC, TD, TE;
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Tz = VSUB(Tx, Ty);
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TC = VSUB(TA, TB);
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ST(&(x[WS(rs, 6)]), VFNMSI(TC, Tz), ms, &(x[0]));
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ST(&(x[WS(rs, 2)]), VFMAI(TC, Tz), ms, &(x[0]));
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TD = VADD(Tx, Ty);
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TE = VADD(TA, TB);
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ST(&(x[WS(rs, 4)]), VSUB(TD, TE), ms, &(x[0]));
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ST(&(x[0]), VADD(TD, TE), ms, &(x[0]));
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{
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V Tm, Tv, Tu, Tw, Tl, Tt;
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Tl = VADD(Tf, Tk);
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Tm = VFNMS(LDK(KP707106781), Tl, T7);
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Tv = VFMA(LDK(KP707106781), Tl, T7);
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Tt = VSUB(Tf, Tk);
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Tu = VFNMS(LDK(KP707106781), Tt, Ts);
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Tw = VFMA(LDK(KP707106781), Tt, Ts);
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ST(&(x[WS(rs, 3)]), VFNMSI(Tu, Tm), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 7)]), VFNMSI(Tw, Tv), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 5)]), VFMAI(Tu, Tm), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 1)]), VFMAI(Tw, Tv), ms, &(x[WS(rs, 1)]));
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}
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}
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 3),
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VTW(0, 7),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 8, XSIMD_STRING("t3bv_8"), twinstr, &GENUS, { 27, 22, 10, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t3bv_8) (planner *p) {
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X(kdft_dit_register) (p, t3bv_8, &desc);
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}
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#else
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/* Generated by: ../../../genfft/gen_twiddle_c.native -simd -compact -variables 4 -pipeline-latency 8 -twiddle-log3 -precompute-twiddles -no-generate-bytw -n 8 -name t3bv_8 -include dft/simd/t3b.h -sign 1 */
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/*
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* This function contains 37 FP additions, 24 FP multiplications,
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* (or, 37 additions, 24 multiplications, 0 fused multiply/add),
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* 31 stack variables, 1 constants, and 16 memory accesses
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*/
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#include "dft/simd/t3b.h"
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static void t3bv_8(R *ri, R *ii, const R *W, stride rs, INT mb, INT me, INT ms)
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{
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DVK(KP707106781, +0.707106781186547524400844362104849039284835938);
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{
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INT m;
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R *x;
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x = ii;
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for (m = mb, W = W + (mb * ((TWVL / VL) * 6)); m < me; m = m + VL, x = x + (VL * ms), W = W + (TWVL * 6), MAKE_VOLATILE_STRIDE(8, rs)) {
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V T1, T4, T5, Tp, T6, T7, Tj;
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T1 = LDW(&(W[0]));
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T4 = LDW(&(W[TWVL * 2]));
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T5 = VZMULJ(T1, T4);
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Tp = VZMUL(T1, T4);
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T6 = LDW(&(W[TWVL * 4]));
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T7 = VZMULJ(T5, T6);
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Tj = VZMULJ(T1, T6);
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{
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V Ts, Tx, Tm, Ty, Ta, TA, Tf, TB, To, Tr, Tq;
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To = LD(&(x[0]), ms, &(x[0]));
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Tq = LD(&(x[WS(rs, 4)]), ms, &(x[0]));
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Tr = VZMUL(Tp, Tq);
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Ts = VSUB(To, Tr);
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Tx = VADD(To, Tr);
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{
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V Ti, Tl, Th, Tk;
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Th = LD(&(x[WS(rs, 2)]), ms, &(x[0]));
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Ti = VZMUL(T5, Th);
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Tk = LD(&(x[WS(rs, 6)]), ms, &(x[0]));
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Tl = VZMUL(Tj, Tk);
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Tm = VSUB(Ti, Tl);
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Ty = VADD(Ti, Tl);
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}
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{
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V T3, T9, T2, T8;
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T2 = LD(&(x[WS(rs, 1)]), ms, &(x[WS(rs, 1)]));
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T3 = VZMUL(T1, T2);
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T8 = LD(&(x[WS(rs, 5)]), ms, &(x[WS(rs, 1)]));
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T9 = VZMUL(T7, T8);
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Ta = VSUB(T3, T9);
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TA = VADD(T3, T9);
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}
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{
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V Tc, Te, Tb, Td;
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Tb = LD(&(x[WS(rs, 7)]), ms, &(x[WS(rs, 1)]));
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Tc = VZMUL(T6, Tb);
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Td = LD(&(x[WS(rs, 3)]), ms, &(x[WS(rs, 1)]));
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Te = VZMUL(T4, Td);
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Tf = VSUB(Tc, Te);
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TB = VADD(Tc, Te);
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}
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{
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V Tz, TC, TD, TE;
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Tz = VSUB(Tx, Ty);
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TC = VBYI(VSUB(TA, TB));
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ST(&(x[WS(rs, 6)]), VSUB(Tz, TC), ms, &(x[0]));
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ST(&(x[WS(rs, 2)]), VADD(Tz, TC), ms, &(x[0]));
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TD = VADD(Tx, Ty);
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TE = VADD(TA, TB);
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ST(&(x[WS(rs, 4)]), VSUB(TD, TE), ms, &(x[0]));
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ST(&(x[0]), VADD(TD, TE), ms, &(x[0]));
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{
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V Tn, Tv, Tu, Tw, Tg, Tt;
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Tg = VMUL(LDK(KP707106781), VSUB(Ta, Tf));
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Tn = VBYI(VSUB(Tg, Tm));
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Tv = VBYI(VADD(Tm, Tg));
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Tt = VMUL(LDK(KP707106781), VADD(Ta, Tf));
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Tu = VSUB(Ts, Tt);
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Tw = VADD(Ts, Tt);
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ST(&(x[WS(rs, 3)]), VADD(Tn, Tu), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 7)]), VSUB(Tw, Tv), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 5)]), VSUB(Tu, Tn), ms, &(x[WS(rs, 1)]));
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ST(&(x[WS(rs, 1)]), VADD(Tv, Tw), ms, &(x[WS(rs, 1)]));
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}
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}
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}
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}
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}
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VLEAVE();
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}
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static const tw_instr twinstr[] = {
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VTW(0, 1),
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VTW(0, 3),
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VTW(0, 7),
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{ TW_NEXT, VL, 0 }
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};
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static const ct_desc desc = { 8, XSIMD_STRING("t3bv_8"), twinstr, &GENUS, { 37, 24, 0, 0 }, 0, 0, 0 };
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void XSIMD(codelet_t3bv_8) (planner *p) {
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X(kdft_dit_register) (p, t3bv_8, &desc);
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}
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#endif
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