forked from etc/pineapple-src
early-access version 2447
This commit is contained in:
parent
b9da2703ad
commit
aa75af62d9
15 changed files with 132 additions and 9 deletions
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@ -1,7 +1,7 @@
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yuzu emulator early access
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=============
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This is the source code for early-access 2445.
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This is the source code for early-access 2447.
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## Legal Notice
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@ -132,6 +132,8 @@ public:
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void DownloadMemory(VAddr cpu_addr, u64 size);
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bool InlineMemory(VAddr dest_address, size_t copy_size, std::span<u8> inlined_buffer);
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void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr, u32 size);
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void DisableGraphicsUniformBuffer(size_t stage, u32 index);
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@ -834,6 +836,8 @@ void BufferCache<P>::CommitAsyncFlushesHigh() {
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return;
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}
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MICROPROFILE_SCOPE(GPU_DownloadMemory);
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const bool is_accuracy_normal =
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Settings::values.gpu_accuracy.GetValue() == Settings::GPUAccuracy::Normal;
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boost::container::small_vector<std::pair<BufferCopy, BufferId>, 1> downloads;
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u64 total_size_bytes = 0;
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@ -845,6 +849,9 @@ void BufferCache<P>::CommitAsyncFlushesHigh() {
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ForEachBufferInRange(cpu_addr, size, [&](BufferId buffer_id, Buffer& buffer) {
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buffer.ForEachDownloadRangeAndClear(
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cpu_addr, size, [&](u64 range_offset, u64 range_size) {
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if (is_accuracy_normal) {
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return;
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}
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const VAddr buffer_addr = buffer.CpuAddr();
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const auto add_download = [&](VAddr start, VAddr end) {
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const u64 new_offset = start - buffer_addr;
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@ -1443,10 +1450,8 @@ void BufferCache<P>::MarkWrittenBuffer(BufferId buffer_id, VAddr cpu_addr, u32 s
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const IntervalType base_interval{cpu_addr, cpu_addr + size};
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common_ranges.add(base_interval);
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const bool is_accuracy_high =
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Settings::values.gpu_accuracy.GetValue() == Settings::GPUAccuracy::High;
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const bool is_async = Settings::values.use_asynchronous_gpu_emulation.GetValue();
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if (!is_async && !is_accuracy_high) {
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if (!is_async) {
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return;
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}
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uncommitted_ranges.add(base_interval);
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@ -1669,6 +1674,41 @@ void BufferCache<P>::MappedUploadMemory(Buffer& buffer, u64 total_size_bytes,
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runtime.CopyBuffer(buffer, upload_staging.buffer, copies);
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}
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template <class P>
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bool BufferCache<P>::InlineMemory(VAddr dest_address, size_t copy_size,
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std::span<u8> inlined_buffer) {
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const bool is_dirty = IsRegionRegistered(dest_address, copy_size);
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if (!is_dirty) {
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return false;
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}
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if (!IsRegionGpuModified(dest_address, copy_size)) {
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return false;
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}
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const IntervalType subtract_interval{dest_address, dest_address + copy_size};
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ClearDownload(subtract_interval);
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BufferId buffer_id = FindBuffer(dest_address, static_cast<u32>(copy_size));
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auto& buffer = slot_buffers[buffer_id];
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SynchronizeBuffer(buffer, dest_address, static_cast<u32>(copy_size));
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if constexpr (USE_MEMORY_MAPS) {
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std::array copies{BufferCopy{
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.src_offset = 0,
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.dst_offset = buffer.Offset(dest_address),
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.size = copy_size,
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}};
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auto upload_staging = runtime.UploadStagingBuffer(copy_size);
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u8* const src_pointer = upload_staging.mapped_span.data();
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std::memcpy(src_pointer, inlined_buffer.data(), copy_size);
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runtime.CopyBuffer(buffer, upload_staging.buffer, copies);
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} else {
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buffer.ImmediateUpload(buffer.Offset(dest_address), inlined_buffer);
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}
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return true;
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}
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template <class P>
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void BufferCache<P>::DownloadBufferMemory(Buffer& buffer) {
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DownloadBufferMemory(buffer, buffer.CpuAddr(), buffer.SizeBytes());
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@ -7,6 +7,7 @@
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#include "common/assert.h"
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#include "video_core/engines/engine_upload.h"
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#include "video_core/memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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#include "video_core/textures/decoders.h"
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namespace Tegra::Engines::Upload {
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@ -16,6 +17,10 @@ State::State(MemoryManager& memory_manager_, Registers& regs_)
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State::~State() = default;
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void State::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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rasterizer = rasterizer_;
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}
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void State::ProcessExec(const bool is_linear_) {
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write_offset = 0;
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copy_size = regs.line_length_in * regs.line_count;
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@ -32,8 +37,7 @@ void State::ProcessData(const u32 data, const bool is_last_call) {
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}
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const GPUVAddr address{regs.dest.Address()};
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if (is_linear) {
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memory_manager.FlushRegion(address, copy_size);
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memory_manager.WriteBlock(address, inner_buffer.data(), copy_size);
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rasterizer->AccelerateInline2Memory(address, copy_size, inner_buffer);
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} else {
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UNIMPLEMENTED_IF(regs.dest.z != 0);
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UNIMPLEMENTED_IF(regs.dest.depth != 1);
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@ -12,6 +12,10 @@ namespace Tegra {
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class MemoryManager;
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}
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namespace VideoCore {
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class RasterizerInterface;
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}
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namespace Tegra::Engines::Upload {
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struct Registers {
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void ProcessExec(bool is_linear_);
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void ProcessData(u32 data, bool is_last_call);
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/// Binds a rasterizer to this engine.
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void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
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private:
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u32 write_offset = 0;
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u32 copy_size = 0;
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bool is_linear = false;
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Registers& regs;
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MemoryManager& memory_manager;
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VideoCore::RasterizerInterface* rasterizer = nullptr;
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};
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} // namespace Tegra::Engines::Upload
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@ -22,6 +22,7 @@ KeplerCompute::~KeplerCompute() = default;
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void KeplerCompute::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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rasterizer = rasterizer_;
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upload_state.BindRasterizer(rasterizer);
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}
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void KeplerCompute::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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@ -19,6 +19,10 @@ KeplerMemory::KeplerMemory(Core::System& system_, MemoryManager& memory_manager)
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KeplerMemory::~KeplerMemory() = default;
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void KeplerMemory::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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upload_state.BindRasterizer(rasterizer_);
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}
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void KeplerMemory::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid KeplerMemory register, increase the size of the Regs structure");
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@ -22,6 +22,10 @@ namespace Tegra {
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class MemoryManager;
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}
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namespace VideoCore {
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class RasterizerInterface;
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}
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namespace Tegra::Engines {
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/**
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explicit KeplerMemory(Core::System& system_, MemoryManager& memory_manager);
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~KeplerMemory() override;
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/// Binds a rasterizer to this engine.
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void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
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/// Write the value to the register identified by method.
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void CallMethod(u32 method, u32 method_argument, bool is_last_call) override;
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@ -31,6 +31,7 @@ Maxwell3D::~Maxwell3D() = default;
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void Maxwell3D::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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rasterizer = rasterizer_;
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upload_state.BindRasterizer(rasterizer_);
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}
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void Maxwell3D::InitializeRegisterDefaults() {
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@ -1557,7 +1557,8 @@ private:
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static constexpr u32 null_cb_data = 0xFFFFFFFF;
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struct CBDataState {
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std::array<std::array<u32, 0x4000>, 16> buffer;
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static constexpr size_t inline_size = 0x8000;
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std::array<std::array<u32, inline_size>, 16> buffer;
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u32 current{null_cb_data};
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u32 id{null_cb_data};
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u32 start_pos{};
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@ -59,6 +59,7 @@ struct GPU::Impl {
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maxwell_3d->BindRasterizer(rasterizer);
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fermi_2d->BindRasterizer(rasterizer);
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kepler_compute->BindRasterizer(rasterizer);
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kepler_memory->BindRasterizer(rasterizer);
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maxwell_dma->BindRasterizer(rasterizer);
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}
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case BufferMethods::SemaphoreAddressHigh:
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case BufferMethods::SemaphoreAddressLow:
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case BufferMethods::SemaphoreSequence:
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case BufferMethods::UnkCacheFlush:
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case BufferMethods::WrcacheFlush:
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break;
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case BufferMethods::UnkCacheFlush: {
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rasterizer->SyncGuestHost();
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break;
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}
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case BufferMethods::WrcacheFlush: {
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rasterizer->SignalReference();
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break;
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}
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case BufferMethods::FenceValue:
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break;
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case BufferMethods::RefCnt:
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@ -123,6 +123,9 @@ public:
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[[nodiscard]] virtual Tegra::Engines::AccelerateDMAInterface& AccessAccelerateDMA() = 0;
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virtual void AccelerateInline2Memory(GPUVAddr address, size_t copy_size,
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std::span<u8> memory) = 0;
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/// Attempt to use a faster method to display the framebuffer to screen
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[[nodiscard]] virtual bool AccelerateDisplay(const Tegra::FramebufferConfig& config,
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VAddr framebuffer_addr, u32 pixel_stride) {
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@ -484,6 +484,28 @@ Tegra::Engines::AccelerateDMAInterface& RasterizerOpenGL::AccessAccelerateDMA()
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return accelerate_dma;
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}
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void RasterizerOpenGL::AccelerateInline2Memory(GPUVAddr address, size_t copy_size,
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std::span<u8> memory) {
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auto cpu_addr = gpu_memory.GpuToCpuAddress(address);
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if (!cpu_addr) [[unlikely]] {
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gpu_memory.WriteBlock(address, memory.data(), copy_size);
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return;
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}
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gpu_memory.WriteBlockUnsafe(address, memory.data(), copy_size);
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{
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std::unique_lock<std::mutex> lock{buffer_cache.mutex};
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if (!buffer_cache.InlineMemory(*cpu_addr, copy_size, memory)) {
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buffer_cache.WriteMemory(*cpu_addr, copy_size);
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}
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}
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{
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std::scoped_lock lock_texture{texture_cache.mutex};
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texture_cache.WriteMemory(*cpu_addr, copy_size);
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}
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shader_cache.InvalidateRegion(*cpu_addr, copy_size);
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query_cache.InvalidateRegion(*cpu_addr, copy_size);
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}
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bool RasterizerOpenGL::AccelerateDisplay(const Tegra::FramebufferConfig& config,
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VAddr framebuffer_addr, u32 pixel_stride) {
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if (framebuffer_addr == 0) {
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@ -106,6 +106,7 @@ public:
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const Tegra::Engines::Fermi2D::Surface& dst,
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const Tegra::Engines::Fermi2D::Config& copy_config) override;
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Tegra::Engines::AccelerateDMAInterface& AccessAccelerateDMA() override;
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void AccelerateInline2Memory(GPUVAddr address, size_t copy_size, std::span<u8> memory) override;
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bool AccelerateDisplay(const Tegra::FramebufferConfig& config, VAddr framebuffer_addr,
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u32 pixel_stride) override;
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void LoadDiskResources(u64 title_id, std::stop_token stop_loading,
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@ -548,6 +548,28 @@ Tegra::Engines::AccelerateDMAInterface& RasterizerVulkan::AccessAccelerateDMA()
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return accelerate_dma;
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}
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void RasterizerVulkan::AccelerateInline2Memory(GPUVAddr address, size_t copy_size,
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std::span<u8> memory) {
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auto cpu_addr = gpu_memory.GpuToCpuAddress(address);
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if (!cpu_addr) [[unlikely]] {
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gpu_memory.WriteBlock(address, memory.data(), copy_size);
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return;
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}
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gpu_memory.WriteBlockUnsafe(address, memory.data(), copy_size);
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{
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std::unique_lock<std::mutex> lock{buffer_cache.mutex};
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if (!buffer_cache.InlineMemory(*cpu_addr, copy_size, memory)) {
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buffer_cache.WriteMemory(*cpu_addr, copy_size);
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}
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}
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{
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std::scoped_lock lock_texture{texture_cache.mutex};
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texture_cache.WriteMemory(*cpu_addr, copy_size);
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}
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pipeline_cache.InvalidateRegion(*cpu_addr, copy_size);
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query_cache.InvalidateRegion(*cpu_addr, copy_size);
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}
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bool RasterizerVulkan::AccelerateDisplay(const Tegra::FramebufferConfig& config,
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VAddr framebuffer_addr, u32 pixel_stride) {
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if (!framebuffer_addr) {
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@ -99,6 +99,7 @@ public:
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const Tegra::Engines::Fermi2D::Surface& dst,
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const Tegra::Engines::Fermi2D::Config& copy_config) override;
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Tegra::Engines::AccelerateDMAInterface& AccessAccelerateDMA() override;
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void AccelerateInline2Memory(GPUVAddr address, size_t copy_size, std::span<u8> memory) override;
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bool AccelerateDisplay(const Tegra::FramebufferConfig& config, VAddr framebuffer_addr,
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u32 pixel_stride) override;
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void LoadDiskResources(u64 title_id, std::stop_token stop_loading,
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