From 8aa17b7ffc8a5e29ec98a150fdcba3818ff288ef Mon Sep 17 00:00:00 2001 From: pineappleEA Date: Wed, 20 Apr 2022 01:28:43 +0200 Subject: [PATCH] early-access version 2687 --- README.md | 2 +- externals/dynarmic/externals/CMakeLists.txt | 7 +- externals/dynarmic/externals/README.md | 6 +- .../dynarmic/externals/mcl/.clang-format | 218 ++++++++++ externals/dynarmic/externals/mcl/.gitignore | 2 + .../dynarmic/externals/mcl/CMakeLists.txt | 126 ++++++ .../CreateTargetDirectoryGroups.cmake | 17 + .../mcl/CMakeModules/DetectArchitecture.cmake | 56 +++ .../mcl/CMakeModules/mclConfig.cmake.in | 5 + externals/dynarmic/externals/mcl/LICENSE | 21 + externals/dynarmic/externals/mcl/README | 17 + .../externals/mcl/include/mcl/assert.hpp | 61 +++ .../mcl/include/mcl/bit/bit_count.hpp | 54 +++ .../mcl/include/mcl/bit/bit_field.hpp | 203 ++++++++++ .../externals/mcl/include/mcl/bit/rotate.hpp | 31 ++ .../externals/mcl/include/mcl/bit/swap.hpp | 50 +++ .../externals/mcl/include/mcl/bit_cast.hpp | 36 ++ .../externals/mcl/include/mcl/bitsizeof.hpp | 15 + .../mcl/include/mcl/concepts/bit_integral.hpp | 16 + .../mcl/include/mcl/concepts/is_any_of.hpp | 14 + .../mcl/include/mcl/concepts/same_as.hpp | 19 + .../include/mcl/container/intrusive_list.hpp | 378 ++++++++++++++++++ .../externals/mcl/include/mcl/hint/assume.hpp | 13 + .../mcl/include/mcl/iterator/reverse.hpp | 34 ++ .../include/mcl/macro/anonymous_variable.hpp | 13 + .../mcl/include/mcl/macro/architecture.hpp | 40 ++ .../include/mcl/macro/concatenate_tokens.hpp | 8 + .../mcl/include/mcl/mp/metafunction/apply.hpp | 25 ++ .../mcl/include/mcl/mp/metafunction/bind.hpp | 18 + .../include/mcl/mp/metafunction/identity.hpp | 22 + .../mcl/include/mcl/mp/metafunction/map.hpp | 25 ++ .../mcl/include/mcl/mp/metavalue/bit_and.hpp | 19 + .../mcl/include/mcl/mp/metavalue/bit_not.hpp | 19 + .../mcl/include/mcl/mp/metavalue/bit_or.hpp | 19 + .../mcl/include/mcl/mp/metavalue/bit_xor.hpp | 19 + .../include/mcl/mp/metavalue/conjunction.hpp | 42 ++ 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+- .../impl/thumb32_load_store_multiple.cpp | 27 +- .../frontend/A32/translate/impl/vfp.cpp | 2 +- .../frontend/A32/translate/translate_arm.cpp | 3 +- .../A32/translate/translate_callbacks.h | 2 +- .../A32/translate/translate_thumb.cpp | 10 +- .../dynarmic/frontend/A64/a64_ir_emitter.cpp | 3 +- .../dynarmic/frontend/A64/a64_ir_emitter.h | 3 +- .../frontend/A64/a64_location_descriptor.h | 11 +- .../src/dynarmic/frontend/A64/a64_types.h | 5 +- .../src/dynarmic/frontend/A64/decoder/a64.h | 7 +- .../frontend/A64/translate/a64_translate.h | 2 +- .../frontend/A64/translate/impl/impl.cpp | 17 +- .../frontend/A64/translate/impl/simd_copy.cpp | 17 +- .../impl/simd_modified_immediate.cpp | 5 +- .../impl/simd_scalar_shift_by_immediate.cpp | 10 +- .../translate/impl/simd_scalar_three_same.cpp | 3 +- .../impl/simd_shift_by_immediate.cpp | 23 +- .../impl/simd_vector_x_indexed_element.cpp | 3 +- .../frontend/decoder/decoder_detail.h | 13 +- .../src/dynarmic/frontend/decoder/matcher.h | 2 +- .../dynarmic/src/dynarmic/frontend/imm.cpp | 42 +- .../dynarmic/src/dynarmic/frontend/imm.h | 24 +- .../dynarmic/src/dynarmic/ir/basic_block.cpp | 2 +- .../dynarmic/src/dynarmic/ir/basic_block.h | 7 +- .../dynarmic/src/dynarmic/ir/ir_emitter.cpp | 13 +- .../dynarmic/src/dynarmic/ir/ir_emitter.h | 3 +- .../src/dynarmic/ir/location_descriptor.h | 2 +- .../src/dynarmic/ir/microinstruction.cpp | 2 +- .../src/dynarmic/ir/microinstruction.h | 7 +- externals/dynarmic/src/dynarmic/ir/opcodes.h | 2 +- .../ir/opt/a32_get_set_elimination_pass.cpp | 5 +- .../ir/opt/a64_get_set_elimination_pass.cpp | 3 +- .../ir/opt/a64_merge_interpret_blocks.cpp | 2 +- .../ir/opt/constant_propagation_pass.cpp | 24 +- .../ir/opt/dead_code_elimination_pass.cpp | 5 +- .../dynarmic/ir/opt/identity_removal_pass.cpp | 3 +- .../src/dynarmic/ir/opt/verification_pass.cpp | 5 +- externals/dynarmic/src/dynarmic/ir/terminal.h | 2 +- externals/dynarmic/src/dynarmic/ir/type.h | 2 +- externals/dynarmic/src/dynarmic/ir/value.cpp | 11 +- externals/dynarmic/src/dynarmic/ir/value.h | 5 +- externals/dynarmic/tests/A32/fuzz_arm.cpp | 10 +- externals/dynarmic/tests/A32/fuzz_thumb.cpp | 108 ++--- .../tests/A32/test_thumb_instructions.cpp | 2 +- externals/dynarmic/tests/A32/testenv.h | 5 +- externals/dynarmic/tests/A64/a64.cpp | 60 +++ .../dynarmic/tests/A64/fuzz_with_unicorn.cpp | 4 +- externals/dynarmic/tests/A64/testenv.h | 5 +- externals/dynarmic/tests/CMakeLists.txt | 4 +- externals/dynarmic/tests/decoder_tests.cpp | 2 +- externals/dynarmic/tests/fp/FPToFixed.cpp | 2 +- .../dynarmic/tests/fp/mantissa_util_tests.cpp | 4 +- .../dynarmic/tests/fp/unpacked_tests.cpp | 2 +- externals/dynarmic/tests/fuzz_util.cpp | 2 +- externals/dynarmic/tests/fuzz_util.h | 2 +- externals/dynarmic/tests/print_info.cpp | 6 +- externals/dynarmic/tests/rsqrt_test.cpp | 2 +- .../tests/unicorn_emu/a32_unicorn.cpp | 9 +- .../dynarmic/tests/unicorn_emu/a32_unicorn.h | 3 +- .../tests/unicorn_emu/a64_unicorn.cpp | 2 +- .../dynarmic/tests/unicorn_emu/a64_unicorn.h | 3 +- 251 files changed, 4148 insertions(+), 1023 deletions(-) create mode 100755 externals/dynarmic/externals/mcl/.clang-format create mode 100755 externals/dynarmic/externals/mcl/.gitignore create mode 100755 externals/dynarmic/externals/mcl/CMakeLists.txt create mode 100755 externals/dynarmic/externals/mcl/CMakeModules/CreateTargetDirectoryGroups.cmake create mode 100755 externals/dynarmic/externals/mcl/CMakeModules/DetectArchitecture.cmake create mode 100755 externals/dynarmic/externals/mcl/CMakeModules/mclConfig.cmake.in create mode 100755 externals/dynarmic/externals/mcl/LICENSE create mode 100755 externals/dynarmic/externals/mcl/README create mode 100755 externals/dynarmic/externals/mcl/include/mcl/assert.hpp create mode 100755 externals/dynarmic/externals/mcl/include/mcl/bit/bit_count.hpp create mode 100755 externals/dynarmic/externals/mcl/include/mcl/bit/bit_field.hpp create mode 100755 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externals/dynarmic/externals/mcl/tests/mp/metavalue_tests.cpp create mode 100755 externals/dynarmic/externals/mcl/tests/mp/typelist_tests.cpp create mode 100755 externals/dynarmic/externals/mcl/tests/type_traits/type_traits_tests.cpp diff --git a/README.md b/README.md index af35d50de..9cf6d2cca 100755 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ yuzu emulator early access ============= -This is the source code for early-access 2686. +This is the source code for early-access 2687. ## Legal Notice diff --git a/externals/dynarmic/externals/CMakeLists.txt b/externals/dynarmic/externals/CMakeLists.txt index c9649515b..7adf018fa 100755 --- a/externals/dynarmic/externals/CMakeLists.txt +++ b/externals/dynarmic/externals/CMakeLists.txt @@ -19,10 +19,11 @@ if (NOT TARGET fmt AND NOT TARGET fmt::fmt) add_subdirectory(fmt) endif() -# mp +# mcl -add_library(mp INTERFACE) -target_include_directories(mp INTERFACE $) +if (NOT TARGET merry::mcl) + add_subdirectory(mcl) +endif() # robin-map diff --git a/externals/dynarmic/externals/README.md b/externals/dynarmic/externals/README.md index 94ba26b0b..0994cad4d 100755 --- a/externals/dynarmic/externals/README.md +++ b/externals/dynarmic/externals/README.md @@ -4,7 +4,7 @@ This repository uses subtrees to manage some of its externals. ``` git remote add externals-fmt https://github.com/fmtlib/fmt.git --no-tags -git remote add externals-mp https://github.com/MerryMage/mp.git --no-tags +git remote add externals-mcl https://github.com/merryhime/mcl.git --no-tags git remote add externals-robin-map https://github.com/Tessil/robin-map.git --no-tags git remote add externals-vixl https://git.linaro.org/arm/vixl.git --no-tags git remote add externals-xbyak https://github.com/herumi/xbyak.git --no-tags @@ -18,14 +18,14 @@ Change `` to refer to the appropriate git reference. ``` git fetch externals-fmt -git fetch externals-mp +git fetch externals-mcl git fetch externals-robin-map git fetch externals-vixl git fetch externals-xbyak git fetch externals-zycore git fetch externals-zydis git subtree pull --squash --prefix=externals/fmt externals-fmt -git subtree pull --squash --prefix=externals/mp externals-mp +git subtree pull --squash --prefix=externals/mcl externals-mcl git subtree pull --squash --prefix=externals/robin-map externals-robin-map git subtree pull --squash --prefix=externals/vixl/vixl externals-vixl git subtree pull --squash --prefix=externals/xbyak externals-xbyak diff --git a/externals/dynarmic/externals/mcl/.clang-format b/externals/dynarmic/externals/mcl/.clang-format new file mode 100755 index 000000000..5c5555eae --- /dev/null +++ b/externals/dynarmic/externals/mcl/.clang-format @@ -0,0 +1,218 @@ +--- +Language: Cpp +AccessModifierOffset: -4 +AlignAfterOpenBracket: Align +AlignConsecutiveMacros: None +AlignConsecutiveAssignments: None +AlignConsecutiveBitFields: None +AlignConsecutiveDeclarations: None +AlignConsecutiveMacros: None +AlignEscapedNewlines: Right +AlignOperands: AlignAfterOperator +AlignTrailingComments: true +AllowAllArgumentsOnNextLine: true +AllowAllConstructorInitializersOnNextLine: true +AllowAllParametersOfDeclarationOnNextLine: true +AllowShortEnumsOnASingleLine: true +AllowShortBlocksOnASingleLine: Empty +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: Inline +AllowShortLambdasOnASingleLine: All +AllowShortIfStatementsOnASingleLine: Never +AllowShortLoopsOnASingleLine: false +AlwaysBreakAfterDefinitionReturnType: None +AlwaysBreakAfterReturnType: None +AlwaysBreakBeforeMultilineStrings: true +AlwaysBreakTemplateDeclarations: Yes +AttributeMacros: + - __capability +BinPackArguments: true +BinPackParameters: false +BitFieldColonSpacing: Both +BraceWrapping: + AfterCaseLabel: false + AfterClass: false + AfterControlStatement: Never + AfterEnum: false + AfterFunction: false + AfterNamespace: false + AfterObjCDeclaration: false + AfterStruct: false + AfterUnion: false + AfterExternBlock: false + BeforeCatch: false + BeforeElse: false + BeforeLambdaBody: false + BeforeWhile: false + IndentBraces: false + SplitEmptyFunction: false + SplitEmptyRecord: false + SplitEmptyNamespace: false +BreakBeforeBinaryOperators: All +BreakBeforeBraces: Custom +BreakBeforeConceptDeclarations: true +BreakBeforeTernaryOperators: true +BreakBeforeInheritanceComma: false +BreakConstructorInitializersBeforeComma: true +BreakConstructorInitializers: BeforeComma +BreakInheritanceList: BeforeComma +BreakAfterJavaFieldAnnotations: false +BreakStringLiterals: true +ColumnLimit: 0 +CommentPragmas: '^ IWYU pragma:' +CompactNamespaces: false +ConstructorInitializerAllOnOneLineOrOnePerLine: true +ConstructorInitializerIndentWidth: 8 +ContinuationIndentWidth: 4 +Cpp11BracedListStyle: true +DeriveLineEnding: true +DerivePointerAlignment: false +DisableFormat: false +# EmptyLineAfterAccessModifier: Leave +EmptyLineBeforeAccessModifier: Always +ExperimentalAutoDetectBinPacking: false +FixNamespaceComments: true +ForEachMacros: + - foreach + - Q_FOREACH + - BOOST_FOREACH +IncludeBlocks: Regroup +IncludeCategories: + - Regex: '^' + Priority: 1 + SortPriority: 0 + CaseSensitive: false + - Regex: '(^)|(^)|(^)' + Priority: 1 + SortPriority: 0 + CaseSensitive: false + - Regex: '^<([^\.])*>$' + Priority: 2 + SortPriority: 0 + CaseSensitive: false + - Regex: '^<.*\.' + Priority: 3 + SortPriority: 0 + CaseSensitive: false + - Regex: '.*' + Priority: 4 + SortPriority: 0 + CaseSensitive: false +IncludeIsMainRegex: '([-_](test|unittest))?$' +IncludeIsMainSourceRegex: '' +# IndentAccessModifiers: false +IndentCaseBlocks: false +IndentCaseLabels: false +IndentExternBlock: NoIndent +IndentGotoLabels: false +IndentPPDirectives: AfterHash +IndentRequires: false +IndentWidth: 4 +IndentWrappedFunctionNames: false +# InsertTrailingCommas: None +JavaScriptQuotes: Leave +JavaScriptWrapImports: true +KeepEmptyLinesAtTheStartOfBlocks: false +MacroBlockBegin: '' +MacroBlockEnd: '' +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +NamespaceMacros: +ObjCBinPackProtocolList: Never +ObjCBlockIndentWidth: 2 +ObjCBreakBeforeNestedBlockParam: true +ObjCSpaceAfterProperty: false +ObjCSpaceBeforeProtocolList: true +PenaltyBreakAssignment: 2 +PenaltyBreakBeforeFirstCallParameter: 1 +PenaltyBreakComment: 300 +PenaltyBreakFirstLessLess: 120 +PenaltyBreakString: 1000 +PenaltyBreakTemplateDeclaration: 10 +PenaltyExcessCharacter: 1000000 +PenaltyReturnTypeOnItsOwnLine: 200 +PenaltyIndentedWhitespace: 0 +PointerAlignment: Left +RawStringFormats: + - Language: Cpp + Delimiters: + - cc + - CC + - cpp + - Cpp + - CPP + - 'c++' + - 'C++' + CanonicalDelimiter: '' + BasedOnStyle: google + - Language: TextProto + Delimiters: + - pb + - PB + - proto + - PROTO + EnclosingFunctions: + - EqualsProto + - EquivToProto + - PARSE_PARTIAL_TEXT_PROTO + - PARSE_TEST_PROTO + - PARSE_TEXT_PROTO + - ParseTextOrDie + - ParseTextProtoOrDie + - ParseTestProto + - ParsePartialTestProto + CanonicalDelimiter: '' + BasedOnStyle: google +ReflowComments: true +# ShortNamespaceLines: 5 +SortIncludes: true +SortJavaStaticImport: Before +SortUsingDeclarations: true +SpaceAfterCStyleCast: false +SpaceAfterLogicalNot: false +SpaceAfterTemplateKeyword: false +SpaceAroundPointerQualifiers: Default +SpaceBeforeAssignmentOperators: true +SpaceBeforeCaseColon: false +SpaceBeforeCpp11BracedList: false +SpaceBeforeCtorInitializerColon: true +SpaceBeforeInheritanceColon: true +SpaceBeforeParens: ControlStatements +SpaceAroundPointerQualifiers: Default +SpaceBeforeRangeBasedForLoopColon: true +SpaceBeforeSquareBrackets: false +SpaceInEmptyBlock: false +SpaceInEmptyParentheses: false +SpacesBeforeTrailingComments: 2 +SpacesInAngles: false +SpacesInConditionalStatement: false +SpacesInCStyleCastParentheses: false +SpacesInConditionalStatement: false +SpacesInContainerLiterals: false +# SpacesInLineCommentPrefix: -1 +SpacesInParentheses: false +SpacesInSquareBrackets: false +Standard: Latest +StatementAttributeLikeMacros: + - Q_EMIT +StatementMacros: + - Q_UNUSED + - QT_REQUIRE_VERSION +TabWidth: 4 +TypenameMacros: +UseCRLF: false +UseTab: Never +WhitespaceSensitiveMacros: + - STRINGIZE + - PP_STRINGIZE + - BOOST_PP_STRINGIZE + - NS_SWIFT_NAME + - CF_SWIFT_NAME + - FCODE + - ICODE +... + diff --git a/externals/dynarmic/externals/mcl/.gitignore b/externals/dynarmic/externals/mcl/.gitignore new file mode 100755 index 000000000..547b4ec7e --- /dev/null +++ b/externals/dynarmic/externals/mcl/.gitignore @@ -0,0 +1,2 @@ +*build*/ +.DS_Store diff --git a/externals/dynarmic/externals/mcl/CMakeLists.txt b/externals/dynarmic/externals/mcl/CMakeLists.txt new file mode 100755 index 000000000..5b0cfa296 --- /dev/null +++ b/externals/dynarmic/externals/mcl/CMakeLists.txt @@ -0,0 +1,126 @@ +cmake_minimum_required(VERSION 3.12 FATAL_ERROR) +include(GNUInstallDirs) + +project(mcl LANGUAGES CXX VERSION 0.1.5) + +# Project options +option(MCL_WARNINGS_AS_ERRORS "Warnings as errors" ON) + +# Default to a Release build +if (NOT CMAKE_BUILD_TYPE) + set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Choose the type of build, options are: Debug Release RelWithDebInfo MinSizeRel." FORCE) + message(STATUS "Defaulting to a Release build") +endif() + +# Set hard requirements for C++ +set(CMAKE_CXX_STANDARD 20) +set(CMAKE_CXX_STANDARD_REQUIRED ON) +set(CMAKE_CXX_EXTENSIONS OFF) + +# Warn on CMake API deprecations +set(CMAKE_WARN_DEPRECATED ON) + +# Disable in-source builds +set(CMAKE_DISABLE_SOURCE_CHANGES ON) +set(CMAKE_DISABLE_IN_SOURCE_BUILD ON) +if ("${CMAKE_SOURCE_DIR}" STREQUAL "${CMAKE_BINARY_DIR}") + message(SEND_ERROR "In-source builds are not allowed.") +endif() + +# Add the module directory to the list of paths +list(APPEND CMAKE_MODULE_PATH "${PROJECT_SOURCE_DIR}/CMakeModules") + +# Compiler flags +if (MSVC) + set(MCL_CXX_FLAGS + /std:c++latest + /experimental:external + /external:W0 + /external:anglebrackets + /W4 + /w44263 # Non-virtual member function hides base class virtual function + /w44265 # Class has virtual functions, but destructor is not virtual + /w44456 # Declaration of 'var' hides previous local declaration + /w44457 # Declaration of 'var' hides function parameter + /w44458 # Declaration of 'var' hides class member + /w44459 # Declaration of 'var' hides global definition + /w44946 # Reinterpret-cast between related types + /wd4592 # Symbol will be dynamically initialized (implementation limitation) + /permissive- # Stricter C++ standards conformance + /MP + /Zi + /Zo + /EHsc + /Zc:externConstexpr # Allows external linkage for variables declared "extern constexpr", as the standard permits. + /Zc:inline # Omits inline functions from object-file output. + /Zc:throwingNew # Assumes new (without std::nothrow) never returns null. + /volatile:iso # Use strict standard-abiding volatile semantics + /bigobj # Increase number of sections in .obj files + /DNOMINMAX) + + if (MCL_WARNINGS_AS_ERRORS) + list(APPEND MCL_CXX_FLAGS /WX) + endif() + + if (CMAKE_VS_PLATFORM_TOOLSET MATCHES "LLVM-vs[0-9]+") + list(APPEND MCL_CXX_FLAGS + -Qunused-arguments + -Wno-missing-braces) + endif() +else() + set(MCL_CXX_FLAGS + -Wall + -Wextra + -Wcast-qual + -pedantic + -pedantic-errors + -Wfatal-errors + -Wno-missing-braces) + + if (MCL_WARNINGS_AS_ERRORS) + list(APPEND MCL_CXX_FLAGS -Werror) + endif() +endif() + +# Dependencies + +if (NOT TARGET Catch2::Catch2) + find_package(Catch2 QUIET) +endif() + +if (NOT TARGET fmt::fmt) + find_package(fmt REQUIRED) +endif() + +# Project files + +add_subdirectory(src) +if (TARGET Catch2::Catch2) + add_subdirectory(tests) +endif() + +# Install instructions + +include(GNUInstallDirs) +include(CMakePackageConfigHelpers) + +install(TARGETS mcl EXPORT mclTargets) +install(EXPORT mclTargets + NAMESPACE merry:: + DESTINATION "${CMAKE_INSTALL_LIBDIR}/cmake/mcl" +) + +configure_package_config_file(CMakeModules/mclConfig.cmake.in + mclConfig.cmake + INSTALL_DESTINATION "${CMAKE_INSTALL_LIBDIR}/cmake/mcl" +) +write_basic_package_version_file(mclConfigVersion.cmake + COMPATIBILITY SameMajorVersion +) +install(FILES + "${CMAKE_CURRENT_BINARY_DIR}/mclConfig.cmake" + "${CMAKE_CURRENT_BINARY_DIR}/mclConfigVersion.cmake" + DESTINATION "${CMAKE_INSTALL_LIBDIR}/cmake/mcl" +) + +install(DIRECTORY include/ TYPE INCLUDE FILES_MATCHING PATTERN "*.hpp") diff --git a/externals/dynarmic/externals/mcl/CMakeModules/CreateTargetDirectoryGroups.cmake b/externals/dynarmic/externals/mcl/CMakeModules/CreateTargetDirectoryGroups.cmake new file mode 100755 index 000000000..175899e7d --- /dev/null +++ b/externals/dynarmic/externals/mcl/CMakeModules/CreateTargetDirectoryGroups.cmake @@ -0,0 +1,17 @@ +# This function should be passed a name of an existing target. It will automatically generate +# file groups following the directory hierarchy, so that the layout of the files in IDEs matches the +# one in the filesystem. +function(create_target_directory_groups target_name) + # Place any files that aren't in the source list in a separate group so that they don't get in + # the way. + source_group("Other Files" REGULAR_EXPRESSION ".") + + get_target_property(target_sources "${target_name}" SOURCES) + + foreach(file_name IN LISTS target_sources) + get_filename_component(dir_name "${file_name}" PATH) + # Group names use '\' as a separator even though the entire rest of CMake uses '/'... + string(REPLACE "/" "\\" group_name "${dir_name}") + source_group("${group_name}" FILES "${file_name}") + endforeach() +endfunction() diff --git a/externals/dynarmic/externals/mcl/CMakeModules/DetectArchitecture.cmake b/externals/dynarmic/externals/mcl/CMakeModules/DetectArchitecture.cmake new file mode 100755 index 000000000..1fbd5e9df --- /dev/null +++ b/externals/dynarmic/externals/mcl/CMakeModules/DetectArchitecture.cmake @@ -0,0 +1,56 @@ +include(CheckSymbolExists) + +function(detect_architecture symbol arch) + if (NOT DEFINED ARCHITECTURE) + set(CMAKE_REQUIRED_QUIET YES) + check_symbol_exists("${symbol}" "" DETECT_ARCHITECTURE_${arch}) + unset(CMAKE_REQUIRED_QUIET) + + if (DETECT_ARCHITECTURE_${arch}) + set(ARCHITECTURE "${arch}" PARENT_SCOPE) + endif() + + unset(DETECT_ARCHITECTURE_${arch} CACHE) + endif() +endfunction() + +detect_architecture("__ARM64__" arm64) +detect_architecture("__aarch64__" arm64) +detect_architecture("_M_ARM64" arm64) + +detect_architecture("__arm__" arm32) +detect_architecture("__TARGET_ARCH_ARM" arm32) +detect_architecture("_M_ARM" arm32) + +detect_architecture("__x86_64" x86_64) +detect_architecture("__x86_64__" x86_64) +detect_architecture("__amd64" x86_64) +detect_architecture("_M_X64" x86_64) + +detect_architecture("__i386" x86_32) +detect_architecture("__i386__" x86_32) +detect_architecture("_M_IX86" x86_32) + +detect_architecture("__ia64" ia64) +detect_architecture("__ia64__" ia64) +detect_architecture("_M_IA64" ia64) + +detect_architecture("__mips" mips) +detect_architecture("__mips__" mips) +detect_architecture("_M_MRX000" mips) + +detect_architecture("__ppc64__" ppc64) +detect_architecture("__powerpc64__" ppc64) + +detect_architecture("__ppc__" ppc32) +detect_architecture("__ppc" ppc32) +detect_architecture("__powerpc__" ppc32) +detect_architecture("_ARCH_COM" ppc32) +detect_architecture("_ARCH_PWR" ppc32) +detect_architecture("_ARCH_PPC" ppc32) +detect_architecture("_M_MPPC" ppc32) +detect_architecture("_M_PPC" ppc32) + +detect_architecture("__riscv" riscv) + +detect_architecture("__EMSCRIPTEN__" wasm) diff --git a/externals/dynarmic/externals/mcl/CMakeModules/mclConfig.cmake.in b/externals/dynarmic/externals/mcl/CMakeModules/mclConfig.cmake.in new file mode 100755 index 000000000..8c9ad12aa --- /dev/null +++ b/externals/dynarmic/externals/mcl/CMakeModules/mclConfig.cmake.in @@ -0,0 +1,5 @@ +@PACKAGE_INIT@ + +include("${CMAKE_CURRENT_LIST_DIR}/@PROJECT_NAME@Targets.cmake") + +check_required_components(@PROJECT_NAME@) diff --git a/externals/dynarmic/externals/mcl/LICENSE b/externals/dynarmic/externals/mcl/LICENSE new file mode 100755 index 000000000..614ef7559 --- /dev/null +++ b/externals/dynarmic/externals/mcl/LICENSE @@ -0,0 +1,21 @@ +MIT License + +Copyright (c) 2022 merryhime + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/externals/dynarmic/externals/mcl/README b/externals/dynarmic/externals/mcl/README new file mode 100755 index 000000000..55feacebd --- /dev/null +++ b/externals/dynarmic/externals/mcl/README @@ -0,0 +1,17 @@ + + oooo + `888 + ooo. .oo. .oo. .ooooo. 888 + `888P"Y88bP"Y88b d88' `"Y8 888 + 888 888 888 888 888 + 888 888 888 888 .o8 888 + o888o o888o o888o `Y8bod8P' o888o + + + .-.-. .-.-. .-.-. .-.-. .-.-. .-.-. .-.-. .-.-. .-.-. .-.-. + / / \ \ / / \ \ / / \ \ / / \ \ / / \ \ / / \ \ / / \ \ / / \ \ / / \ \ / / \ \ +`-' `-`-' `-`-' `-`-' `-`-' `-`-' `-`-' `-`-' `-`-' `-`-' `-` + +A collection of C++20 utilities which is common to a number of merry's projects. + +MIT licensed. diff --git a/externals/dynarmic/externals/mcl/include/mcl/assert.hpp b/externals/dynarmic/externals/mcl/include/mcl/assert.hpp new file mode 100755 index 000000000..3b9377a7b --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/assert.hpp @@ -0,0 +1,61 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include + +#include + +#include "mcl/hint/assume.hpp" + +namespace mcl::detail { + +[[noreturn]] void assert_terminate_impl(fmt::string_view msg, fmt::format_args args); + +template +[[noreturn]] void assert_terminate(fmt::string_view msg, Ts... args) { + assert_terminate_impl(msg, fmt::make_format_args(args...)); +} + +} // namespace mcl::detail + +#define UNREACHABLE() ASSERT_FALSE("Unreachable code!") + +#define ASSERT(expr) \ + [&] { \ + if (std::is_constant_evaluated()) { \ + if (!(expr)) { \ + throw std::logic_error{"ASSERT failed at compile time"}; \ + } \ + } else { \ + if (!(expr)) [[unlikely]] { \ + ::mcl::detail::assert_terminate(#expr); \ + } \ + } \ + }() + +#define ASSERT_MSG(expr, ...) \ + [&] { \ + if (std::is_constant_evaluated()) { \ + if (!(expr)) { \ + throw std::logic_error{"ASSERT_MSG failed at compile time"}; \ + } \ + } else { \ + if (!(expr)) [[unlikely]] { \ + ::mcl::detail::assert_terminate(#expr "\nMessage: " __VA_ARGS__); \ + } \ + } \ + }() + +#define ASSERT_FALSE(...) ::mcl::detail::assert_terminate("false\nMessage: " __VA_ARGS__) + +#if defined(NDEBUG) || defined(MCL_IGNORE_ASSERTS) +# define DEBUG_ASSERT(expr) ASSUME(expr) +# define DEBUG_ASSERT_MSG(expr, ...) ASSUME(expr) +#else +# define DEBUG_ASSERT(expr) ASSERT(expr) +# define DEBUG_ASSERT_MSG(expr, ...) ASSERT_MSG(expr, __VA_ARGS__) +#endif diff --git a/externals/dynarmic/externals/mcl/include/mcl/bit/bit_count.hpp b/externals/dynarmic/externals/mcl/include/mcl/bit/bit_count.hpp new file mode 100755 index 000000000..c08abd000 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/bit/bit_count.hpp @@ -0,0 +1,54 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +#include "mcl/bitsizeof.hpp" +#include "mcl/concepts/bit_integral.hpp" +#include "mcl/stdint.hpp" + +namespace mcl::bit { + +template +inline size_t count_ones(T x) { + return std::bitset>(x).count(); +} + +template +constexpr size_t count_leading_zeros(T x) { + size_t result = bitsizeof; + while (x != 0) { + x >>= 1; + result--; + } + return result; +} + +template +constexpr int highest_set_bit(T x) { + int result = -1; + while (x != 0) { + x >>= 1; + result++; + } + return result; +} + +template +constexpr size_t lowest_set_bit(T x) { + if (x == 0) { + return bitsizeof; + } + + size_t result = 0; + while ((x & 1) == 0) { + x >>= 1; + result++; + } + return result; +} + +} // namespace mcl::bit diff --git a/externals/dynarmic/externals/mcl/include/mcl/bit/bit_field.hpp b/externals/dynarmic/externals/mcl/include/mcl/bit/bit_field.hpp new file mode 100755 index 000000000..c09eda0a3 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/bit/bit_field.hpp @@ -0,0 +1,203 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/assert.hpp" +#include "mcl/bitsizeof.hpp" +#include "mcl/concepts/bit_integral.hpp" +#include "mcl/stdint.hpp" + +namespace mcl::bit { + +/// Create a mask with `count` number of one bits. +template +constexpr T ones() { + static_assert(count <= bitsizeof, "count larger than bitsize of T"); + + if constexpr (count == 0) { + return 0; + } else { + return static_cast(~static_cast(0)) >> (bitsizeof - count); + } +} + +/// Create a mask with `count` number of one bits. +template +constexpr T ones(size_t count) { + ASSERT_MSG(count <= bitsizeof, "count larger than bitsize of T"); + + if (count == 0) { + return 0; + } + return static_cast(~static_cast(0)) >> (bitsizeof - count); +} + +/// Create a mask of type T for bits [begin_bit, end_bit] inclusive. +template +constexpr T mask() { + static_assert(begin_bit <= end_bit, "invalid bit range (position of beginning bit cannot be greater than that of end bit)"); + static_assert(begin_bit < bitsizeof, "begin_bit must be smaller than size of T"); + static_assert(end_bit < bitsizeof, "end_bit must be smaller than size of T"); + + return ones() << begin_bit; +} + +/// Create a mask of type T for bits [begin_bit, end_bit] inclusive. +template +constexpr T mask(size_t begin_bit, size_t end_bit) { + ASSERT_MSG(begin_bit <= end_bit, "invalid bit range (position of beginning bit cannot be greater than that of end bit)"); + ASSERT_MSG(begin_bit < bitsizeof, "begin_bit must be smaller than size of T"); + ASSERT_MSG(end_bit < bitsizeof, "end_bit must be smaller than size of T"); + + return ones(end_bit - begin_bit + 1) << begin_bit; +} + +/// Extract bits [begin_bit, end_bit] inclusive from value of type T. +template +constexpr T get_bits(T value) { + constexpr T m = mask(); + return (value & m) >> begin_bit; +} + +/// Extract bits [begin_bit, end_bit] inclusive from value of type T. +template +constexpr T get_bits(size_t begin_bit, size_t end_bit, T value) { + const T m = mask(begin_bit, end_bit); + return (value & m) >> begin_bit; +} + +/// Clears bits [begin_bit, end_bit] inclusive of value of type T. +template +constexpr T clear_bits(T value) { + constexpr T m = mask(); + return value & ~m; +} + +/// Clears bits [begin_bit, end_bit] inclusive of value of type T. +template +constexpr T clear_bits(size_t begin_bit, size_t end_bit, T value) { + const T m = mask(begin_bit, end_bit); + return value & ~m; +} + +/// Modifies bits [begin_bit, end_bit] inclusive of value of type T. +template +constexpr T set_bits(T value, T new_bits) { + constexpr T m = mask(); + return (value & ~m) | ((new_bits << begin_bit) & m); +} + +/// Modifies bits [begin_bit, end_bit] inclusive of value of type T. +template +constexpr T set_bits(size_t begin_bit, size_t end_bit, T value, T new_bits) { + const T m = mask(begin_bit, end_bit); + return (value & ~m) | ((new_bits << begin_bit) & m); +} + +/// Extract bit at bit_position from value of type T. +template +constexpr bool get_bit(T value) { + constexpr T m = mask(); + return (value & m) != 0; +} + +/// Extract bit at bit_position from value of type T. +template +constexpr bool get_bit(size_t bit_position, T value) { + const T m = mask(bit_position, bit_position); + return (value & m) != 0; +} + +/// Clears bit at bit_position of value of type T. +template +constexpr T clear_bit(T value) { + constexpr T m = mask(); + return value & ~m; +} + +/// Clears bit at bit_position of value of type T. +template +constexpr T clear_bit(size_t bit_position, T value) { + const T m = mask(bit_position, bit_position); + return value & ~m; +} + +/// Modifies bit at bit_position of value of type T. +template +constexpr T set_bit(T value, bool new_bit) { + constexpr T m = mask(); + return (value & ~m) | (new_bit ? m : static_cast(0)); +} + +/// Modifies bit at bit_position of value of type T. +template +constexpr T set_bit(size_t bit_position, T value, bool new_bit) { + const T m = mask(bit_position, bit_position); + return (value & ~m) | (new_bit ? m : static_cast(0)); +} + +/// Sign-extends a value that has bit_count bits to the full bitwidth of type T. +template +constexpr T sign_extend(T value) { + static_assert(bit_count != 0, "cannot sign-extend zero-sized value"); + + constexpr T m = ones(); + if (get_bit(value)) { + return value | ~m; + } + return value; +} + +/// Sign-extends a value that has bit_count bits to the full bitwidth of type T. +template +constexpr T sign_extend(size_t bit_count, T value) { + ASSERT_MSG(bit_count != 0, "cannot sign-extend zero-sized value"); + + const T m = ones(bit_count); + if (get_bit(bit_count - 1, value)) { + return value | ~m; + } + return value; +} + +/// Replicate an element across a value of type T. +template +constexpr T replicate_element(T value) { + static_assert(element_size <= bitsizeof, "element_size is too large"); + static_assert(bitsizeof % element_size == 0, "bitsize of T not divisible by element_size"); + + if constexpr (element_size == bitsizeof) { + return value; + } else { + return replicate_element(static_cast(value | (value << element_size))); + } +} + +/// Replicate an element of type U across a value of type T. +template +constexpr T replicate_element(T value) { + static_assert(bitsizeof <= bitsizeof, "element_size is too large"); + + return replicate_element, T>(value); +} + +/// Replicate an element across a value of type T. +template +constexpr T replicate_element(size_t element_size, T value) { + ASSERT_MSG(element_size <= bitsizeof, "element_size is too large"); + ASSERT_MSG(bitsizeof % element_size == 0, "bitsize of T not divisible by element_size"); + + if (element_size == bitsizeof) { + return value; + } + return replicate_element(element_size * 2, static_cast(value | (value << element_size))); +} + +template +constexpr bool most_significant_bit(T value) { + return get_bit - 1, T>(value); +} + +} // namespace mcl::bit diff --git a/externals/dynarmic/externals/mcl/include/mcl/bit/rotate.hpp b/externals/dynarmic/externals/mcl/include/mcl/bit/rotate.hpp new file mode 100755 index 000000000..649e5e228 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/bit/rotate.hpp @@ -0,0 +1,31 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/bitsizeof.hpp" +#include "mcl/concepts/bit_integral.hpp" +#include "mcl/stdint.hpp" + +namespace mcl::bit { + +template +constexpr T rotate_right(T x, size_t amount) { + amount %= bitsizeof; + if (amount == 0) { + return x; + } + return static_cast((x >> amount) | (x << (bitsizeof - amount))); +} + +template +constexpr T rotate_left(T x, size_t amount) { + amount %= bitsizeof; + if (amount == 0) { + return x; + } + return static_cast((x << amount) | (x >> (bitsizeof - amount))); +} + +} // namespace mcl::bit diff --git a/externals/dynarmic/externals/mcl/include/mcl/bit/swap.hpp b/externals/dynarmic/externals/mcl/include/mcl/bit/swap.hpp new file mode 100755 index 000000000..0df6bac44 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/bit/swap.hpp @@ -0,0 +1,50 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/concepts/bit_integral.hpp" + +namespace mcl::bit { + +constexpr u16 swap_bytes_16(u16 value) { + return static_cast(u32{value} >> 8 | u32{value} << 8); +} + +constexpr u32 swap_bytes_32(u32 value) { + return ((value & 0xff000000u) >> 24) + | ((value & 0x00ff0000u) >> 8) + | ((value & 0x0000ff00u) << 8) + | ((value & 0x000000ffu) << 24); +} + +constexpr u64 swap_bytes_64(u64 value) { + return ((value & 0xff00000000000000ull) >> 56) + | ((value & 0x00ff000000000000ull) >> 40) + | ((value & 0x0000ff0000000000ull) >> 24) + | ((value & 0x000000ff00000000ull) >> 8) + | ((value & 0x00000000ff000000ull) << 8) + | ((value & 0x0000000000ff0000ull) << 24) + | ((value & 0x000000000000ff00ull) << 40) + | ((value & 0x00000000000000ffull) << 56); +} + +constexpr u32 swap_halves_32(u32 value) { + return ((value & 0xffff0000u) >> 16) + | ((value & 0x0000ffffu) << 16); +} + +constexpr u64 swap_halves_64(u64 value) { + return ((value & 0xffff000000000000ull) >> 48) + | ((value & 0x0000ffff00000000ull) >> 16) + | ((value & 0x00000000ffff0000ull) << 16) + | ((value & 0x000000000000ffffull) << 48); +} + +constexpr u64 swap_words_64(u64 value) { + return ((value & 0xffffffff00000000ull) >> 32) + | ((value & 0x00000000ffffffffull) << 32); +} + +} // namespace mcl::bit diff --git a/externals/dynarmic/externals/mcl/include/mcl/bit_cast.hpp b/externals/dynarmic/externals/mcl/include/mcl/bit_cast.hpp new file mode 100755 index 000000000..cfa8860ac --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/bit_cast.hpp @@ -0,0 +1,36 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include + +namespace mcl { + +/// Reinterpret objects of one type as another by bit-casting between object representations. +template +inline Dest bit_cast(const Source& source) noexcept { + static_assert(sizeof(Dest) == sizeof(Source), "size of destination and source objects must be equal"); + static_assert(std::is_trivially_copyable_v, "destination type must be trivially copyable."); + static_assert(std::is_trivially_copyable_v, "source type must be trivially copyable"); + + std::aligned_storage_t dest; + std::memcpy(&dest, &source, sizeof(dest)); + return reinterpret_cast(dest); +} + +/// Reinterpret objects of any arbitrary type as another type by bit-casting between object representations. +/// Note that here we do not verify if source pointed to by source_ptr has enough bytes to read from. +template +inline Dest bit_cast_pointee(const SourcePtr source_ptr) noexcept { + static_assert(sizeof(SourcePtr) == sizeof(void*), "source pointer must have size of a pointer"); + static_assert(std::is_trivially_copyable_v, "destination type must be trivially copyable."); + + std::aligned_storage_t dest; + std::memcpy(&dest, bit_cast(source_ptr), sizeof(dest)); + return reinterpret_cast(dest); +} + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/include/mcl/bitsizeof.hpp b/externals/dynarmic/externals/mcl/include/mcl/bitsizeof.hpp new file mode 100755 index 000000000..5d28f595a --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/bitsizeof.hpp @@ -0,0 +1,15 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include + +namespace mcl { + +template +constexpr std::size_t bitsizeof = CHAR_BIT * sizeof(T); + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/include/mcl/concepts/bit_integral.hpp b/externals/dynarmic/externals/mcl/include/mcl/concepts/bit_integral.hpp new file mode 100755 index 000000000..caddc059c --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/concepts/bit_integral.hpp @@ -0,0 +1,16 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/concepts/is_any_of.hpp" +#include "mcl/stdint.hpp" + +namespace mcl { + +/// Integral upon which bit operations can be safely performed. +template +concept BitIntegral = IsAnyOf; + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/include/mcl/concepts/is_any_of.hpp b/externals/dynarmic/externals/mcl/include/mcl/concepts/is_any_of.hpp new file mode 100755 index 000000000..3e6593db7 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/concepts/is_any_of.hpp @@ -0,0 +1,14 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/concepts/same_as.hpp" + +namespace mcl { + +template +concept IsAnyOf = (SameAs || ...); + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/include/mcl/concepts/same_as.hpp b/externals/dynarmic/externals/mcl/include/mcl/concepts/same_as.hpp new file mode 100755 index 000000000..7aaaa501b --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/concepts/same_as.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl { + +namespace detail { + +template +concept SameHelper = std::is_same_v; + +} // namespace detail + +template +concept SameAs = detail::SameHelper && detail::SameHelper; + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/include/mcl/container/intrusive_list.hpp b/externals/dynarmic/externals/mcl/include/mcl/container/intrusive_list.hpp new file mode 100755 index 000000000..b757f214c --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/container/intrusive_list.hpp @@ -0,0 +1,378 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include +#include +#include + +#include "mcl/assert.hpp" + +namespace mcl { + +template +class intrusive_list; +template +class intrusive_list_iterator; + +template +class intrusive_list_node { +public: + bool is_sentinel() const { + return is_sentinel_; + } + +protected: + intrusive_list_node* next = nullptr; + intrusive_list_node* prev = nullptr; + bool is_sentinel_ = false; + + friend class intrusive_list; + friend class intrusive_list_iterator; + friend class intrusive_list_iterator; +}; + +template +class intrusive_list_sentinel final : public intrusive_list_node { + using intrusive_list_node::next; + using intrusive_list_node::prev; + using intrusive_list_node::is_sentinel_; + +public: + intrusive_list_sentinel() { + next = this; + prev = this; + is_sentinel_ = true; + } +}; + +template +class intrusive_list_iterator { +public: + using iterator_category = std::bidirectional_iterator_tag; + using difference_type = std::ptrdiff_t; + using value_type = T; + using pointer = value_type*; + using const_pointer = const value_type*; + using reference = value_type&; + using const_reference = const value_type&; + + // If value_type is const, we want "const intrusive_list_node", not "intrusive_list_node" + using node_type = std::conditional_t::value, + const intrusive_list_node>, + intrusive_list_node>; + using node_pointer = node_type*; + using node_reference = node_type&; + + intrusive_list_iterator() = default; + intrusive_list_iterator(const intrusive_list_iterator& other) = default; + intrusive_list_iterator& operator=(const intrusive_list_iterator& other) = default; + + explicit intrusive_list_iterator(node_pointer list_node) + : node(list_node) { + } + explicit intrusive_list_iterator(pointer data) + : node(data) { + } + explicit intrusive_list_iterator(reference data) + : node(&data) { + } + + intrusive_list_iterator& operator++() { + node = node->next; + return *this; + } + intrusive_list_iterator& operator--() { + node = node->prev; + return *this; + } + intrusive_list_iterator operator++(int) { + intrusive_list_iterator it(*this); + ++*this; + return it; + } + intrusive_list_iterator operator--(int) { + intrusive_list_iterator it(*this); + --*this; + return it; + } + + bool operator==(const intrusive_list_iterator& other) const { + return node == other.node; + } + bool operator!=(const intrusive_list_iterator& other) const { + return !operator==(other); + } + + reference operator*() const { + DEBUG_ASSERT(!node->is_sentinel()); + return static_cast(*node); + } + pointer operator->() const { + return std::addressof(operator*()); + } + + node_pointer AsNodePointer() const { + return node; + } + +private: + friend class intrusive_list; + node_pointer node = nullptr; +}; + +template +class intrusive_list { +public: + using difference_type = std::ptrdiff_t; + using size_type = std::size_t; + using value_type = T; + using pointer = value_type*; + using const_pointer = const value_type*; + using reference = value_type&; + using const_reference = const value_type&; + using iterator = intrusive_list_iterator; + using const_iterator = intrusive_list_iterator; + using reverse_iterator = std::reverse_iterator; + using const_reverse_iterator = std::reverse_iterator; + + /** + * Inserts a node at the given location indicated by an iterator. + * + * @param location The location to insert the node. + * @param new_node The node to add. + */ + iterator insert(iterator location, pointer new_node) { + return insert_before(location, new_node); + } + + /** + * Inserts a node at the given location, moving the previous + * node occupant ahead of the one inserted. + * + * @param location The location to insert the new node. + * @param new_node The node to insert into the list. + */ + iterator insert_before(iterator location, pointer new_node) { + auto existing_node = location.AsNodePointer(); + + new_node->next = existing_node; + new_node->prev = existing_node->prev; + existing_node->prev->next = new_node; + existing_node->prev = new_node; + + return iterator(new_node); + } + + /** + * Inserts a new node into the list ahead of the position indicated. + * + * @param position Location to insert the node in front of. + * @param new_node The node to be inserted into the list. + */ + iterator insert_after(iterator position, pointer new_node) { + if (empty()) + return insert(begin(), new_node); + + return insert(++position, new_node); + } + + /** + * Add an entry to the start of the list. + * @param node Node to add to the list. + */ + void push_front(pointer node) { + insert(begin(), node); + } + + /** + * Add an entry to the end of the list + * @param node Node to add to the list. + */ + void push_back(pointer node) { + insert(end(), node); + } + + /** + * Erases the node at the front of the list. + * @note Must not be called on an empty list. + */ + void pop_front() { + DEBUG_ASSERT(!empty()); + erase(begin()); + } + + /** + * Erases the node at the back of the list. + * @note Must not be called on an empty list. + */ + void pop_back() { + DEBUG_ASSERT(!empty()); + erase(--end()); + } + + /** + * Removes a node from this list + * @param it An iterator that points to the node to remove from list. + */ + pointer remove(iterator& it) { + DEBUG_ASSERT(it != end()); + + pointer node = &*it++; + + node->prev->next = node->next; + node->next->prev = node->prev; +#if !defined(NDEBUG) + node->next = nullptr; + node->prev = nullptr; +#endif + + return node; + } + + /** + * Removes a node from this list + * @param it A constant iterator that points to the node to remove from list. + */ + pointer remove(const iterator& it) { + iterator copy = it; + return remove(copy); + } + + /** + * Removes a node from this list. + * @param node A pointer to the node to remove. + */ + pointer remove(pointer node) { + return remove(iterator(node)); + } + + /** + * Removes a node from this list. + * @param node A reference to the node to remove. + */ + pointer remove(reference node) { + return remove(iterator(node)); + } + + /** + * Is this list empty? + * @returns true if there are no nodes in this list. + */ + bool empty() const { + return root->next == root.get(); + } + + /** + * Gets the total number of elements within this list. + * @return the number of elements in this list. + */ + size_type size() const { + return static_cast(std::distance(begin(), end())); + } + + /** + * Retrieves a reference to the node at the front of the list. + * @note Must not be called on an empty list. + */ + reference front() { + DEBUG_ASSERT(!empty()); + return *begin(); + } + + /** + * Retrieves a constant reference to the node at the front of the list. + * @note Must not be called on an empty list. + */ + const_reference front() const { + DEBUG_ASSERT(!empty()); + return *begin(); + } + + /** + * Retrieves a reference to the node at the back of the list. + * @note Must not be called on an empty list. + */ + reference back() { + DEBUG_ASSERT(!empty()); + return *--end(); + } + + /** + * Retrieves a constant reference to the node at the back of the list. + * @note Must not be called on an empty list. + */ + const_reference back() const { + DEBUG_ASSERT(!empty()); + return *--end(); + } + + // Iterator interface + iterator begin() { return iterator(root->next); } + const_iterator begin() const { return const_iterator(root->next); } + const_iterator cbegin() const { return begin(); } + + iterator end() { return iterator(root.get()); } + const_iterator end() const { return const_iterator(root.get()); } + const_iterator cend() const { return end(); } + + reverse_iterator rbegin() { return reverse_iterator(end()); } + const_reverse_iterator rbegin() const { return const_reverse_iterator(end()); } + const_reverse_iterator crbegin() const { return rbegin(); } + + reverse_iterator rend() { return reverse_iterator(begin()); } + const_reverse_iterator rend() const { return const_reverse_iterator(begin()); } + const_reverse_iterator crend() const { return rend(); } + + /** + * Erases a node from the list, indicated by an iterator. + * @param it The iterator that points to the node to erase. + */ + iterator erase(iterator it) { + remove(it); + return it; + } + + /** + * Erases a node from this list. + * @param node A pointer to the node to erase from this list. + */ + iterator erase(pointer node) { + return erase(iterator(node)); + } + + /** + * Erases a node from this list. + * @param node A reference to the node to erase from this list. + */ + iterator erase(reference node) { + return erase(iterator(node)); + } + + /** + * Exchanges contents of this list with another list instance. + * @param other The other list to swap with. + */ + void swap(intrusive_list& other) noexcept { + root.swap(other.root); + } + +private: + std::shared_ptr> root = std::make_shared>(); +}; + +/** + * Exchanges contents of an intrusive list with another intrusive list. + * @tparam T The type of data being kept track of by the lists. + * @param lhs The first list. + * @param rhs The second list. + */ +template +void swap(intrusive_list& lhs, intrusive_list& rhs) noexcept { + lhs.swap(rhs); +} + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/include/mcl/hint/assume.hpp b/externals/dynarmic/externals/mcl/include/mcl/hint/assume.hpp new file mode 100755 index 000000000..ac1873f88 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/hint/assume.hpp @@ -0,0 +1,13 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#if defined(__clang) || defined(__GNUC__) +# define ASSUME(expr) [&] { if (!(expr)) __builtin_unreachable(); }() +#elif defined(_MSC_VER) +# define ASSUME(expr) __assume(expr) +#else +# define ASSUME(expr) +#endif diff --git a/externals/dynarmic/externals/mcl/include/mcl/iterator/reverse.hpp b/externals/dynarmic/externals/mcl/include/mcl/iterator/reverse.hpp new file mode 100755 index 000000000..eb21b9e00 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/iterator/reverse.hpp @@ -0,0 +1,34 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +namespace mcl::iterator { +namespace detail { + +template +struct reverse_adapter { + T& iterable; + + constexpr auto begin() { + using namespace std; + return rbegin(iterable); + } + + constexpr auto end() { + using namespace std; + return rend(iterable); + } +}; + +} // namespace detail + +template +constexpr detail::reverse_adapter reverse(T&& iterable) { + return detail::reverse_adapter{iterable}; +} + +} // namespace mcl::iterator diff --git a/externals/dynarmic/externals/mcl/include/mcl/macro/anonymous_variable.hpp b/externals/dynarmic/externals/mcl/include/mcl/macro/anonymous_variable.hpp new file mode 100755 index 000000000..09cd48a29 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/macro/anonymous_variable.hpp @@ -0,0 +1,13 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +#ifdef __COUNTER__ +# define ANONYMOUS_VARIABLE(str) CONCATENATE_TOKENS(str, __COUNTER__) +#else +# define ANONYMOUS_VARIABLE(str) CONCATENATE_TOKENS(str, __LINE__) +#endif diff --git a/externals/dynarmic/externals/mcl/include/mcl/macro/architecture.hpp b/externals/dynarmic/externals/mcl/include/mcl/macro/architecture.hpp new file mode 100755 index 000000000..3251d829f --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/macro/architecture.hpp @@ -0,0 +1,40 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#if defined(__ARM64__) || defined(__aarch64__) || defined(_M_ARM64) +# define MCL_ARCHITECTURE arm64 +# define MCL_ARCHITECTURE_ARM64 1 +#elif defined(__arm__) || defined(__TARGET_ARCH_ARM) || defined(_M_ARM) +# define MCL_ARCHITECTURE arm32 +# define MCL_ARCHITECTURE_ARM32 1 +#elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64) || defined(_M_X64) +# define MCL_ARCHITECTURE x86_64 +# define MCL_ARCHITECTURE_X86_64 1 +#elif defined(__i386) || defined(__i386__) || defined(_M_IX86) +# define MCL_ARCHITECTURE x86_32 +# define MCL_ARCHITECTURE_X86_32 1 +#elif defined(__ia64) || defined(__ia64__) || defined(_M_IA64) +# define MCL_ARCHITECTURE ia64 +# define MCL_ARCHITECTURE_IA64 1 +#elif defined(__mips) || defined(__mips__) || defined(_M_MRX000) +# define MCL_ARCHITECTURE mips +# define MCL_ARCHITECTURE_MIPS 1 +#elif defined(__ppc64__) || defined(__powerpc64__) +# define MCL_ARCHITECTURE ppc64 +# define MCL_ARCHITECTURE_PPC64 1 +#elif defined(__ppc__) || defined(__ppc) || defined(__powerpc__) || defined(_ARCH_COM) || defined(_ARCH_PWR) || defined(_ARCH_PPC) || defined(_M_MPPC) || defined(_M_PPC) +# define MCL_ARCHITECTURE ppc32 +# define MCL_ARCHITECTURE_PPC32 1 +#elif defined(__riscv) +# define MCL_ARCHITECTURE riscv +# define MCL_ARCHITECTURE_RISCV 1 +#elif defined(__EMSCRIPTEN__) +# define MCL_ARCHITECTURE wasm +# define MCL_ARCHITECTURE_WASM 1 +#else +# define MCL_ARCHITECTURE generic +# define MCL_ARCHITECTURE_GENERIC 1 +#endif diff --git a/externals/dynarmic/externals/mcl/include/mcl/macro/concatenate_tokens.hpp b/externals/dynarmic/externals/mcl/include/mcl/macro/concatenate_tokens.hpp new file mode 100755 index 000000000..3555b23cf --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/macro/concatenate_tokens.hpp @@ -0,0 +1,8 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#define CONCATENATE_TOKENS(x, y) CONCATENATE_TOKENS_IMPL(x, y) +#define CONCATENATE_TOKENS_IMPL(x, y) x##y diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/apply.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/apply.hpp new file mode 100755 index 000000000..e2c171414 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/apply.hpp @@ -0,0 +1,25 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +namespace detail { + +template class F, class L> +struct apply_impl; + +template class F, template class LT, class... Es> +struct apply_impl> { + using type = F; +}; + +} // namespace detail + +/// Invokes metafunction F where the arguments are all the members of list L +template class F, class L> +using apply = typename detail::apply_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/bind.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/bind.hpp new file mode 100755 index 000000000..2701fc95c --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/bind.hpp @@ -0,0 +1,18 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +/// Binds the first sizeof...(A) arguments of metafunction F with arguments A +template class F, class... As> +struct bind { + template + using type = F; +}; + +} // namespace mcl::mp + +#define MCL_MP_BIND(...) ::mcl::mp::bind<__VA_ARGS__>::template type diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/identity.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/identity.hpp new file mode 100755 index 000000000..737f9ce14 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/identity.hpp @@ -0,0 +1,22 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +namespace detail { + +template +struct identity_impl { + using type = T; +}; + +} // namespace detail + +/// Identity metafunction +template +using identity = typename identity_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/map.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/map.hpp new file mode 100755 index 000000000..13fcaecdf --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metafunction/map.hpp @@ -0,0 +1,25 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +namespace detail { + +template class F, class L> +struct map_impl; + +template class F, template class LT, class... Es> +struct map_impl> { + using type = LT...>; +}; + +} // namespace detail + +/// Applies each element of list L to metafunction F +template class F, class L> +using map = typename detail::map_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_and.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_and.hpp new file mode 100755 index 000000000..e4a98e214 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_and.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/lift_value.hpp" + +namespace mcl::mp { + +/// Bitwise and of metavalues Vs +template +using bit_and = lift_value<(Vs::value & ...)>; + +/// Bitwise and of metavalues Vs +template +constexpr auto bit_and_v = (Vs::value & ...); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_not.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_not.hpp new file mode 100755 index 000000000..5d31956d9 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_not.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/lift_value.hpp" + +namespace mcl::mp { + +/// Bitwise not of metavalue V +template +using bit_not = lift_value<~V::value>; + +/// Bitwise not of metavalue V +template +constexpr auto bit_not_v = ~V::value; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_or.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_or.hpp new file mode 100755 index 000000000..812edfb2f --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_or.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/lift_value.hpp" + +namespace mcl::mp { + +/// Bitwise or of metavalues Vs +template +using bit_or = lift_value<(Vs::value | ...)>; + +/// Bitwise or of metavalues Vs +template +constexpr auto bit_or_v = (Vs::value | ...); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_xor.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_xor.hpp new file mode 100755 index 000000000..9c543d410 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/bit_xor.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/lift_value.hpp" + +namespace mcl::mp { + +/// Bitwise xor of metavalues Vs +template +using bit_xor = lift_value<(Vs::value ^ ...)>; + +/// Bitwise xor of metavalues Vs +template +constexpr auto bit_xor_v = (Vs::value ^ ...); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/conjunction.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/conjunction.hpp new file mode 100755 index 000000000..71a8f67ab --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/conjunction.hpp @@ -0,0 +1,42 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/logic_if.hpp" +#include "mcl/mp/metavalue/value.hpp" + +namespace mcl::mp { + +namespace detail { + +template +struct conjunction_impl; + +template<> +struct conjunction_impl<> { + using type = false_type; +}; + +template +struct conjunction_impl { + using type = V; +}; + +template +struct conjunction_impl { + using type = logic_if::type, V1>; +}; + +} // namespace detail + +/// Conjunction of metavalues Vs with short-circuiting and type preservation. +template +using conjunction = typename detail::conjunction_impl::type; + +/// Conjunction of metavalues Vs with short-circuiting and type preservation. +template +constexpr auto conjunction_v = conjunction::value; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/disjunction.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/disjunction.hpp new file mode 100755 index 000000000..679a44f40 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/disjunction.hpp @@ -0,0 +1,42 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/logic_if.hpp" +#include "mcl/mp/metavalue/value.hpp" + +namespace mcl::mp { + +namespace detail { + +template +struct disjunction_impl; + +template<> +struct disjunction_impl<> { + using type = false_type; +}; + +template +struct disjunction_impl { + using type = V; +}; + +template +struct disjunction_impl { + using type = logic_if::type>; +}; + +} // namespace detail + +/// Disjunction of metavalues Vs with short-circuiting and type preservation. +template +using disjunction = typename detail::disjunction_impl::type; + +/// Disjunction of metavalues Vs with short-circuiting and type preservation. +template +constexpr auto disjunction_v = disjunction::value; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/lift_value.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/lift_value.hpp new file mode 100755 index 000000000..bd5df3226 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/lift_value.hpp @@ -0,0 +1,15 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +namespace mcl::mp { + +/// Lifts a value into a type (a metavalue) +template +using lift_value = std::integral_constant; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_and.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_and.hpp new file mode 100755 index 000000000..81c40a458 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_and.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/value.hpp" + +namespace mcl::mp { + +/// Logical conjunction of metavalues Vs without short-circuiting or type presevation. +template +using logic_and = bool_value<(true && ... && Vs::value)>; + +/// Logical conjunction of metavalues Vs without short-circuiting or type presevation. +template +constexpr bool logic_and_v = (true && ... && Vs::value); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_if.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_if.hpp new file mode 100755 index 000000000..b300d267b --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_if.hpp @@ -0,0 +1,21 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +#include "mcl/mp/metavalue/value.hpp" + +namespace mcl::mp { + +/// Conditionally select between types T and F based on boolean metavalue V +template +using logic_if = std::conditional_t; + +/// Conditionally select between metavalues T and F based on boolean metavalue V +template +constexpr auto logic_if_v = logic_if::value; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_not.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_not.hpp new file mode 100755 index 000000000..a7a6aee9a --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_not.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/value.hpp" + +namespace mcl::mp { + +/// Logical negation of metavalue V. +template +using logic_not = bool_value; + +/// Logical negation of metavalue V. +template +constexpr bool logic_not_v = !bool(V::value); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_or.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_or.hpp new file mode 100755 index 000000000..3b46fa572 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/logic_or.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/value.hpp" + +namespace mcl::mp { + +/// Logical disjunction of metavalues Vs without short-circuiting or type presevation. +template +using logic_or = bool_value<(false || ... || Vs::value)>; + +/// Logical disjunction of metavalues Vs without short-circuiting or type presevation. +template +constexpr bool logic_or_v = (false || ... || Vs::value); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/product.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/product.hpp new file mode 100755 index 000000000..d40c0ce3a --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/product.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/lift_value.hpp" + +namespace mcl::mp { + +/// Product of metavalues Vs +template +using product = lift_value<(Vs::value * ...)>; + +/// Product of metavalues Vs +template +constexpr auto product_v = (Vs::value * ...); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/sum.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/sum.hpp new file mode 100755 index 000000000..7111c02c3 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/sum.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/lift_value.hpp" + +namespace mcl::mp { + +/// Sum of metavalues Vs +template +using sum = lift_value<(Vs::value + ...)>; + +/// Sum of metavalues Vs +template +constexpr auto sum_v = (Vs::value + ...); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value.hpp new file mode 100755 index 000000000..693169d63 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value.hpp @@ -0,0 +1,30 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include + +namespace mcl::mp { + +/// A metavalue (of type VT and value v). +template +using value = std::integral_constant; + +/// A metavalue of type size_t (and value v). +template +using size_value = value; + +/// A metavalue of type bool (and value v). (Aliases to std::bool_constant.) +template +using bool_value = value; + +/// true metavalue (Aliases to std::true_type). +using true_type = bool_value; + +/// false metavalue (Aliases to std::false_type). +using false_type = bool_value; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value_cast.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value_cast.hpp new file mode 100755 index 000000000..3b88ed7d6 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value_cast.hpp @@ -0,0 +1,15 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +namespace mcl::mp { + +/// Casts a metavalue from one type to another +template +using value_cast = std::integral_constant(V::value)>; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value_equal.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value_equal.hpp new file mode 100755 index 000000000..a10e07f06 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/metavalue/value_equal.hpp @@ -0,0 +1,15 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +namespace mcl::mp { + +/// Do two metavalues contain the same value? +template +using value_equal = std::bool_constant; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/misc/argument_count.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/misc/argument_count.hpp new file mode 100755 index 000000000..5a30f498a --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/misc/argument_count.hpp @@ -0,0 +1,19 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/lift_value.hpp" + +namespace mcl::mp { + +/// Metafunction that returns the number of arguments it has +template +using argument_count = lift_value; + +/// Metafunction that returns the number of arguments it has +template +constexpr auto argument_count_v = sizeof...(Ts); + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/append.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/append.hpp new file mode 100755 index 000000000..838b9c942 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/append.hpp @@ -0,0 +1,25 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +namespace detail { + +template +struct append_impl; + +template class LT, class... E1s, class... E2s> +struct append_impl, E2s...> { + using type = LT; +}; + +} // namespace detail + +/// Append items E to list L +template +using append = typename detail::append_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/cartesian_product.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/cartesian_product.hpp new file mode 100755 index 000000000..1b378c6fc --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/cartesian_product.hpp @@ -0,0 +1,47 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metafunction/bind.hpp" +#include "mcl/mp/metafunction/map.hpp" +#include "mcl/mp/typelist/append.hpp" +#include "mcl/mp/typelist/concat.hpp" +#include "mcl/mp/typelist/list.hpp" + +namespace mcl::mp { + +namespace detail { + +template +struct cartesian_product_impl; + +template +struct cartesian_product_impl { + using type = RL; +}; + +template class LT, class... REs, class... E2s> +struct cartesian_product_impl, LT> { + using type = concat< + map>...>; +}; + +template +struct cartesian_product_impl { + using type = typename cartesian_product_impl< + typename cartesian_product_impl::type, + L3, + Ls...>::type; +}; + +} // namespace detail + +/// Produces the cartesian product of a set of lists +/// For example: +/// cartesian_product, list> == list, list, list, list +template +using cartesian_product = typename detail::cartesian_product_impl, Ls...>::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/concat.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/concat.hpp new file mode 100755 index 000000000..cfdefbc11 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/concat.hpp @@ -0,0 +1,94 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/typelist/list.hpp" + +namespace mcl::mp { + +namespace detail { + +template +struct concat_impl; + +template<> +struct concat_impl<> { + using type = list<>; +}; + +template +struct concat_impl { + using type = L; +}; + +template class LT, class... E1s, class... E2s, class... Ls> +struct concat_impl, LT, Ls...> { + using type = typename concat_impl, Ls...>::type; +}; + +template class LT, + class... E1s, + class... E2s, + class... E3s, + class... E4s, + class... E5s, + class... E6s, + class... E7s, + class... E8s, + class... E9s, + class... E10s, + class... E11s, + class... E12s, + class... E13s, + class... E14s, + class... E15s, + class... E16s, + class... Ls> +struct concat_impl< + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + LT, + Ls...> { + using type = typename concat_impl< + LT< + E1s..., + E2s..., + E3s..., + E4s..., + E5s..., + E6s..., + E7s..., + E8s..., + E9s..., + E10s..., + E11s..., + E12s..., + E13s..., + E14s..., + E15s..., + E16s...>, + Ls...>::type; +}; + +} // namespace detail + +/// Concatenate lists together +template +using concat = typename detail::concat_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/contains.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/contains.hpp new file mode 100755 index 000000000..f8d1fbf87 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/contains.hpp @@ -0,0 +1,23 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/value.hpp" + +namespace mcl::mp { + +/// Does list L contain an element which is same as type T? +template +struct contains; + +template class LT, class... Ts, class T> +struct contains, T> + : bool_value<(false || ... || std::is_same_v)> {}; + +/// Does list L contain an element which is same as type T? +template +constexpr bool contains_v = contains::value; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/drop.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/drop.hpp new file mode 100755 index 000000000..9c7be44bd --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/drop.hpp @@ -0,0 +1,33 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include + +namespace mcl::mp { + +namespace detail { + +template +struct drop_impl; + +template class LT> +struct drop_impl> { + using type = LT<>; +}; + +template class LT, class E1, class... Es> +struct drop_impl> { + using type = std::conditional_t, typename drop_impl>::type>; +}; + +} // namespace detail + +/// Drops the first N elements of list L +template +using drop = typename detail::drop_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/get.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/get.hpp new file mode 100755 index 000000000..a2ec74613 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/get.hpp @@ -0,0 +1,18 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include + +#include "mcl/mp/metafunction/apply.hpp" + +namespace mcl::mp { + +/// Get element I from list L +template +using get = std::tuple_element_t>; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/head.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/head.hpp new file mode 100755 index 000000000..63062825f --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/head.hpp @@ -0,0 +1,25 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +namespace detail { + +template +struct head_impl; + +template class LT, class E1, class... Es> +struct head_impl> { + using type = E1; +}; + +} // namespace detail + +/// Gets the tail/cdr/all-but-the-first-element of list L +template +using head = typename detail::head_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/length.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/length.hpp new file mode 100755 index 000000000..d59496044 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/length.hpp @@ -0,0 +1,20 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metafunction/apply.hpp" +#include "mcl/mp/misc/argument_count.hpp" + +namespace mcl::mp { + +/// Length of list L +template +using length = apply; + +/// Length of list L +template +constexpr auto length_v = length::value; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/lift_sequence.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/lift_sequence.hpp new file mode 100755 index 000000000..ba2617b8f --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/lift_sequence.hpp @@ -0,0 +1,29 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +#include "mcl/mp/typelist/list.hpp" + +namespace mcl::mp { + +namespace detail { + +template +struct lift_sequence_impl; + +template class VLT, T... values> +struct lift_sequence_impl> { + using type = list...>; +}; + +} // namespace detail + +/// Lifts values in value list VL to create a type list. +template +using lift_sequence = typename detail::lift_sequence_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/list.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/list.hpp new file mode 100755 index 000000000..48348ec7d --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/list.hpp @@ -0,0 +1,13 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +/// Contains a list of types +template +struct list {}; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/lower_to_tuple.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/lower_to_tuple.hpp new file mode 100755 index 000000000..a9007f3b1 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/lower_to_tuple.hpp @@ -0,0 +1,24 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include + +namespace mcl::mp { + +/// Converts a list of metavalues to a tuple. +template +struct lower_to_tuple; + +template class LT, class... Es> +struct lower_to_tuple> { + static constexpr auto value = std::make_tuple(static_cast(Es::value)...); +}; + +/// Converts a list of metavalues to a tuple. +template +constexpr auto lower_to_tuple_v = lower_to_tuple::value; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/prepend.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/prepend.hpp new file mode 100755 index 000000000..df9aedd80 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/prepend.hpp @@ -0,0 +1,25 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +namespace detail { + +template +struct prepend_impl; + +template class LT, class... E1s, class... E2s> +struct prepend_impl, E2s...> { + using type = LT; +}; + +} // namespace detail + +/// Prepend items E to list L +template +using prepend = typename detail::prepend_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/tail.hpp b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/tail.hpp new file mode 100755 index 000000000..54f14c12a --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/mp/typelist/tail.hpp @@ -0,0 +1,25 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +namespace mcl::mp { + +namespace detail { + +template +struct tail_impl; + +template class LT, class E1, class... Es> +struct tail_impl> { + using type = LT; +}; + +} // namespace detail + +/// Gets the first type of list L +template +using tail = typename detail::tail_impl::type; + +} // namespace mcl::mp diff --git a/externals/dynarmic/externals/mcl/include/mcl/scope_exit.hpp b/externals/dynarmic/externals/mcl/include/mcl/scope_exit.hpp new file mode 100755 index 000000000..d6d11ed28 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/scope_exit.hpp @@ -0,0 +1,85 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include +#include + +#include + +namespace mcl::detail { + +struct scope_exit_tag {}; +struct scope_fail_tag {}; +struct scope_success_tag {}; + +template +class scope_exit final { +public: + explicit scope_exit(Function&& fn) + : function(std::move(fn)) {} + ~scope_exit() noexcept { + function(); + } + +private: + Function function; +}; + +template +class scope_fail final { +public: + explicit scope_fail(Function&& fn) + : function(std::move(fn)), exception_count(std::uncaught_exceptions()) {} + ~scope_fail() noexcept { + if (std::uncaught_exceptions() > exception_count) { + function(); + } + } + +private: + Function function; + int exception_count; +}; + +template +class scope_success final { +public: + explicit scope_success(Function&& fn) + : function(std::move(fn)), exception_count(std::uncaught_exceptions()) {} + ~scope_success() { + if (std::uncaught_exceptions() <= exception_count) { + function(); + } + } + +private: + Function function; + int exception_count; +}; + +// We use ->* here as it has the highest precedence of the operators we can use. + +template +auto operator->*(scope_exit_tag, Function&& function) { + return scope_exit>{std::forward(function)}; +} + +template +auto operator->*(scope_fail_tag, Function&& function) { + return scope_fail>{std::forward(function)}; +} + +template +auto operator->*(scope_success_tag, Function&& function) { + return scope_success>{std::forward(function)}; +} + +} // namespace mcl::detail + +#define SCOPE_EXIT auto ANONYMOUS_VARIABLE(MCL_SCOPE_EXIT_VAR_) = ::mcl::detail::scope_exit_tag{}->*[&]() noexcept +#define SCOPE_FAIL auto ANONYMOUS_VARIABLE(MCL_SCOPE_FAIL_VAR_) = ::mcl::detail::scope_fail_tag{}->*[&]() noexcept +#define SCOPE_SUCCESS auto ANONYMOUS_VARIABLE(MCL_SCOPE_FAIL_VAR_) = ::mcl::detail::scope_success_tag{}->*[&]() diff --git a/externals/dynarmic/externals/mcl/include/mcl/stdint.hpp b/externals/dynarmic/externals/mcl/include/mcl/stdint.hpp new file mode 100755 index 000000000..37b82a2b3 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/stdint.hpp @@ -0,0 +1,27 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include + +using u8 = std::uint8_t; +using u16 = std::uint16_t; +using u32 = std::uint32_t; +using u64 = std::uint64_t; +using uptr = std::uintptr_t; + +using s8 = std::int8_t; +using s16 = std::int16_t; +using s32 = std::int32_t; +using s64 = std::int64_t; +using sptr = std::intptr_t; + +using size_t = std::size_t; + +using f32 = float; +using f64 = double; +static_assert(sizeof(f32) == sizeof(u32), "f32 must be 32 bits wide"); +static_assert(sizeof(f64) == sizeof(u64), "f64 must be 64 bits wide"); diff --git a/externals/dynarmic/externals/mcl/include/mcl/type_traits/function_info.hpp b/externals/dynarmic/externals/mcl/include/mcl/type_traits/function_info.hpp new file mode 100755 index 000000000..2ac804ae8 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/type_traits/function_info.hpp @@ -0,0 +1,70 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include +#include + +#include "mcl/mp/typelist/list.hpp" + +namespace mcl { + +template +struct function_info : function_info {}; + +template +struct function_info { + using return_type = R; + using parameter_list = mp::list; + static constexpr std::size_t parameter_count = sizeof...(As); + + using equivalent_function_type = R(As...); + + template + struct parameter { + static_assert(I < parameter_count, "Non-existent parameter"); + using type = std::tuple_element_t>; + }; +}; + +template +struct function_info : function_info {}; + +template +struct function_info : function_info { + using class_type = C; + + using equivalent_function_type_with_class = R(C*, As...); +}; + +template +struct function_info : function_info { + using class_type = C; + + using equivalent_function_type_with_class = R(C*, As...); +}; + +template +constexpr size_t parameter_count_v = function_info::parameter_count; + +template +using parameter_list = typename function_info::parameter_list; + +template +using get_parameter = typename function_info::template parameter::type; + +template +using equivalent_function_type = typename function_info::equivalent_function_type; + +template +using equivalent_function_type_with_class = typename function_info::equivalent_function_type_with_class; + +template +using return_type = typename function_info::return_type; + +template +using class_type = typename function_info::class_type; + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/include/mcl/type_traits/integer_of_size.hpp b/externals/dynarmic/externals/mcl/include/mcl/type_traits/integer_of_size.hpp new file mode 100755 index 000000000..e37995eae --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/type_traits/integer_of_size.hpp @@ -0,0 +1,48 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/stdint.hpp" + +namespace mcl { + +namespace detail { + +template +struct integer_of_size_impl {}; + +template<> +struct integer_of_size_impl<8> { + using unsigned_type = u8; + using signed_type = s8; +}; + +template<> +struct integer_of_size_impl<16> { + using unsigned_type = u16; + using signed_type = s16; +}; + +template<> +struct integer_of_size_impl<32> { + using unsigned_type = u32; + using signed_type = s32; +}; + +template<> +struct integer_of_size_impl<64> { + using unsigned_type = u64; + using signed_type = s64; +}; + +} // namespace detail + +template +using unsigned_integer_of_size = typename detail::integer_of_size_impl::unsigned_type; + +template +using signed_integer_of_size = typename detail::integer_of_size_impl::signed_type; + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/include/mcl/type_traits/is_instance_of_template.hpp b/externals/dynarmic/externals/mcl/include/mcl/type_traits/is_instance_of_template.hpp new file mode 100755 index 000000000..8a7fc33a4 --- /dev/null +++ b/externals/dynarmic/externals/mcl/include/mcl/type_traits/is_instance_of_template.hpp @@ -0,0 +1,22 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#pragma once + +#include "mcl/mp/metavalue/value.hpp" + +namespace mcl { + +/// Is type T an instance of template class C? +template class, class> +struct is_instance_of_template : mp::false_type {}; + +template class C, class... As> +struct is_instance_of_template> : mp::true_type {}; + +/// Is type T an instance of template class C? +template class C, class T> +constexpr bool is_instance_of_template_v = is_instance_of_template::value; + +} // namespace mcl diff --git a/externals/dynarmic/externals/mcl/src/CMakeLists.txt b/externals/dynarmic/externals/mcl/src/CMakeLists.txt new file mode 100755 index 000000000..a25392b34 --- /dev/null +++ b/externals/dynarmic/externals/mcl/src/CMakeLists.txt @@ -0,0 +1,69 @@ +add_library(mcl + ../include/mcl/assert.hpp + ../include/mcl/bit/bit_count.hpp + ../include/mcl/bit/bit_field.hpp + ../include/mcl/bit/rotate.hpp + ../include/mcl/bit/swap.hpp + ../include/mcl/bit_cast.hpp + ../include/mcl/bitsizeof.hpp + ../include/mcl/concepts/bit_integral.hpp + ../include/mcl/concepts/is_any_of.hpp + ../include/mcl/concepts/same_as.hpp + ../include/mcl/container/intrusive_list.hpp + ../include/mcl/hint/assume.hpp + ../include/mcl/iterator/reverse.hpp + ../include/mcl/macro/anonymous_variable.hpp + ../include/mcl/macro/architecture.hpp + ../include/mcl/macro/concatenate_tokens.hpp + ../include/mcl/mp/metafunction/apply.hpp + ../include/mcl/mp/metafunction/bind.hpp + ../include/mcl/mp/metafunction/identity.hpp + ../include/mcl/mp/metafunction/map.hpp + ../include/mcl/mp/metavalue/bit_and.hpp + ../include/mcl/mp/metavalue/bit_not.hpp + ../include/mcl/mp/metavalue/bit_or.hpp + ../include/mcl/mp/metavalue/bit_xor.hpp + ../include/mcl/mp/metavalue/conjunction.hpp + ../include/mcl/mp/metavalue/disjunction.hpp + ../include/mcl/mp/metavalue/lift_value.hpp + ../include/mcl/mp/metavalue/logic_and.hpp + ../include/mcl/mp/metavalue/logic_if.hpp + ../include/mcl/mp/metavalue/logic_not.hpp + ../include/mcl/mp/metavalue/logic_or.hpp + ../include/mcl/mp/metavalue/product.hpp + ../include/mcl/mp/metavalue/sum.hpp + ../include/mcl/mp/metavalue/value.hpp + ../include/mcl/mp/metavalue/value_cast.hpp + ../include/mcl/mp/metavalue/value_equal.hpp + ../include/mcl/mp/misc/argument_count.hpp + ../include/mcl/mp/typelist/append.hpp + ../include/mcl/mp/typelist/cartesian_product.hpp + ../include/mcl/mp/typelist/concat.hpp + ../include/mcl/mp/typelist/contains.hpp + ../include/mcl/mp/typelist/drop.hpp + ../include/mcl/mp/typelist/get.hpp + ../include/mcl/mp/typelist/head.hpp + ../include/mcl/mp/typelist/length.hpp + ../include/mcl/mp/typelist/lift_sequence.hpp + ../include/mcl/mp/typelist/list.hpp + ../include/mcl/mp/typelist/lower_to_tuple.hpp + ../include/mcl/mp/typelist/prepend.hpp + ../include/mcl/mp/typelist/tail.hpp + ../include/mcl/scope_exit.hpp + ../include/mcl/stdint.hpp + ../include/mcl/type_traits/function_info.hpp + ../include/mcl/type_traits/integer_of_size.hpp + ../include/mcl/type_traits/is_instance_of_template.hpp + assert.cpp +) +target_include_directories(mcl + PUBLIC + $ + $ +) +target_compile_options(mcl PRIVATE ${MCL_CXX_FLAGS}) +target_link_libraries(mcl PUBLIC $) +add_library(merry::mcl ALIAS mcl) + +include(CreateTargetDirectoryGroups) +create_target_directory_groups(mcl) diff --git a/externals/dynarmic/externals/mcl/src/assert.cpp b/externals/dynarmic/externals/mcl/src/assert.cpp new file mode 100755 index 000000000..e30697e24 --- /dev/null +++ b/externals/dynarmic/externals/mcl/src/assert.cpp @@ -0,0 +1,20 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#include "mcl/assert.hpp" + +#include +#include + +#include + +namespace mcl::detail { + +[[noreturn]] void assert_terminate_impl(fmt::string_view msg, fmt::format_args args) { + fmt::print(stderr, "assertion failed: "); + fmt::vprint(stderr, msg, args); + std::terminate(); +} + +} // namespace mcl::detail diff --git a/externals/dynarmic/externals/mcl/tests/CMakeLists.txt b/externals/dynarmic/externals/mcl/tests/CMakeLists.txt new file mode 100755 index 000000000..1619f34ca --- /dev/null +++ b/externals/dynarmic/externals/mcl/tests/CMakeLists.txt @@ -0,0 +1,15 @@ +add_executable(mcl-tests + bit/bit_field_tests.cpp + main.cpp + mp/metavalue_tests.cpp + mp/typelist_tests.cpp + type_traits/type_traits_tests.cpp +) +target_include_directories(mcl-tests PUBLIC .) +target_compile_options(mcl-tests PRIVATE ${STAMINA_CXX_FLAGS}) +target_link_libraries(mcl-tests PRIVATE Catch2::Catch2 mcl) + +include(CTest) +include(Catch) +catch_discover_tests(mcl-tests) +enable_testing() diff --git a/externals/dynarmic/externals/mcl/tests/bit/bit_field_tests.cpp b/externals/dynarmic/externals/mcl/tests/bit/bit_field_tests.cpp new file mode 100755 index 000000000..fba31eb5c --- /dev/null +++ b/externals/dynarmic/externals/mcl/tests/bit/bit_field_tests.cpp @@ -0,0 +1,41 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#include +#include + +#include +#include +#include + +TEST_CASE("mcl::bit::ones", "[bit]") { + const std::array cases{ + std::make_tuple(0, 0x00), + std::make_tuple(1, 0x01), + std::make_tuple(2, 0x03), + std::make_tuple(3, 0x07), + std::make_tuple(4, 0x0f), + std::make_tuple(5, 0x1f), + std::make_tuple(6, 0x3f), + std::make_tuple(7, 0x7f), + std::make_tuple(8, 0xff), + }; + + for (const auto [count, expected] : cases) { + REQUIRE(mcl::bit::ones(count) == expected); + REQUIRE(mcl::bit::ones(count) == expected); + REQUIRE(mcl::bit::ones(count) == expected); + REQUIRE(mcl::bit::ones(count) == expected); + REQUIRE(mcl::bit::ones(count) == expected); + REQUIRE(mcl::bit::ones(count) == expected); + } +} + +static_assert(mcl::bit::ones<3, u8>() == 0x7); +static_assert(mcl::bit::ones<15, u16>() == 0x7fff); +static_assert(mcl::bit::ones<16, u16>() == 0xffff); +static_assert(mcl::bit::ones<31, u32>() == 0x7fff'ffff); +static_assert(mcl::bit::ones<32, u32>() == 0xffff'ffff); +static_assert(mcl::bit::ones<63, u64>() == 0x7fff'ffff'ffff'ffff); +static_assert(mcl::bit::ones<64, u64>() == 0xffff'ffff'ffff'ffff); diff --git a/externals/dynarmic/externals/mcl/tests/main.cpp b/externals/dynarmic/externals/mcl/tests/main.cpp new file mode 100755 index 000000000..14b471b4d --- /dev/null +++ b/externals/dynarmic/externals/mcl/tests/main.cpp @@ -0,0 +1,6 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#define CATCH_CONFIG_MAIN +#include "catch2/catch.hpp" diff --git a/externals/dynarmic/externals/mcl/tests/mp/metavalue_tests.cpp b/externals/dynarmic/externals/mcl/tests/mp/metavalue_tests.cpp new file mode 100755 index 000000000..b7d763dca --- /dev/null +++ b/externals/dynarmic/externals/mcl/tests/mp/metavalue_tests.cpp @@ -0,0 +1,90 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +using namespace mcl::mp; + +// bit_and + +static_assert(bit_and, lift_value<1>>::value == 1); + +// bit_not + +static_assert(bit_not>::value == ~0); + +// bit_or + +static_assert(bit_or, lift_value<3>>::value == 3); + +// bit_xor + +static_assert(bit_xor, lift_value<3>>::value == 2); + +// conjunction + +static_assert(std::is_same_v, std::true_type>); +static_assert(std::is_same_v>, lift_value<0>>); +static_assert(std::is_same_v, std::true_type>, std::true_type>); + +// disjunction + +static_assert(std::is_same_v, std::true_type>); +static_assert(std::is_same_v>, lift_value<0>>); +static_assert(std::is_same_v, std::true_type>, lift_value<42>>); + +// lift_value + +static_assert(std::is_same_v, std::integral_constant>); +static_assert(std::is_same_v, std::false_type>); + +// logic_and + +static_assert(std::is_same_v, std::true_type>); +static_assert(std::is_same_v, std::true_type>); +static_assert(std::is_same_v>, std::true_type>); +static_assert(std::is_same_v, std::false_type>); + +// logic_not + +static_assert(std::is_same_v, std::true_type>); + +// logic_or + +static_assert(std::is_same_v, std::false_type>); +static_assert(std::is_same_v, std::true_type>); +static_assert(std::is_same_v>, std::false_type>); +static_assert(std::is_same_v, std::true_type>); + +// product + +static_assert(product, lift_value<2>, lift_value<3>, lift_value<4>>::value == 24); + +// sum + +static_assert(sum, lift_value<2>, lift_value<3>, lift_value<4>>::value == 10); + +// value_cast + +static_assert(std::is_same_v, std::integral_constant>); + +// value_equal + +static_assert(std::is_same_v>, std::true_type>); diff --git a/externals/dynarmic/externals/mcl/tests/mp/typelist_tests.cpp b/externals/dynarmic/externals/mcl/tests/mp/typelist_tests.cpp new file mode 100755 index 000000000..4f67dc4e9 --- /dev/null +++ b/externals/dynarmic/externals/mcl/tests/mp/typelist_tests.cpp @@ -0,0 +1,104 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +using namespace mcl::mp; + +// append + +static_assert(std::is_same_v, double>, list>); +static_assert(std::is_same_v, int, int>, list>); + +// cartesian_product + +static_assert( + std::is_same_v< + cartesian_product, list, list>, + list< + list, + list, + list, + list, + list, + list, + list, + list>>); + +// concat + +static_assert(std::is_same_v, list>, list>); +static_assert(std::is_same_v, list, list>, list>); + +// contains + +static_assert(contains_v, int>); +static_assert(!contains_v, int>); +static_assert(!contains_v, int>); +static_assert(contains_v, int>); + +// drop + +static_assert(std::is_same_v, drop<3, list>>); +static_assert(std::is_same_v, drop<3, list>>); +static_assert(std::is_same_v, drop<3, list>>); +static_assert(std::is_same_v, drop<3, list>>); +static_assert(std::is_same_v, drop<0, list>>); + +// get + +static_assert(std::is_same_v>, int>); +static_assert(std::is_same_v>, double>); + +// head + +static_assert(std::is_same_v>, int>); +static_assert(std::is_same_v>, int>); + +// length + +static_assert(length_v> == 0); +static_assert(length_v> == 1); +static_assert(length_v> == 3); + +// lift_sequence + +static_assert( + std::is_same_v< + lift_sequence>, + list, size_value<1>, size_value<2>>>); + +// lower_to_tuple + +static_assert(lower_to_tuple_v, size_value<1>, size_value<2>>> == std::tuple(0, 1, 2)); +static_assert(lower_to_tuple_v> == std::make_tuple(true, false)); + +// prepend + +static_assert(std::is_same_v, double>, list>); +static_assert(std::is_same_v, double>, list>); +static_assert(std::is_same_v, double, bool>, list>); + +// tail + +static_assert(std::is_same_v>, list>); +static_assert(std::is_same_v>, list<>>); diff --git a/externals/dynarmic/externals/mcl/tests/type_traits/type_traits_tests.cpp b/externals/dynarmic/externals/mcl/tests/type_traits/type_traits_tests.cpp new file mode 100755 index 000000000..b1a3ed7a7 --- /dev/null +++ b/externals/dynarmic/externals/mcl/tests/type_traits/type_traits_tests.cpp @@ -0,0 +1,39 @@ +// This file is part of the mcl project. +// Copyright (c) 2022 merryhime +// SPDX-License-Identifier: MIT + +#include +#include + +#include +#include + +using namespace mcl; + +// function_info + +struct Bar { + int frob(double a) { return a; } +}; + +static_assert(parameter_count_v == 0); +static_assert(parameter_count_v == 3); +static_assert(std::is_same_v, double>); +static_assert(std::is_same_v, void(bool, int, double)>); +static_assert(std::is_same_v, void>); +static_assert(std::is_same_v, int(double)>); +static_assert(std::is_same_v, Bar>); + +// is_instance_of_template + +template +class Foo {}; + +template +class Pair {}; + +static_assert(is_instance_of_template_v>); +static_assert(!is_instance_of_template_v); +static_assert(is_instance_of_template_v>); +static_assert(is_instance_of_template_v>); +static_assert(!is_instance_of_template_v>); diff --git a/externals/dynarmic/src/dynarmic/CMakeLists.txt b/externals/dynarmic/src/dynarmic/CMakeLists.txt index 38b5b43ea..6fc5a8cf2 100755 --- a/externals/dynarmic/src/dynarmic/CMakeLists.txt +++ b/externals/dynarmic/src/dynarmic/CMakeLists.txt @@ -1,9 +1,5 @@ add_library(dynarmic - common/assert.cpp - common/assert.h - common/bit_util.h common/cast_util.h - common/common_types.h common/crypto/aes.cpp common/crypto/aes.h common/crypto/crc32.cpp @@ -46,18 +42,14 @@ add_library(dynarmic common/fp/unpacked.cpp common/fp/unpacked.h common/fp/util.h - common/intrusive_list.h - common/iterator_util.h common/llvm_disassemble.cpp common/llvm_disassemble.h common/lut_from_list.h - common/macro_util.h common/math_util.cpp common/math_util.h common/memory_pool.cpp common/memory_pool.h common/safe_ops.h - common/scope_exit.h common/spin_lock.h common/string_util.h common/u128.cpp @@ -385,10 +377,11 @@ set_target_properties(dynarmic PROPERTIES target_compile_options(dynarmic PRIVATE ${DYNARMIC_CXX_FLAGS}) # $ required because of https://gitlab.kitware.com/cmake/cmake/-/issues/15415 target_link_libraries(dynarmic + PUBLIC + $ PRIVATE $ $ - $ tsl::robin_map $ $ @@ -401,7 +394,7 @@ if (DYNARMIC_ENABLE_NO_EXECUTE_SUPPORT) target_compile_definitions(dynarmic PRIVATE DYNARMIC_ENABLE_NO_EXECUTE_SUPPORT=1) endif() if (DYNARMIC_IGNORE_ASSERTS) - target_compile_definitions(dynarmic PRIVATE DYNARMIC_IGNORE_ASSERTS=1) + target_compile_definitions(dynarmic PRIVATE MCL_IGNORE_ASSERTS=1) endif() if (CMAKE_SYSTEM_NAME STREQUAL "Windows") target_compile_definitions(dynarmic PRIVATE FMT_USE_WINDOWS_H=0) diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp b/externals/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp index c9710540e..4a3c3a35f 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/a32_emit_x64.cpp @@ -11,6 +11,10 @@ #include #include +#include +#include +#include +#include #include "dynarmic/backend/x64/a32_jitstate.h" #include "dynarmic/backend/x64/abi.h" @@ -20,10 +24,6 @@ #include "dynarmic/backend/x64/nzcv_util.h" #include "dynarmic/backend/x64/perf_map.h" #include "dynarmic/backend/x64/stack_layout.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/scope_exit.h" #include "dynarmic/common/variant_util.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/frontend/A32/a32_types.h" @@ -626,10 +626,10 @@ void A32EmitX64::EmitA32SetGEFlagsCompressed(A32EmitContext& ctx, IR::Inst* inst if (args[0].IsImmediate()) { const u32 imm = args[0].GetImmediateU32(); u32 ge = 0; - ge |= Common::Bit<19>(imm) ? 0xFF000000 : 0; - ge |= Common::Bit<18>(imm) ? 0x00FF0000 : 0; - ge |= Common::Bit<17>(imm) ? 0x0000FF00 : 0; - ge |= Common::Bit<16>(imm) ? 0x000000FF : 0; + ge |= mcl::bit::get_bit<19>(imm) ? 0xFF000000 : 0; + ge |= mcl::bit::get_bit<18>(imm) ? 0x00FF0000 : 0; + ge |= mcl::bit::get_bit<17>(imm) ? 0x0000FF00 : 0; + ge |= mcl::bit::get_bit<16>(imm) ? 0x000000FF : 0; code.mov(dword[r15 + offsetof(A32JitState, cpsr_ge)], ge); } else if (code.HasHostFeature(HostFeature::FastBMI2)) { @@ -689,8 +689,8 @@ void A32EmitX64::EmitA32BXWritePC(A32EmitContext& ctx, IR::Inst* inst) { if (arg.IsImmediate()) { const u32 new_pc = arg.GetImmediateU32(); - const u32 mask = Common::Bit<0>(new_pc) ? 0xFFFFFFFE : 0xFFFFFFFC; - const u32 new_upper = upper_without_t | (Common::Bit<0>(new_pc) ? 1 : 0); + const u32 mask = mcl::bit::get_bit<0>(new_pc) ? 0xFFFFFFFE : 0xFFFFFFFC; + const u32 new_upper = upper_without_t | (mcl::bit::get_bit<0>(new_pc) ? 1 : 0); code.mov(MJitStateReg(A32::Reg::PC), new_pc & mask); code.mov(dword[r15 + offsetof(A32JitState, upper_location_descriptor)], new_upper); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a32_emit_x64_memory.cpp b/externals/dynarmic/src/dynarmic/backend/x64/a32_emit_x64_memory.cpp index adbe00e21..f41c3b9b9 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a32_emit_x64_memory.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/a32_emit_x64_memory.cpp @@ -10,7 +10,7 @@ #include #include -#include +#include #include #include "dynarmic/backend/x64/a32_emit_x64.h" diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp b/externals/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp index 2e7cb4e0d..e066c9934 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/a32_interface.cpp @@ -8,6 +8,10 @@ #include #include +#include +#include +#include +#include #include "dynarmic/backend/x64/a32_emit_x64.h" #include "dynarmic/backend/x64/a32_jitstate.h" @@ -15,11 +19,7 @@ #include "dynarmic/backend/x64/callback.h" #include "dynarmic/backend/x64/devirtualize.h" #include "dynarmic/backend/x64/jitstate_info.h" -#include "dynarmic/common/assert.h" #include "dynarmic/common/atomic.h" -#include "dynarmic/common/cast_util.h" -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/scope_exit.h" #include "dynarmic/common/x64_disassemble.h" #include "dynarmic/frontend/A32/translate/a32_translate.h" #include "dynarmic/interface/A32/a32.h" @@ -44,10 +44,10 @@ static RunCodeCallbacks GenRunCodeCallbacks(A32::UserCallbacks* cb, CodePtr (*Lo static std::function GenRCP(const A32::UserConfig& conf) { return [conf](BlockOfCode& code) { if (conf.page_table) { - code.mov(code.r14, Common::BitCast(conf.page_table)); + code.mov(code.r14, mcl::bit_cast(conf.page_table)); } if (conf.fastmem_pointer) { - code.mov(code.r13, Common::BitCast(conf.fastmem_pointer)); + code.mov(code.r13, mcl::bit_cast(conf.fastmem_pointer)); } }; } diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a32_jitstate.cpp b/externals/dynarmic/src/dynarmic/backend/x64/a32_jitstate.cpp index 5e70f90e8..2e201c1cc 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a32_jitstate.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/a32_jitstate.cpp @@ -5,11 +5,12 @@ #include "dynarmic/backend/x64/a32_jitstate.h" +#include +#include +#include + #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/nzcv_util.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" namespace Dynarmic::Backend::X64 { @@ -57,13 +58,13 @@ u32 A32JitState::Cpsr() const { // Q flag cpsr |= cpsr_q ? 1 << 27 : 0; // GE flags - cpsr |= Common::Bit<31>(cpsr_ge) ? 1 << 19 : 0; - cpsr |= Common::Bit<23>(cpsr_ge) ? 1 << 18 : 0; - cpsr |= Common::Bit<15>(cpsr_ge) ? 1 << 17 : 0; - cpsr |= Common::Bit<7>(cpsr_ge) ? 1 << 16 : 0; + cpsr |= mcl::bit::get_bit<31>(cpsr_ge) ? 1 << 19 : 0; + cpsr |= mcl::bit::get_bit<23>(cpsr_ge) ? 1 << 18 : 0; + cpsr |= mcl::bit::get_bit<15>(cpsr_ge) ? 1 << 17 : 0; + cpsr |= mcl::bit::get_bit<7>(cpsr_ge) ? 1 << 16 : 0; // E flag, T flag - cpsr |= Common::Bit<1>(upper_location_descriptor) ? 1 << 9 : 0; - cpsr |= Common::Bit<0>(upper_location_descriptor) ? 1 << 5 : 0; + cpsr |= mcl::bit::get_bit<1>(upper_location_descriptor) ? 1 << 9 : 0; + cpsr |= mcl::bit::get_bit<0>(upper_location_descriptor) ? 1 << 5 : 0; // IT state cpsr |= static_cast(upper_location_descriptor & 0b11111100'00000000); cpsr |= static_cast(upper_location_descriptor & 0b00000011'00000000) << 17; @@ -77,18 +78,18 @@ void A32JitState::SetCpsr(u32 cpsr) { // NZCV flags cpsr_nzcv = NZCV::ToX64(cpsr); // Q flag - cpsr_q = Common::Bit<27>(cpsr) ? 1 : 0; + cpsr_q = mcl::bit::get_bit<27>(cpsr) ? 1 : 0; // GE flags cpsr_ge = 0; - cpsr_ge |= Common::Bit<19>(cpsr) ? 0xFF000000 : 0; - cpsr_ge |= Common::Bit<18>(cpsr) ? 0x00FF0000 : 0; - cpsr_ge |= Common::Bit<17>(cpsr) ? 0x0000FF00 : 0; - cpsr_ge |= Common::Bit<16>(cpsr) ? 0x000000FF : 0; + cpsr_ge |= mcl::bit::get_bit<19>(cpsr) ? 0xFF000000 : 0; + cpsr_ge |= mcl::bit::get_bit<18>(cpsr) ? 0x00FF0000 : 0; + cpsr_ge |= mcl::bit::get_bit<17>(cpsr) ? 0x0000FF00 : 0; + cpsr_ge |= mcl::bit::get_bit<16>(cpsr) ? 0x000000FF : 0; upper_location_descriptor &= 0xFFFF0000; // E flag, T flag - upper_location_descriptor |= Common::Bit<9>(cpsr) ? 2 : 0; - upper_location_descriptor |= Common::Bit<5>(cpsr) ? 1 : 0; + upper_location_descriptor |= mcl::bit::get_bit<9>(cpsr) ? 2 : 0; + upper_location_descriptor |= mcl::bit::get_bit<5>(cpsr) ? 1 : 0; // IT state upper_location_descriptor |= (cpsr >> 0) & 0b11111100'00000000; upper_location_descriptor |= (cpsr >> 17) & 0b00000011'00000000; @@ -197,7 +198,7 @@ void A32JitState::SetFpscr(u32 FPSCR) { // Cumulative flags IDC, IOC, IXC, UFC, OFC, DZC fpsr_exc = FPSCR & 0x9F; - if (Common::Bit<24>(FPSCR)) { + if (mcl::bit::get_bit<24>(FPSCR)) { // VFP Flush to Zero guest_MXCSR |= (1 << 15); // SSE Flush to Zero guest_MXCSR |= (1 << 6); // SSE Denormals are Zero diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a32_jitstate.h b/externals/dynarmic/src/dynarmic/backend/x64/a32_jitstate.h index 14cd5764e..cc13abf8e 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a32_jitstate.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/a32_jitstate.h @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp b/externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp index 4b598c6f7..eba49dfca 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64.cpp @@ -7,7 +7,10 @@ #include #include -#include +#include +#include +#include +#include #include "dynarmic/backend/x64/a64_jitstate.h" #include "dynarmic/backend/x64/abi.h" @@ -17,10 +20,6 @@ #include "dynarmic/backend/x64/nzcv_util.h" #include "dynarmic/backend/x64/perf_map.h" #include "dynarmic/backend/x64/stack_layout.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/scope_exit.h" #include "dynarmic/frontend/A64/a64_location_descriptor.h" #include "dynarmic/frontend/A64/a64_types.h" #include "dynarmic/ir/basic_block.h" diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64_memory.cpp b/externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64_memory.cpp index 0ab2ff9b5..ecfab3436 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64_memory.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/a64_emit_x64_memory.cpp @@ -10,7 +10,7 @@ #include #include -#include +#include #include #include "dynarmic/backend/x64/a64_emit_x64.h" diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp b/externals/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp index 8471f43b7..816519d63 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/a64_interface.cpp @@ -8,15 +8,16 @@ #include #include +#include +#include +#include #include "dynarmic/backend/x64/a64_emit_x64.h" #include "dynarmic/backend/x64/a64_jitstate.h" #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/devirtualize.h" #include "dynarmic/backend/x64/jitstate_info.h" -#include "dynarmic/common/assert.h" #include "dynarmic/common/atomic.h" -#include "dynarmic/common/scope_exit.h" #include "dynarmic/common/x64_disassemble.h" #include "dynarmic/frontend/A64/translate/a64_translate.h" #include "dynarmic/interface/A64/a64.h" @@ -39,10 +40,10 @@ static RunCodeCallbacks GenRunCodeCallbacks(A64::UserCallbacks* cb, CodePtr (*Lo static std::function GenRCP(const A64::UserConfig& conf) { return [conf](BlockOfCode& code) { if (conf.page_table) { - code.mov(code.r14, Common::BitCast(conf.page_table)); + code.mov(code.r14, mcl::bit_cast(conf.page_table)); } if (conf.fastmem_pointer) { - code.mov(code.r13, Common::BitCast(conf.fastmem_pointer)); + code.mov(code.r13, mcl::bit_cast(conf.fastmem_pointer)); } }; } diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a64_jitstate.cpp b/externals/dynarmic/src/dynarmic/backend/x64/a64_jitstate.cpp index c7d0e5970..9f983f395 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a64_jitstate.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/a64_jitstate.cpp @@ -5,7 +5,8 @@ #include "dynarmic/backend/x64/a64_jitstate.h" -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A64/a64_location_descriptor.h" namespace Dynarmic::Backend::X64 { @@ -65,7 +66,7 @@ void A64JitState::SetFpcr(u32 value) { const std::array MXCSR_RMode{0x0, 0x4000, 0x2000, 0x6000}; guest_MXCSR |= MXCSR_RMode[(value >> 22) & 0x3]; - if (Common::Bit<24>(value)) { + if (mcl::bit::get_bit<24>(value)) { guest_MXCSR |= (1 << 15); // SSE Flush to Zero guest_MXCSR |= (1 << 6); // SSE Denormals are Zero } diff --git a/externals/dynarmic/src/dynarmic/backend/x64/a64_jitstate.h b/externals/dynarmic/src/dynarmic/backend/x64/a64_jitstate.h index 12479461a..0929e81ec 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/a64_jitstate.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/a64_jitstate.h @@ -7,8 +7,9 @@ #include +#include + #include "dynarmic/backend/x64/nzcv_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/frontend/A64/a64_location_descriptor.h" namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/abi.cpp b/externals/dynarmic/src/dynarmic/backend/x64/abi.cpp index 8535d7640..d6a83b65b 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/abi.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/abi.cpp @@ -8,11 +8,11 @@ #include #include +#include +#include #include #include "dynarmic/backend/x64/block_of_code.h" -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/iterator_util.h" namespace Dynarmic::Backend::X64 { @@ -97,7 +97,7 @@ void ABI_PopRegistersAndAdjustStack(BlockOfCode& code, size_t frame_size, const code.add(rsp, u32(frame_info.stack_subtraction)); } - for (HostLoc gpr : Common::Reverse(regs)) { + for (HostLoc gpr : mcl::iterator::reverse(regs)) { if (HostLocIsGPR(gpr)) { code.pop(HostLocToReg64(gpr)); } diff --git a/externals/dynarmic/src/dynarmic/backend/x64/abi.h b/externals/dynarmic/src/dynarmic/backend/x64/abi.h index 0ccc92ba5..4bddf51ba 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/abi.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/abi.h @@ -6,8 +6,9 @@ #include +#include + #include "dynarmic/backend/x64/hostloc.h" -#include "dynarmic/common/common_types.h" namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp b/externals/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp index 605a90600..c079a809a 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/block_of_code.cpp @@ -15,6 +15,8 @@ #include #include +#include +#include #include #include "dynarmic/backend/x64/a32_jitstate.h" @@ -22,8 +24,6 @@ #include "dynarmic/backend/x64/hostloc.h" #include "dynarmic/backend/x64/perf_map.h" #include "dynarmic/backend/x64/stack_layout.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" namespace Dynarmic::Backend::X64 { @@ -52,6 +52,41 @@ constexpr size_t CONSTANT_POOL_SIZE = 2 * 1024 * 1024; class CustomXbyakAllocator : public Xbyak::Allocator { public: +#ifndef _WIN32 + static constexpr size_t PAGE_SIZE = 4096; + + // Can't subclass Xbyak::MmapAllocator because it is not a pure interface + // and doesn't expose its construtor + uint8_t* alloc(size_t size) override { + // Waste a page to store the size + size += PAGE_SIZE; + +# if defined(MAP_ANONYMOUS) + int mode = MAP_PRIVATE | MAP_ANONYMOUS; +# elif defined(MAP_ANON) + int mode = MAP_PRIVATE | MAP_ANON; +# else +# error "not supported" +# endif +# ifdef MAP_JIT + mode |= MAP_JIT; +# endif + + void* p = mmap(nullptr, size, PROT_READ | PROT_WRITE, mode, -1, 0); + if (p == MAP_FAILED) { + throw Xbyak::Error(Xbyak::ERR_CANT_ALLOC); + } + std::memcpy(p, &size, sizeof(size_t)); + return static_cast(p) + PAGE_SIZE; + } + + void free(uint8_t* p) override { + size_t size; + std::memcpy(&size, p - PAGE_SIZE, sizeof(size_t)); + munmap(p - PAGE_SIZE, size); + } +#endif + #ifdef DYNARMIC_ENABLE_NO_EXECUTE_SUPPORT bool useProtect() const override { return false; } #endif @@ -134,8 +169,8 @@ HostFeature GetHostFeatures() { if (cpu_info.has(Cpu::tAMD)) { std::array data{}; cpu_info.getCpuid(1, data.data()); - const u32 family_base = Common::Bits<8, 11>(data[0]); - const u32 family_extended = Common::Bits<20, 27>(data[0]); + const u32 family_base = mcl::bit::get_bits<8, 11>(data[0]); + const u32 family_extended = mcl::bit::get_bits<20, 27>(data[0]); const u32 family = family_base + family_extended; if (family >= 0x19) features |= HostFeature::FastBMI2; diff --git a/externals/dynarmic/src/dynarmic/backend/x64/block_of_code.h b/externals/dynarmic/src/dynarmic/backend/x64/block_of_code.h index eac124b28..6e64d8c9e 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/block_of_code.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/block_of_code.h @@ -10,6 +10,7 @@ #include #include +#include #include #include @@ -19,7 +20,6 @@ #include "dynarmic/backend/x64/host_feature.h" #include "dynarmic/backend/x64/jitstate_info.h" #include "dynarmic/common/cast_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/interface/halt_reason.h" namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/block_range_information.cpp b/externals/dynarmic/src/dynarmic/backend/x64/block_range_information.cpp index 7dab84e59..c590db123 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/block_range_information.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/block_range_information.cpp @@ -7,10 +7,9 @@ #include #include +#include #include -#include "dynarmic/common/common_types.h" - namespace Dynarmic::Backend::X64 { template diff --git a/externals/dynarmic/src/dynarmic/backend/x64/callback.h b/externals/dynarmic/src/dynarmic/backend/x64/callback.h index ea7aadc0b..716555dae 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/callback.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/callback.h @@ -8,10 +8,9 @@ #include #include +#include #include -#include "dynarmic/common/common_types.h" - namespace Dynarmic::Backend::X64 { using RegList = std::vector; diff --git a/externals/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp b/externals/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp index 39ffdf14d..14e37f678 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/constant_pool.cpp @@ -7,8 +7,9 @@ #include +#include + #include "dynarmic/backend/x64/block_of_code.h" -#include "dynarmic/common/assert.h" namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/constant_pool.h b/externals/dynarmic/src/dynarmic/backend/x64/constant_pool.h index 04243993d..3a5717e97 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/constant_pool.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/constant_pool.h @@ -8,11 +8,10 @@ #include #include +#include #include #include -#include "dynarmic/common/common_types.h" - namespace Dynarmic::Backend::X64 { class BlockOfCode; diff --git a/externals/dynarmic/src/dynarmic/backend/x64/constants.h b/externals/dynarmic/src/dynarmic/backend/x64/constants.h index 0316cebc0..13bf36960 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/constants.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/constants.h @@ -7,8 +7,9 @@ #include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/common/fp/rounding_mode.h" namespace Dynarmic::Backend::X64 { @@ -124,14 +125,14 @@ constexpr u32 FixupLUT(FpFixup src_qnan = FpFixup::A, FpFixup src_pos = FpFixup::A, FpFixup src_neg = FpFixup::A) { u32 fixup_lut = 0; - fixup_lut = Common::ModifyBits<0, 3, u32>(fixup_lut, static_cast(src_qnan)); - fixup_lut = Common::ModifyBits<4, 7, u32>(fixup_lut, static_cast(src_snan)); - fixup_lut = Common::ModifyBits<8, 11, u32>(fixup_lut, static_cast(src_zero)); - fixup_lut = Common::ModifyBits<12, 15, u32>(fixup_lut, static_cast(src_posone)); - fixup_lut = Common::ModifyBits<16, 19, u32>(fixup_lut, static_cast(src_neginf)); - fixup_lut = Common::ModifyBits<20, 23, u32>(fixup_lut, static_cast(src_posinf)); - fixup_lut = Common::ModifyBits<24, 27, u32>(fixup_lut, static_cast(src_pos)); - fixup_lut = Common::ModifyBits<28, 31, u32>(fixup_lut, static_cast(src_neg)); + fixup_lut = mcl::bit::set_bits<0, 3, u32>(fixup_lut, static_cast(src_qnan)); + fixup_lut = mcl::bit::set_bits<4, 7, u32>(fixup_lut, static_cast(src_snan)); + fixup_lut = mcl::bit::set_bits<8, 11, u32>(fixup_lut, static_cast(src_zero)); + fixup_lut = mcl::bit::set_bits<12, 15, u32>(fixup_lut, static_cast(src_posone)); + fixup_lut = mcl::bit::set_bits<16, 19, u32>(fixup_lut, static_cast(src_neginf)); + fixup_lut = mcl::bit::set_bits<20, 23, u32>(fixup_lut, static_cast(src_posinf)); + fixup_lut = mcl::bit::set_bits<24, 27, u32>(fixup_lut, static_cast(src_pos)); + fixup_lut = mcl::bit::set_bits<28, 31, u32>(fixup_lut, static_cast(src_neg)); return fixup_lut; } @@ -153,8 +154,8 @@ enum class FpRangeSign : u8 { // Generates 8-bit immediate LUT for vrange instruction constexpr u8 FpRangeLUT(FpRangeSelect range_select, FpRangeSign range_sign) { u8 range_lut = 0; - range_lut = Common::ModifyBits<0, 1, u8>(range_lut, static_cast(range_select)); - range_lut = Common::ModifyBits<2, 3, u8>(range_lut, static_cast(range_sign)); + range_lut = mcl::bit::set_bits<0, 1, u8>(range_lut, static_cast(range_select)); + range_lut = mcl::bit::set_bits<2, 3, u8>(range_lut, static_cast(range_sign)); return range_lut; } diff --git a/externals/dynarmic/src/dynarmic/backend/x64/devirtualize.h b/externals/dynarmic/src/dynarmic/backend/x64/devirtualize.h index 3914a4d76..778536a3b 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/devirtualize.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/devirtualize.h @@ -8,11 +8,11 @@ #include #include -#include +#include +#include +#include #include "dynarmic/backend/x64/callback.h" -#include "dynarmic/common/cast_util.h" -#include "dynarmic/common/common_types.h" namespace Dynarmic { namespace Backend::X64 { @@ -32,25 +32,25 @@ struct ThunkBuilder { } // namespace impl template -ArgCallback DevirtualizeGeneric(mp::class_type* this_) { +ArgCallback DevirtualizeGeneric(mcl::class_type* this_) { return ArgCallback{&impl::ThunkBuilder::Thunk, reinterpret_cast(this_)}; } template -ArgCallback DevirtualizeWindows(mp::class_type* this_) { +ArgCallback DevirtualizeWindows(mcl::class_type* this_) { static_assert(sizeof(mfp) == 8); - return ArgCallback{Common::BitCast(mfp), reinterpret_cast(this_)}; + return ArgCallback{mcl::bit_cast(mfp), reinterpret_cast(this_)}; } template -ArgCallback DevirtualizeItanium(mp::class_type* this_) { +ArgCallback DevirtualizeItanium(mcl::class_type* this_) { struct MemberFunctionPointer { /// For a non-virtual function, this is a simple function pointer. /// For a virtual function, it is (1 + virtual table offset in bytes). u64 ptr; /// The required adjustment to `this`, prior to the call. u64 adj; - } mfp_struct = Common::BitCast(mfp); + } mfp_struct = mcl::bit_cast(mfp); static_assert(sizeof(MemberFunctionPointer) == 16); static_assert(sizeof(MemberFunctionPointer) == sizeof(mfp)); @@ -58,14 +58,14 @@ ArgCallback DevirtualizeItanium(mp::class_type* this_) { u64 fn_ptr = mfp_struct.ptr; u64 this_ptr = reinterpret_cast(this_) + mfp_struct.adj; if (mfp_struct.ptr & 1) { - u64 vtable = Common::BitCastPointee(this_ptr); - fn_ptr = Common::BitCastPointee(vtable + fn_ptr - 1); + u64 vtable = mcl::bit_cast_pointee(this_ptr); + fn_ptr = mcl::bit_cast_pointee(vtable + fn_ptr - 1); } return ArgCallback{fn_ptr, this_ptr}; } template -ArgCallback Devirtualize(mp::class_type* this_) { +ArgCallback Devirtualize(mcl::class_type* this_) { #if defined(__APPLE__) || defined(linux) || defined(__linux) || defined(__linux__) return DevirtualizeItanium(this_); #elif defined(__MINGW64__) diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp index 3a71842f3..eb8196a0b 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64.cpp @@ -7,16 +7,16 @@ #include +#include +#include +#include +#include #include #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/nzcv_util.h" #include "dynarmic/backend/x64/perf_map.h" #include "dynarmic/backend/x64/stack_layout.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/scope_exit.h" #include "dynarmic/common/variant_util.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/microinstruction.h" @@ -164,10 +164,10 @@ void EmitX64::EmitNZCVFromPackedFlags(EmitContext& ctx, IR::Inst* inst) { if (args[0].IsImmediate()) { const Xbyak::Reg32 nzcv = ctx.reg_alloc.ScratchGpr().cvt32(); u32 value = 0; - value |= Common::Bit<31>(args[0].GetImmediateU32()) ? (1 << 15) : 0; - value |= Common::Bit<30>(args[0].GetImmediateU32()) ? (1 << 14) : 0; - value |= Common::Bit<29>(args[0].GetImmediateU32()) ? (1 << 8) : 0; - value |= Common::Bit<28>(args[0].GetImmediateU32()) ? (1 << 0) : 0; + value |= mcl::bit::get_bit<31>(args[0].GetImmediateU32()) ? (1 << 15) : 0; + value |= mcl::bit::get_bit<30>(args[0].GetImmediateU32()) ? (1 << 14) : 0; + value |= mcl::bit::get_bit<29>(args[0].GetImmediateU32()) ? (1 << 8) : 0; + value |= mcl::bit::get_bit<28>(args[0].GetImmediateU32()) ? (1 << 0) : 0; code.mov(nzcv, value); ctx.reg_alloc.DefineValue(inst, nzcv); } else if (code.HasHostFeature(HostFeature::FastBMI2)) { @@ -204,44 +204,44 @@ Xbyak::Label EmitX64::EmitCond(IR::Cond cond) { // add al, 0x7F restores OF switch (cond) { - case IR::Cond::EQ: //z + case IR::Cond::EQ: // z code.sahf(); code.jz(pass); break; - case IR::Cond::NE: //!z + case IR::Cond::NE: //! z code.sahf(); code.jnz(pass); break; - case IR::Cond::CS: //c + case IR::Cond::CS: // c code.sahf(); code.jc(pass); break; - case IR::Cond::CC: //!c + case IR::Cond::CC: //! c code.sahf(); code.jnc(pass); break; - case IR::Cond::MI: //n + case IR::Cond::MI: // n code.sahf(); code.js(pass); break; - case IR::Cond::PL: //!n + case IR::Cond::PL: //! n code.sahf(); code.jns(pass); break; - case IR::Cond::VS: //v + case IR::Cond::VS: // v code.cmp(al, 0x81); code.jo(pass); break; - case IR::Cond::VC: //!v + case IR::Cond::VC: //! v code.cmp(al, 0x81); code.jno(pass); break; - case IR::Cond::HI: //c & !z + case IR::Cond::HI: // c & !z code.sahf(); code.cmc(); code.ja(pass); break; - case IR::Cond::LS: //!c | z + case IR::Cond::LS: //! c | z code.sahf(); code.cmc(); code.jna(pass); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64.h b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64.h index 5290da151..08a846405 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64.h @@ -11,13 +11,13 @@ #include #include +#include #include #include #include #include "dynarmic/backend/x64/exception_handler.h" #include "dynarmic/backend/x64/reg_alloc.h" -#include "dynarmic/common/bit_util.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/ir/location_descriptor.h" #include "dynarmic/ir/terminal.h" @@ -41,10 +41,10 @@ using A64FullVectorWidth = std::integral_constant; // relative to the size of a vector register. e.g. T = u32 would result // in a std::array. template -using VectorArray = std::array()>; +using VectorArray = std::array>; template -using HalfVectorArray = std::array() / 2>; +using HalfVectorArray = std::array / 2>; struct EmitContext { EmitContext(RegAlloc& reg_alloc, IR::Block& block); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_aes.cpp b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_aes.cpp index be9faa3ee..9430f0726 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_aes.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_aes.cpp @@ -3,10 +3,11 @@ * SPDX-License-Identifier: 0BSD */ +#include + #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/emit_x64.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/crypto/aes.h" #include "dynarmic/ir/microinstruction.h" diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_data_processing.cpp b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_data_processing.cpp index c79d342d8..eead879ad 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_data_processing.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_data_processing.cpp @@ -6,10 +6,11 @@ #include #include +#include +#include + #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/emit_x64.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/microinstruction.h" #include "dynarmic/ir/opcodes.h" @@ -146,44 +147,44 @@ static void EmitConditionalSelect(BlockOfCode& code, EmitContext& ctx, IR::Inst* // add al, 0x7F restores OF switch (args[0].GetImmediateCond()) { - case IR::Cond::EQ: //z + case IR::Cond::EQ: // z code.sahf(); code.cmovz(else_, then_); break; - case IR::Cond::NE: //!z + case IR::Cond::NE: //! z code.sahf(); code.cmovnz(else_, then_); break; - case IR::Cond::CS: //c + case IR::Cond::CS: // c code.sahf(); code.cmovc(else_, then_); break; - case IR::Cond::CC: //!c + case IR::Cond::CC: //! c code.sahf(); code.cmovnc(else_, then_); break; - case IR::Cond::MI: //n + case IR::Cond::MI: // n code.sahf(); code.cmovs(else_, then_); break; - case IR::Cond::PL: //!n + case IR::Cond::PL: //! n code.sahf(); code.cmovns(else_, then_); break; - case IR::Cond::VS: //v + case IR::Cond::VS: // v code.cmp(nzcv.cvt8(), 0x81); code.cmovo(else_, then_); break; - case IR::Cond::VC: //!v + case IR::Cond::VC: //! v code.cmp(nzcv.cvt8(), 0x81); code.cmovno(else_, then_); break; - case IR::Cond::HI: //c & !z + case IR::Cond::HI: // c & !z code.sahf(); code.cmc(); code.cmova(else_, then_); break; - case IR::Cond::LS: //!c | z + case IR::Cond::LS: //! c | z code.sahf(); code.cmc(); code.cmovna(else_, then_); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp index 512db1b2b..30a8c3013 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_floating_point.cpp @@ -7,20 +7,20 @@ #include #include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include +#include +#include +#include #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/constants.h" #include "dynarmic/backend/x64/emit_x64.h" -#include "dynarmic/common/assert.h" #include "dynarmic/common/cast_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/info.h" @@ -34,6 +34,7 @@ namespace Dynarmic::Backend::X64 { using namespace Xbyak::util; +namespace mp = mcl::mp; namespace { @@ -173,7 +174,7 @@ void PostProcessNaN(BlockOfCode& code, Xbyak::Xmm result, Xbyak::Xmm tmp) { // We allow for the case where op1 and result are the same register. We do not read from op1 once result is written to. template void EmitPostProcessNaNs(BlockOfCode& code, Xbyak::Xmm result, Xbyak::Xmm op1, Xbyak::Xmm op2, Xbyak::Reg64 tmp, Xbyak::Label end) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; constexpr FPT exponent_mask = FP::FPInfo::exponent_mask; constexpr FPT mantissa_msb = FP::FPInfo::mantissa_msb; constexpr u8 mantissa_msb_bit = static_cast(FP::FPInfo::explicit_mantissa_width - 1); @@ -267,7 +268,7 @@ void FPTwoOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) { template void FPThreeOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -324,7 +325,7 @@ void FPThreeOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) template void FPAbs(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; constexpr FPT non_sign_mask = FP::FPInfo::sign_mask - FPT(1u); auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -350,7 +351,7 @@ void EmitX64::EmitFPAbs64(EmitContext& ctx, IR::Inst* inst) { template void FPNeg(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; constexpr FPT sign_mask = FP::FPInfo::sign_mask; auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -440,7 +441,7 @@ static void EmitFPMinMax(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { template static void EmitFPMinMaxNumeric(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; constexpr FPT default_nan = FP::FPInfo::DefaultNaN(); constexpr u8 mantissa_msb_bit = static_cast(FP::FPInfo::explicit_mantissa_width - 1); @@ -592,7 +593,7 @@ void EmitX64::EmitFPMul64(EmitContext& ctx, IR::Inst* inst) { template static void EmitFPMulAdd(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -697,7 +698,7 @@ void EmitX64::EmitFPMulAdd64(EmitContext& ctx, IR::Inst* inst) { template static void EmitFPMulX(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -755,7 +756,7 @@ void EmitX64::EmitFPMulX64(EmitContext& ctx, IR::Inst* inst) { template static void EmitFPRecipEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; if constexpr (fsize != 16) { if (ctx.HasOptimization(OptimizationFlag::Unsafe_ReducedErrorFP)) { @@ -801,7 +802,7 @@ void EmitX64::EmitFPRecipEstimate64(EmitContext& ctx, IR::Inst* inst) { template static void EmitFPRecipExponent(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; auto args = ctx.reg_alloc.GetArgumentInfo(inst); ctx.reg_alloc.HostCall(inst, args[0]); @@ -824,7 +825,7 @@ void EmitX64::EmitFPRecipExponent64(EmitContext& ctx, IR::Inst* inst) { template static void EmitFPRecipStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -949,7 +950,7 @@ static void EmitFPRound(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, siz constexpr size_t fsize = std::get<0>(t); constexpr FP::RoundingMode rounding_mode = std::get<1>(t); constexpr bool exact = std::get<2>(t); - using InputSize = mp::unsigned_integer_of_size; + using InputSize = mcl::unsigned_integer_of_size; return FP::FPRoundInt(static_cast(input), fpcr, rounding_mode, exact, fpsr); })}; @@ -977,7 +978,7 @@ void EmitX64::EmitFPRoundInt64(EmitContext& ctx, IR::Inst* inst) { template static void EmitFPRSqrtEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; if constexpr (fsize != 16) { if (ctx.HasOptimization(OptimizationFlag::Unsafe_ReducedErrorFP)) { @@ -1156,7 +1157,7 @@ void EmitX64::EmitFPRSqrtEstimate64(EmitContext& ctx, IR::Inst* inst) { template static void EmitFPRSqrtStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -1589,7 +1590,7 @@ static void EmitFPToFixed(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { constexpr auto t = mp::lower_to_tuple_v; constexpr size_t fbits = std::get<0>(t); constexpr FP::RoundingMode rounding_mode = std::get<1>(t); - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; return FP::FPToFixed(isize, static_cast(input), fbits, unsigned_, fpcr, rounding_mode, fpsr); })}; diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc index 9e71df2ab..b82aabb16 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc @@ -3,7 +3,7 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/macro_util.h" +#include #define AxxEmitX64 CONCATENATE_TOKENS(Axx, EmitX64) #define AxxEmitContext CONCATENATE_TOKENS(Axx, EmitContext) @@ -98,10 +98,10 @@ void AxxEmitX64::EmitMemoryRead(AxxEmitContext& ctx, IR::Inst* inst) { const auto location = EmitReadMemoryMov(code, value_idx, src_ptr, ordered); fastmem_patch_info.emplace( - Common::BitCast(location), + mcl::bit_cast(location), FastmemPatchInfo{ - Common::BitCast(code.getCurr()), - Common::BitCast(wrapped_fn), + mcl::bit_cast(code.getCurr()), + mcl::bit_cast(wrapped_fn), *fastmem_marker, conf.recompile_on_fastmem_failure, }); @@ -178,10 +178,10 @@ void AxxEmitX64::EmitMemoryWrite(AxxEmitContext& ctx, IR::Inst* inst) { const auto location = EmitWriteMemoryMov(code, dest_ptr, value_idx, ordered); fastmem_patch_info.emplace( - Common::BitCast(location), + mcl::bit_cast(location), FastmemPatchInfo{ - Common::BitCast(code.getCurr()), - Common::BitCast(wrapped_fn), + mcl::bit_cast(code.getCurr()), + mcl::bit_cast(wrapped_fn), *fastmem_marker, conf.recompile_on_fastmem_failure, }); @@ -210,7 +210,7 @@ void AxxEmitX64::EmitExclusiveReadMemory(AxxEmitContext& ctx, IR::Inst* inst) { const bool ordered = IsOrdered(args[1].GetImmediateAccType()); if constexpr (bitsize != 128) { - using T = mp::unsigned_integer_of_size; + using T = mcl::unsigned_integer_of_size; ctx.reg_alloc.HostCall(inst, {}, args[0]); @@ -275,7 +275,7 @@ void AxxEmitX64::EmitExclusiveWriteMemory(AxxEmitContext& ctx, IR::Inst* inst) { code.mov(code.byte[r15 + offsetof(AxxJitState, exclusive_state)], u8(0)); code.mov(code.ABI_PARAM1, reinterpret_cast(&conf)); if constexpr (bitsize != 128) { - using T = mp::unsigned_integer_of_size; + using T = mcl::unsigned_integer_of_size; code.CallLambda( [](AxxUserConfig& conf, Axx::VAddr vaddr, T value) -> u32 { @@ -339,7 +339,7 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in EmitExclusiveLock(code, conf, tmp, tmp2.cvt32()); code.mov(code.byte[r15 + offsetof(AxxJitState, exclusive_state)], u8(1)); - code.mov(tmp, Common::BitCast(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id))); + code.mov(tmp, mcl::bit_cast(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id))); code.mov(qword[tmp], vaddr); const auto fastmem_marker = ShouldFastmem(ctx, inst); @@ -352,10 +352,10 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in const auto location = EmitReadMemoryMov(code, value_idx, src_ptr, ordered); fastmem_patch_info.emplace( - Common::BitCast(location), + mcl::bit_cast(location), FastmemPatchInfo{ - Common::BitCast(code.getCurr()), - Common::BitCast(wrapped_fn), + mcl::bit_cast(code.getCurr()), + mcl::bit_cast(wrapped_fn), *fastmem_marker, conf.recompile_on_exclusive_fastmem_failure, }); @@ -373,7 +373,7 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in code.call(wrapped_fn); } - code.mov(tmp, Common::BitCast(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id))); + code.mov(tmp, mcl::bit_cast(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id))); EmitWriteMemoryMov(code, tmp, value_idx, false); EmitExclusiveUnlock(code, conf, tmp, tmp2.cvt32()); @@ -418,7 +418,7 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i Xbyak::Label end; - code.mov(tmp, Common::BitCast(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id))); + code.mov(tmp, mcl::bit_cast(GetExclusiveMonitorAddressPointer(conf.global_monitor, conf.processor_id))); code.mov(status, u32(1)); code.cmp(code.byte[r15 + offsetof(AxxJitState, exclusive_state)], u8(0)); code.je(end, code.T_NEAR); @@ -428,7 +428,7 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i EmitExclusiveTestAndClear(code, conf, vaddr, tmp, rax); code.mov(code.byte[r15 + offsetof(AxxJitState, exclusive_state)], u8(0)); - code.mov(tmp, Common::BitCast(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id))); + code.mov(tmp, mcl::bit_cast(GetExclusiveMonitorValuePointer(conf.global_monitor, conf.processor_id))); if constexpr (bitsize == 128) { code.mov(rax, qword[tmp + 0]); @@ -488,10 +488,10 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i code.call(wrapped_fn); fastmem_patch_info.emplace( - Common::BitCast(location), + mcl::bit_cast(location), FastmemPatchInfo{ - Common::BitCast(code.getCurr()), - Common::BitCast(wrapped_fn), + mcl::bit_cast(code.getCurr()), + mcl::bit_cast(wrapped_fn), *fastmem_marker, conf.recompile_on_exclusive_fastmem_failure, }); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h index e92ed7290..29146820c 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_memory.h @@ -3,6 +3,7 @@ * SPDX-License-Identifier: 0BSD */ +#include #include #include "dynarmic/backend/x64/a32_emit_x64.h" @@ -343,7 +344,7 @@ void EmitExclusiveLock(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg64 p return; } - code.mov(pointer, Common::BitCast(GetExclusiveMonitorLockPointer(conf.global_monitor))); + code.mov(pointer, mcl::bit_cast(GetExclusiveMonitorLockPointer(conf.global_monitor))); EmitSpinLockLock(code, pointer, tmp); } @@ -353,7 +354,7 @@ void EmitExclusiveUnlock(BlockOfCode& code, const UserConfig& conf, Xbyak::Reg64 return; } - code.mov(pointer, Common::BitCast(GetExclusiveMonitorLockPointer(conf.global_monitor))); + code.mov(pointer, mcl::bit_cast(GetExclusiveMonitorLockPointer(conf.global_monitor))); EmitSpinLockUnlock(code, pointer, tmp); } @@ -370,7 +371,7 @@ void EmitExclusiveTestAndClear(BlockOfCode& code, const UserConfig& conf, Xbyak: continue; } Xbyak::Label ok; - code.mov(pointer, Common::BitCast(GetExclusiveMonitorAddressPointer(conf.global_monitor, processor_index))); + code.mov(pointer, mcl::bit_cast(GetExclusiveMonitorAddressPointer(conf.global_monitor, processor_index))); code.cmp(qword[pointer], vaddr); code.jne(ok); code.mov(qword[pointer], tmp); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp index a4cd2becc..7301c77b3 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_saturation.cpp @@ -5,13 +5,13 @@ #include -#include +#include +#include +#include +#include #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/emit_x64.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/microinstruction.h" #include "dynarmic/ir/opcodes.h" @@ -37,7 +37,7 @@ void EmitSignedSaturatedOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) Xbyak::Reg addend = ctx.reg_alloc.UseGpr(args[1]).changeBit(size); Xbyak::Reg overflow = ctx.reg_alloc.ScratchGpr().changeBit(size); - constexpr u64 int_max = static_cast(std::numeric_limits>::max()); + constexpr u64 int_max = static_cast(std::numeric_limits>::max()); if constexpr (size < 64) { code.xor_(overflow.cvt32(), overflow.cvt32()); code.bt(result.cvt32(), size - 1); @@ -81,7 +81,7 @@ void EmitUnsignedSaturatedOp(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst Xbyak::Reg op_result = ctx.reg_alloc.UseScratchGpr(args[0]).changeBit(size); Xbyak::Reg addend = ctx.reg_alloc.UseScratchGpr(args[1]).changeBit(size); - constexpr u64 boundary = op == Op::Add ? std::numeric_limits>::max() : 0; + constexpr u64 boundary = op == Op::Add ? std::numeric_limits>::max() : 0; if constexpr (op == Op::Add) { code.add(op_result, addend); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector.cpp b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector.cpp index 5a892d282..38e0e6720 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector.cpp @@ -8,15 +8,18 @@ #include #include -#include +#include +#include +#include +#include +#include +#include +#include #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/constants.h" #include "dynarmic/backend/x64/emit_x64.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/math_util.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/microinstruction.h" @@ -52,7 +55,7 @@ static void EmitAVXVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst template static void EmitOneArgumentFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) { - const auto fn = static_cast*>(lambda); + const auto fn = static_cast*>(lambda); constexpr u32 stack_space = 2 * 16; auto args = ctx.reg_alloc.GetArgumentInfo(inst); const Xbyak::Xmm arg1 = ctx.reg_alloc.UseXmm(args[0]); @@ -75,7 +78,7 @@ static void EmitOneArgumentFallback(BlockOfCode& code, EmitContext& ctx, IR::Ins template static void EmitOneArgumentFallbackWithSaturation(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) { - const auto fn = static_cast*>(lambda); + const auto fn = static_cast*>(lambda); constexpr u32 stack_space = 2 * 16; auto args = ctx.reg_alloc.GetArgumentInfo(inst); const Xbyak::Xmm arg1 = ctx.reg_alloc.UseXmm(args[0]); @@ -100,7 +103,7 @@ static void EmitOneArgumentFallbackWithSaturation(BlockOfCode& code, EmitContext template static void EmitTwoArgumentFallbackWithSaturation(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) { - const auto fn = static_cast*>(lambda); + const auto fn = static_cast*>(lambda); constexpr u32 stack_space = 3 * 16; auto args = ctx.reg_alloc.GetArgumentInfo(inst); const Xbyak::Xmm arg1 = ctx.reg_alloc.UseXmm(args[0]); @@ -128,7 +131,7 @@ static void EmitTwoArgumentFallbackWithSaturation(BlockOfCode& code, EmitContext template static void EmitTwoArgumentFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lambda lambda) { - const auto fn = static_cast*>(lambda); + const auto fn = static_cast*>(lambda); constexpr u32 stack_space = 3 * 16; auto args = ctx.reg_alloc.GetArgumentInfo(inst); const Xbyak::Xmm arg1 = ctx.reg_alloc.UseXmm(args[0]); @@ -528,7 +531,7 @@ void EmitX64::EmitVectorArithmeticShiftRight64(EmitContext& ctx, IR::Inst* inst) template static constexpr T VShift(T x, T y) { const s8 shift_amount = static_cast(static_cast(y)); - const s64 bit_size = static_cast(Common::BitSize()); + const s64 bit_size = static_cast(mcl::bitsizeof); if constexpr (std::is_signed_v) { if (shift_amount >= bit_size) { @@ -565,22 +568,25 @@ void EmitX64::EmitVectorArithmeticVShift16(EmitContext& ctx, IR::Inst* inst) { const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]); const Xbyak::Xmm left_shift = ctx.reg_alloc.UseScratchXmm(args[1]); - const Xbyak::Xmm right_shift = ctx.reg_alloc.ScratchXmm(); - const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm(); + const Xbyak::Xmm right_shift = xmm16; + const Xbyak::Xmm tmp = xmm17; - code.vmovdqa(tmp, code.MConst(xword, 0x00FF00FF00FF00FF, 0x00FF00FF00FF00FF)); - code.vpxor(right_shift, right_shift, right_shift); + code.vmovdqa32(tmp, code.MConst(xword, 0x00FF00FF00FF00FF, 0x00FF00FF00FF00FF)); + code.vpxord(right_shift, right_shift, right_shift); code.vpsubw(right_shift, right_shift, left_shift); code.vpsllw(xmm0, left_shift, 8); code.vpsraw(xmm0, xmm0, 15); - code.vpand(right_shift, right_shift, tmp); - code.vpand(left_shift, left_shift, tmp); + const Xbyak::Opmask mask = k1; + code.vpmovb2m(mask, xmm0); + + code.vpandd(right_shift, right_shift, tmp); + code.vpandd(left_shift, left_shift, tmp); code.vpsravw(tmp, result, right_shift); code.vpsllvw(result, result, left_shift); - code.pblendvb(result, tmp); + code.vpblendmb(result | mask, result, tmp); ctx.reg_alloc.DefineValue(inst, result); return; @@ -628,21 +634,23 @@ void EmitX64::EmitVectorArithmeticVShift64(EmitContext& ctx, IR::Inst* inst) { const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]); const Xbyak::Xmm left_shift = ctx.reg_alloc.UseScratchXmm(args[1]); - const Xbyak::Xmm right_shift = ctx.reg_alloc.ScratchXmm(); - const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm(); + const Xbyak::Xmm right_shift = xmm16; + const Xbyak::Xmm tmp = xmm17; - code.vmovdqa(tmp, code.MConst(xword, 0x00000000000000FF, 0x00000000000000FF)); - code.vpxor(right_shift, right_shift, right_shift); + code.vmovdqa32(tmp, code.MConst(xword, 0x00000000000000FF, 0x00000000000000FF)); + code.vpxorq(right_shift, right_shift, right_shift); code.vpsubq(right_shift, right_shift, left_shift); code.vpsllq(xmm0, left_shift, 56); + const Xbyak::Opmask mask = k1; + code.vpmovq2m(mask, xmm0); - code.vpand(right_shift, right_shift, tmp); - code.vpand(left_shift, left_shift, tmp); + code.vpandq(right_shift, right_shift, tmp); + code.vpandq(left_shift, left_shift, tmp); code.vpsravq(tmp, result, right_shift); code.vpsllvq(result, result, left_shift); - code.blendvpd(result, tmp); + code.vpblendmq(result | mask, result, tmp); ctx.reg_alloc.DefineValue(inst, result); return; @@ -853,10 +861,10 @@ void EmitX64::EmitVectorBroadcastElement16(EmitContext& ctx, IR::Inst* inst) { } if (index < 4) { - code.pshuflw(a, a, Common::Replicate(index, 2)); + code.pshuflw(a, a, mcl::bit::replicate_element<2, u8>(index)); code.punpcklqdq(a, a); } else { - code.pshufhw(a, a, Common::Replicate(u8(index - 4), 2)); + code.pshufhw(a, a, mcl::bit::replicate_element<2, u8>(u8(index - 4))); code.punpckhqdq(a, a); } @@ -870,7 +878,7 @@ void EmitX64::EmitVectorBroadcastElement32(EmitContext& ctx, IR::Inst* inst) { const u8 index = args[1].GetImmediateU8(); ASSERT(index < 4); - code.pshufd(a, a, Common::Replicate(index, 2)); + code.pshufd(a, a, mcl::bit::replicate_element<2, u8>(index)); ctx.reg_alloc.DefineValue(inst, a); } @@ -883,7 +891,7 @@ void EmitX64::EmitVectorBroadcastElement64(EmitContext& ctx, IR::Inst* inst) { ASSERT(index < 2); if (code.HasHostFeature(HostFeature::AVX)) { - code.vpermilpd(a, a, Common::Replicate(index, 1)); + code.vpermilpd(a, a, mcl::bit::replicate_element<1, u8>(index)); } else { if (index == 0) { code.punpcklqdq(a, a); @@ -899,7 +907,7 @@ static void EmitVectorCountLeadingZeros(VectorArray& result, const VectorArra for (size_t i = 0; i < result.size(); i++) { T element = data[i]; - size_t count = Common::BitSize(); + size_t count = mcl::bitsizeof; while (element != 0) { element >>= 1; --count; @@ -1630,7 +1638,7 @@ void EmitX64::EmitVectorLogicalShiftLeft8(EmitContext& ctx, IR::Inst* inst) { code.gf2p8affineqb(result, code.MConst(xword, shift_matrix, shift_matrix), 0); } else { const u64 replicand = (0xFFULL << shift_amount) & 0xFF; - const u64 mask = Common::Replicate(replicand, Common::BitSize()); + const u64 mask = mcl::bit::replicate_element(replicand); code.psllw(result, shift_amount); code.pand(result, code.MConst(xword, mask, mask)); @@ -1687,7 +1695,7 @@ void EmitX64::EmitVectorLogicalShiftRight8(EmitContext& ctx, IR::Inst* inst) { code.gf2p8affineqb(result, code.MConst(xword, shift_matrix, shift_matrix), 0); } else { const u64 replicand = 0xFEULL >> shift_amount; - const u64 mask = Common::Replicate(replicand, Common::BitSize()); + const u64 mask = mcl::bit::replicate_element(replicand); code.psrlw(result, shift_amount); code.pand(result, code.MConst(xword, mask, mask)); @@ -1741,18 +1749,18 @@ void EmitX64::EmitVectorLogicalVShift16(EmitContext& ctx, IR::Inst* inst) { const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]); const Xbyak::Xmm left_shift = ctx.reg_alloc.UseScratchXmm(args[1]); - const Xbyak::Xmm right_shift = ctx.reg_alloc.ScratchXmm(); - const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm(); + const Xbyak::Xmm right_shift = xmm16; + const Xbyak::Xmm tmp = xmm17; - code.vmovdqa(tmp, code.MConst(xword, 0x00FF00FF00FF00FF, 0x00FF00FF00FF00FF)); - code.vpxor(right_shift, right_shift, right_shift); + code.vmovdqa32(tmp, code.MConst(xword, 0x00FF00FF00FF00FF, 0x00FF00FF00FF00FF)); + code.vpxord(right_shift, right_shift, right_shift); code.vpsubw(right_shift, right_shift, left_shift); - code.vpand(left_shift, left_shift, tmp); - code.vpand(right_shift, right_shift, tmp); + code.vpandd(left_shift, left_shift, tmp); + code.vpandd(right_shift, right_shift, tmp); code.vpsllvw(tmp, result, left_shift); code.vpsrlvw(result, result, right_shift); - code.vpor(result, result, tmp); + code.vpord(result, result, tmp); ctx.reg_alloc.DefineValue(inst, result); return; @@ -2500,9 +2508,9 @@ void EmitX64::EmitVectorPairedAddSignedWiden32(EmitContext& ctx, IR::Inst* inst) auto args = ctx.reg_alloc.GetArgumentInfo(inst); const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]); - const Xbyak::Xmm c = ctx.reg_alloc.ScratchXmm(); if (code.HasHostFeature(HostFeature::AVX512_Ortho)) { + const Xbyak::Xmm c = xmm16; code.vpsraq(c, a, 32); code.vpsllq(a, a, 32); code.vpsraq(a, a, 32); @@ -2510,6 +2518,7 @@ void EmitX64::EmitVectorPairedAddSignedWiden32(EmitContext& ctx, IR::Inst* inst) } else { const Xbyak::Xmm tmp1 = ctx.reg_alloc.ScratchXmm(); const Xbyak::Xmm tmp2 = ctx.reg_alloc.ScratchXmm(); + const Xbyak::Xmm c = ctx.reg_alloc.ScratchXmm(); code.movdqa(c, a); code.psllq(a, 32); @@ -2768,7 +2777,7 @@ void EmitX64::EmitVectorPairedMinU32(EmitContext& ctx, IR::Inst* inst) { template static D PolynomialMultiply(T lhs, T rhs) { - constexpr size_t bit_size = Common::BitSize(); + constexpr size_t bit_size = mcl::bitsizeof; const std::bitset operand(lhs); D res = 0; @@ -2883,11 +2892,11 @@ void EmitX64::EmitVectorPolynomialMultiplyLong64(EmitContext& ctx, IR::Inst* ins EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray& result, const VectorArray& a, const VectorArray& b) { const auto handle_high_bits = [](u64 lhs, u64 rhs) { - constexpr size_t bit_size = Common::BitSize(); + constexpr size_t bit_size = mcl::bitsizeof; u64 result = 0; for (size_t i = 1; i < bit_size; i++) { - if (Common::Bit(i, lhs)) { + if (mcl::bit::get_bit(i, lhs)) { result ^= rhs >> (bit_size - i); } } @@ -2938,7 +2947,7 @@ void EmitX64::EmitVectorPopulationCount(EmitContext& ctx, IR::Inst* inst) { EmitOneArgumentFallback(code, ctx, inst, [](VectorArray& result, const VectorArray& a) { std::transform(a.begin(), a.end(), result.begin(), [](u8 val) { - return static_cast(Common::BitCount(val)); + return static_cast(mcl::bit::count_ones(val)); }); }); } @@ -3187,10 +3196,10 @@ static void RoundingShiftLeft(VectorArray& out, const VectorArray& lhs, co using signed_type = std::make_signed_t; using unsigned_type = std::make_unsigned_t; - constexpr auto bit_size = static_cast(Common::BitSize()); + constexpr auto bit_size = static_cast(mcl::bitsizeof); for (size_t i = 0; i < out.size(); i++) { - const s64 extended_shift = Common::SignExtend<8>(rhs[i] & 0xFF); + const s64 extended_shift = static_cast(mcl::bit::sign_extend<8, u64>(rhs[i] & 0xFF)); if (extended_shift >= 0) { if (extended_shift >= bit_size) { @@ -4283,7 +4292,7 @@ static bool VectorSignedSaturatedShiftLeft(VectorArray& dst, const VectorArra bool qc_flag = false; - constexpr size_t bit_size_minus_one = Common::BitSize() - 1; + constexpr size_t bit_size_minus_one = mcl::bitsizeof - 1; const auto saturate = [bit_size_minus_one](T value) { return static_cast((static_cast(value) >> bit_size_minus_one) + (U{1} << bit_size_minus_one) - 1); @@ -4291,7 +4300,7 @@ static bool VectorSignedSaturatedShiftLeft(VectorArray& dst, const VectorArra for (size_t i = 0; i < dst.size(); i++) { const T element = data[i]; - const T shift = std::clamp(static_cast(Common::SignExtend<8>(shift_values[i] & 0xFF)), + const T shift = std::clamp(static_cast(mcl::bit::sign_extend<8>(static_cast(shift_values[i] & 0xFF))), -static_cast(bit_size_minus_one), std::numeric_limits::max()); if (element == 0) { @@ -4339,12 +4348,12 @@ template> static bool VectorSignedSaturatedShiftLeftUnsigned(VectorArray& dst, const VectorArray& data, const VectorArray& shift_values) { static_assert(std::is_signed_v, "T must be signed."); - constexpr size_t bit_size_minus_one = Common::BitSize() - 1; + constexpr size_t bit_size_minus_one = mcl::bitsizeof - 1; bool qc_flag = false; for (size_t i = 0; i < dst.size(); i++) { const T element = data[i]; - const T shift = std::clamp(static_cast(Common::SignExtend<8>(shift_values[i] & 0xFF)), + const T shift = std::clamp(static_cast(mcl::bit::sign_extend<8>(static_cast(shift_values[i] & 0xFF))), -static_cast(bit_size_minus_one), std::numeric_limits::max()); if (element == 0) { @@ -4695,14 +4704,14 @@ void EmitX64::EmitVectorTableLookup128(EmitContext& ctx, IR::Inst* inst) { if (code.HasHostFeature(HostFeature::AVX512_Ortho | HostFeature::AVX512BW)) { const Xbyak::Xmm indicies = ctx.reg_alloc.UseXmm(args[2]); const Xbyak::Xmm result = ctx.reg_alloc.UseScratchXmm(args[0]); - const Xbyak::Xmm masked = ctx.reg_alloc.ScratchXmm(); + const Xbyak::Xmm masked = xmm16; code.vpandd(masked, indicies, code.MConst(xword_b, 0xF0F0F0F0F0F0F0F0, 0xF0F0F0F0F0F0F0F0)); for (size_t i = 0; i < table_size; ++i) { const Xbyak::Xmm xmm_table = ctx.reg_alloc.UseScratchXmm(table[i]); const Xbyak::Opmask table_mask = k1; - const u64 table_index = Common::Replicate(i * 16, 8); + const u64 table_index = mcl::bit::replicate_element(i * 16); code.vpcmpeqb(table_mask, masked, code.MConst(xword, table_index, table_index)); @@ -4730,7 +4739,7 @@ void EmitX64::EmitVectorTableLookup128(EmitContext& ctx, IR::Inst* inst) { for (size_t i = 0; i < table_size; ++i) { const Xbyak::Xmm xmm_table = ctx.reg_alloc.UseScratchXmm(table[i]); - const u64 table_index = Common::Replicate(i * 16, 8); + const u64 table_index = mcl::bit::replicate_element(i * 16); if (table_index == 0) { code.pxor(xmm0, xmm0); @@ -5037,7 +5046,7 @@ void EmitX64::EmitVectorUnsignedRecipEstimate(EmitContext& ctx, IR::Inst* inst) continue; } - const u32 input = Common::Bits<23, 31>(a[i]); + const u32 input = mcl::bit::get_bits<23, 31>(a[i]); const u32 estimate = Common::RecipEstimate(input); result[i] = (0b100000000 | estimate) << 23; @@ -5053,7 +5062,7 @@ void EmitX64::EmitVectorUnsignedRecipSqrtEstimate(EmitContext& ctx, IR::Inst* in continue; } - const u32 input = Common::Bits<23, 31>(a[i]); + const u32 input = mcl::bit::get_bits<23, 31>(a[i]); const u32 estimate = Common::RecipSqrtEstimate(input); result[i] = (0b100000000 | estimate) << 23; @@ -5066,7 +5075,7 @@ void EmitX64::EmitVectorUnsignedRecipSqrtEstimate(EmitContext& ctx, IR::Inst* in template> static bool EmitVectorUnsignedSaturatedAccumulateSigned(VectorArray& result, const VectorArray& lhs, const VectorArray& rhs) { static_assert(std::is_signed_v, "T must be signed."); - static_assert(Common::BitSize() < 64, "T must be less than 64 bits in size."); + static_assert(mcl::bitsizeof < 64, "T must be less than 64 bits in size."); bool qc_flag = false; @@ -5170,12 +5179,12 @@ static bool VectorUnsignedSaturatedShiftLeft(VectorArray& dst, const VectorAr bool qc_flag = false; - constexpr size_t bit_size = Common::BitSize(); + constexpr size_t bit_size = mcl::bitsizeof; constexpr S negative_bit_size = -static_cast(bit_size); for (size_t i = 0; i < dst.size(); i++) { const T element = data[i]; - const S shift = std::clamp(static_cast(Common::SignExtend<8>(shift_values[i] & 0xFF)), + const S shift = std::clamp(static_cast(mcl::bit::sign_extend<8>(static_cast(shift_values[i] & 0xFF))), negative_bit_size, std::numeric_limits::max()); if (element == 0 || shift <= negative_bit_size) { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp index b46223614..d3275cb50 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_floating_point.cpp @@ -9,19 +9,19 @@ #include #include -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include +#include +#include +#include #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/constants.h" #include "dynarmic/backend/x64/emit_x64.h" -#include "dynarmic/common/assert.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/info.h" #include "dynarmic/common/fp/op.h" @@ -34,6 +34,7 @@ namespace Dynarmic::Backend::X64 { using namespace Xbyak::util; +namespace mp = mcl::mp; namespace { @@ -70,7 +71,7 @@ void MaybeStandardFPSCRValue(BlockOfCode& code, EmitContext& ctx, bool fpcr_cont template class Indexer, size_t narg> struct NaNHandler { public: - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; using function_type = void (*)(std::array, narg>&, FP::FPCR); @@ -161,26 +162,26 @@ Xbyak::Address GetVectorOf(BlockOfCode& code) { template Xbyak::Address GetNaNVector(BlockOfCode& code) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; return GetVectorOf::DefaultNaN()>(code); } template Xbyak::Address GetNegativeZeroVector(BlockOfCode& code) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; return GetVectorOf::Zero(true)>(code); } template Xbyak::Address GetSmallestNormalVector(BlockOfCode& code) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; constexpr FPT smallest_normal_number = FP::FPValue::exponent_min, 1>(); return GetVectorOf(code); } -template value> +template value> Xbyak::Address GetVectorOf(BlockOfCode& code) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; return GetVectorOf()>(code); } @@ -413,7 +414,7 @@ void EmitThreeOpVectorOperation(BlockOfCode& code, EmitContext& ctx, IR::Inst* i template void EmitTwoOpFallbackWithoutRegAlloc(BlockOfCode& code, EmitContext& ctx, Xbyak::Xmm result, Xbyak::Xmm arg1, Lambda lambda, bool fpcr_controlled) { - const auto fn = static_cast*>(lambda); + const auto fn = static_cast*>(lambda); const u32 fpcr = ctx.FPCR(fpcr_controlled).Value(); @@ -448,7 +449,7 @@ void EmitTwoOpFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lamb template void EmitThreeOpFallbackWithoutRegAlloc(BlockOfCode& code, EmitContext& ctx, Xbyak::Xmm result, Xbyak::Xmm arg1, Xbyak::Xmm arg2, Lambda lambda, bool fpcr_controlled) { - const auto fn = static_cast*>(lambda); + const auto fn = static_cast*>(lambda); const u32 fpcr = ctx.FPCR(fpcr_controlled).Value(); @@ -502,7 +503,7 @@ void EmitThreeOpFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, La template void EmitFourOpFallbackWithoutRegAlloc(BlockOfCode& code, EmitContext& ctx, Xbyak::Xmm result, Xbyak::Xmm arg1, Xbyak::Xmm arg2, Xbyak::Xmm arg3, Lambda lambda, bool fpcr_controlled) { - const auto fn = static_cast*>(lambda); + const auto fn = static_cast*>(lambda); #ifdef _WIN32 constexpr u32 stack_space = 5 * 16; @@ -559,9 +560,9 @@ void EmitFourOpFallback(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Lam template void FPVectorAbs(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; constexpr FPT non_sign_mask = FP::FPInfo::sign_mask - FPT(1u); - constexpr u64 non_sign_mask64 = Common::Replicate(non_sign_mask, fsize); + constexpr u64 non_sign_mask64 = mcl::bit::replicate_element(non_sign_mask); auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -1065,7 +1066,7 @@ void EmitX64::EmitFPVectorMul64(EmitContext& ctx, IR::Inst* inst) { template void EmitFPVectorMulAdd(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; const auto fallback_fn = [](VectorArray& result, const VectorArray& addend, const VectorArray& op1, const VectorArray& op2, FP::FPCR fpcr, FP::FPSR& fpsr) { for (size_t i = 0; i < result.size(); i++) { @@ -1160,7 +1161,7 @@ void EmitX64::EmitFPVectorMulAdd64(EmitContext& ctx, IR::Inst* inst) { template static void EmitFPVectorMulX(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; auto args = ctx.reg_alloc.GetArgumentInfo(inst); const bool fpcr_controlled = args[2].GetImmediateU1(); @@ -1226,9 +1227,9 @@ void EmitX64::EmitFPVectorMulX64(EmitContext& ctx, IR::Inst* inst) { template void FPVectorNeg(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; constexpr FPT sign_mask = FP::FPInfo::sign_mask; - constexpr u64 sign_mask64 = Common::Replicate(sign_mask, fsize); + constexpr u64 sign_mask64 = mcl::bit::replicate_element(sign_mask); auto args = ctx.reg_alloc.GetArgumentInfo(inst); @@ -1280,7 +1281,7 @@ void EmitX64::EmitFPVectorPairedAddLower64(EmitContext& ctx, IR::Inst* inst) { template static void EmitRecipEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; if constexpr (fsize != 16) { if (ctx.HasOptimization(OptimizationFlag::Unsafe_ReducedErrorFP)) { @@ -1326,7 +1327,7 @@ void EmitX64::EmitFPVectorRecipEstimate64(EmitContext& ctx, IR::Inst* inst) { template static void EmitRecipStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; const auto fallback_fn = [](VectorArray& result, const VectorArray& op1, const VectorArray& op2, FP::FPCR fpcr, FP::FPSR& fpsr) { for (size_t i = 0; i < result.size(); i++) { @@ -1420,7 +1421,7 @@ void EmitX64::EmitFPVectorRecipStepFused64(EmitContext& ctx, IR::Inst* inst) { template void EmitFPVectorRoundInt(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; const auto rounding = static_cast(inst->GetArg(1).GetU8()); const bool exact = inst->GetArg(2).GetU1(); @@ -1492,7 +1493,7 @@ void EmitX64::EmitFPVectorRoundInt64(EmitContext& ctx, IR::Inst* inst) { template static void EmitRSqrtEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; const auto fallback_fn = [](VectorArray& result, const VectorArray& operand, FP::FPCR fpcr, FP::FPSR& fpsr) { for (size_t i = 0; i < result.size(); i++) { @@ -1540,7 +1541,7 @@ void EmitX64::EmitFPVectorRSqrtEstimate64(EmitContext& ctx, IR::Inst* inst) { template static void EmitRSqrtStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; const auto fallback_fn = [](VectorArray& result, const VectorArray& op1, const VectorArray& op2, FP::FPCR fpcr, FP::FPSR& fpsr) { for (size_t i = 0; i < result.size(); i++) { @@ -1709,7 +1710,7 @@ void EmitX64::EmitFPVectorToHalf32(EmitContext& ctx, IR::Inst* inst) { template void EmitFPVectorToFixed(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) { - using FPT = mp::unsigned_integer_of_size; + using FPT = mcl::unsigned_integer_of_size; const size_t fbits = inst->GetArg(1).GetU8(); const auto rounding = static_cast(inst->GetArg(2).GetU8()); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp index 628b667e6..8ebf16107 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/emit_x64_vector_saturation.cpp @@ -3,10 +3,11 @@ * SPDX-License-Identifier: 0BSD */ +#include + #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/constants.h" #include "dynarmic/backend/x64/emit_x64.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/ir/microinstruction.h" #include "dynarmic/ir/opcodes.h" diff --git a/externals/dynarmic/src/dynarmic/backend/x64/exception_handler.h b/externals/dynarmic/src/dynarmic/backend/x64/exception_handler.h index 0e361cedf..0e094eba2 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/exception_handler.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/exception_handler.h @@ -8,7 +8,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_macos.cpp b/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_macos.cpp index 53bc8abc6..fbec78b1e 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_macos.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_macos.cpp @@ -14,12 +14,12 @@ #include #include +#include +#include +#include #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/exception_handler.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/cast_util.h" -#include "dynarmic/common/common_types.h" #define mig_external extern "C" #include "dynarmic/backend/x64/mig/mach_exc_server.h" @@ -120,7 +120,7 @@ kern_return_t MachHandler::HandleRequest(x86_thread_state64_t* ts) { FakeCall fc = iter->cb(ts->__rip); ts->__rsp -= sizeof(u64); - *Common::BitCast(ts->__rsp) = fc.ret_rip; + *mcl::bit_cast(ts->__rsp) = fc.ret_rip; ts->__rip = fc.call_rip; return KERN_SUCCESS; @@ -189,7 +189,7 @@ mig_external kern_return_t catch_mach_exception_raise_state( struct ExceptionHandler::Impl final { Impl(BlockOfCode& code) - : code_begin(Common::BitCast(code.getCode())) + : code_begin(mcl::bit_cast(code.getCode())) , code_end(code_begin + code.GetTotalCodeSize()) {} void SetCallback(std::function cb) { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_posix.cpp b/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_posix.cpp index bdaac0c3e..3a997d958 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_posix.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_posix.cpp @@ -19,10 +19,11 @@ #include #include +#include +#include +#include + #include "dynarmic/backend/x64/block_of_code.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/cast_util.h" -#include "dynarmic/common/common_types.h" namespace Dynarmic::Backend::X64 { @@ -142,7 +143,7 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) { FakeCall fc = iter->cb(CTX_RIP); CTX_RSP -= sizeof(u64); - *Common::BitCast(CTX_RSP) = fc.ret_rip; + *mcl::bit_cast(CTX_RSP) = fc.ret_rip; CTX_RIP = fc.call_rip; return; @@ -170,7 +171,7 @@ void SigHandler::SigAction(int sig, siginfo_t* info, void* raw_context) { struct ExceptionHandler::Impl final { Impl(BlockOfCode& code) - : code_begin(Common::BitCast(code.getCode())) + : code_begin(mcl::bit_cast(code.getCode())) , code_end(code_begin + code.GetTotalCodeSize()) {} void SetCallback(std::function cb) { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp b/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp index cb746eb27..82479b9cf 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/exception_handler_windows.cpp @@ -9,11 +9,12 @@ #include #include +#include +#include +#include + #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/exception_handler.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/cast_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/safe_ops.h" using UBYTE = u8; @@ -178,20 +179,20 @@ struct ExceptionHandler::Impl final { // Our 3rd argument is a PCONTEXT. // If not within our codeblock, ignore this exception. - code.mov(code.rax, Safe::Negate(Common::BitCast(code.getCode()))); + code.mov(code.rax, Safe::Negate(mcl::bit_cast(code.getCode()))); code.add(code.rax, code.qword[code.ABI_PARAM3 + Xbyak::RegExp(offsetof(CONTEXT, Rip))]); code.cmp(code.rax, static_cast(code.GetTotalCodeSize())); code.ja(exception_handler_without_cb); code.sub(code.rsp, 8); - code.mov(code.ABI_PARAM1, Common::BitCast(&cb)); + code.mov(code.ABI_PARAM1, mcl::bit_cast(&cb)); code.mov(code.ABI_PARAM2, code.ABI_PARAM3); code.CallLambda( [](const std::function& cb_, PCONTEXT ctx) { FakeCall fc = cb_(ctx->Rip); ctx->Rsp -= sizeof(u64); - *Common::BitCast(ctx->Rsp) = fc.ret_rip; + *mcl::bit_cast(ctx->Rsp) = fc.ret_rip; ctx->Rip = fc.call_rip; }); code.add(code.rsp, 8); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/exclusive_monitor.cpp b/externals/dynarmic/src/dynarmic/backend/x64/exclusive_monitor.cpp index 6a323b9f9..68ce912c2 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/exclusive_monitor.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/exclusive_monitor.cpp @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/assert.h" +#include namespace Dynarmic { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/host_feature.h b/externals/dynarmic/src/dynarmic/backend/x64/host_feature.h index baf96a666..8e3b14c7b 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/host_feature.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/host_feature.h @@ -5,7 +5,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/hostloc.h b/externals/dynarmic/src/dynarmic/backend/x64/hostloc.h index b6be1146b..dbf526b77 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/hostloc.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/hostloc.h @@ -4,11 +4,10 @@ */ #pragma once +#include +#include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" - namespace Dynarmic::Backend::X64 { enum class HostLoc { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/nzcv_util.h b/externals/dynarmic/src/dynarmic/backend/x64/nzcv_util.h index 389723a84..3a70cf4f0 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/nzcv_util.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/nzcv_util.h @@ -5,8 +5,7 @@ #pragma once -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Backend::X64::NZCV { @@ -29,10 +28,10 @@ constexpr u32 from_x64_multiplier = 0x1021'0000; inline u32 ToX64(u32 nzcv) { /* Naive implementation: u32 x64_flags = 0; - x64_flags |= Common::Bit<31>(cpsr) ? 1 << 15 : 0; - x64_flags |= Common::Bit<30>(cpsr) ? 1 << 14 : 0; - x64_flags |= Common::Bit<29>(cpsr) ? 1 << 8 : 0; - x64_flags |= Common::Bit<28>(cpsr) ? 1 : 0; + x64_flags |= mcl::bit::get_bit<31>(cpsr) ? 1 << 15 : 0; + x64_flags |= mcl::bit::get_bit<30>(cpsr) ? 1 << 14 : 0; + x64_flags |= mcl::bit::get_bit<29>(cpsr) ? 1 << 8 : 0; + x64_flags |= mcl::bit::get_bit<28>(cpsr) ? 1 : 0; return x64_flags; */ return ((nzcv >> 28) * to_x64_multiplier) & x64_mask; @@ -41,10 +40,10 @@ inline u32 ToX64(u32 nzcv) { inline u32 FromX64(u32 x64_flags) { /* Naive implementation: u32 nzcv = 0; - nzcv |= Common::Bit<15>(x64_flags) ? 1 << 31 : 0; - nzcv |= Common::Bit<14>(x64_flags) ? 1 << 30 : 0; - nzcv |= Common::Bit<8>(x64_flags) ? 1 << 29 : 0; - nzcv |= Common::Bit<0>(x64_flags) ? 1 << 28 : 0; + nzcv |= mcl::bit::get_bit<15>(x64_flags) ? 1 << 31 : 0; + nzcv |= mcl::bit::get_bit<14>(x64_flags) ? 1 << 30 : 0; + nzcv |= mcl::bit::get_bit<8>(x64_flags) ? 1 << 29 : 0; + nzcv |= mcl::bit::get_bit<0>(x64_flags) ? 1 << 28 : 0; return nzcv; */ return ((x64_flags & x64_mask) * from_x64_multiplier) & arm_mask; diff --git a/externals/dynarmic/src/dynarmic/backend/x64/oparg.h b/externals/dynarmic/src/dynarmic/backend/x64/oparg.h index d35297b94..70c60dfb1 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/oparg.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/oparg.h @@ -5,10 +5,9 @@ #pragma once +#include #include -#include "dynarmic/common/assert.h" - namespace Dynarmic::Backend::X64 { struct OpArg { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/perf_map.cpp b/externals/dynarmic/src/dynarmic/backend/x64/perf_map.cpp index 4a74081f5..88691dbff 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/perf_map.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/perf_map.cpp @@ -15,11 +15,10 @@ # include # include +# include # include # include -# include "dynarmic/common/common_types.h" - namespace Dynarmic::Backend::X64 { namespace { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/perf_map.h b/externals/dynarmic/src/dynarmic/backend/x64/perf_map.h index 02cd0b85d..7d739ae63 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/perf_map.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/perf_map.h @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/cast_util.h" +#include namespace Dynarmic::Backend::X64 { @@ -17,7 +17,7 @@ void PerfMapRegister(const void* start, const void* end, std::string_view friend template void PerfMapRegister(T start, const void* end, std::string_view friendly_name) { - detail::PerfMapRegister(Common::BitCast(start), end, friendly_name); + detail::PerfMapRegister(mcl::bit_cast(start), end, friendly_name); } void PerfMapClear(); diff --git a/externals/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp b/externals/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp index 7ff8c7807..0de490d43 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp +++ b/externals/dynarmic/src/dynarmic/backend/x64/reg_alloc.cpp @@ -10,11 +10,11 @@ #include #include +#include #include #include "dynarmic/backend/x64/abi.h" #include "dynarmic/backend/x64/stack_layout.h" -#include "dynarmic/common/assert.h" namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/backend/x64/reg_alloc.h b/externals/dynarmic/src/dynarmic/backend/x64/reg_alloc.h index 5002932c5..49eba4a3d 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/reg_alloc.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/reg_alloc.h @@ -11,12 +11,12 @@ #include #include +#include #include #include "dynarmic/backend/x64/block_of_code.h" #include "dynarmic/backend/x64/hostloc.h" #include "dynarmic/backend/x64/oparg.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/ir/cond.h" #include "dynarmic/ir/microinstruction.h" #include "dynarmic/ir/value.h" diff --git a/externals/dynarmic/src/dynarmic/backend/x64/stack_layout.h b/externals/dynarmic/src/dynarmic/backend/x64/stack_layout.h index 4b9db8112..6cb1e164d 100755 --- a/externals/dynarmic/src/dynarmic/backend/x64/stack_layout.h +++ b/externals/dynarmic/src/dynarmic/backend/x64/stack_layout.h @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Backend::X64 { diff --git a/externals/dynarmic/src/dynarmic/common/atomic.h b/externals/dynarmic/src/dynarmic/common/atomic.h index d9f00db40..8be5fc446 100755 --- a/externals/dynarmic/src/dynarmic/common/atomic.h +++ b/externals/dynarmic/src/dynarmic/common/atomic.h @@ -5,7 +5,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Atomic { diff --git a/externals/dynarmic/src/dynarmic/common/cast_util.h b/externals/dynarmic/src/dynarmic/common/cast_util.h index 1098b51c8..92c9a259b 100755 --- a/externals/dynarmic/src/dynarmic/common/cast_util.h +++ b/externals/dynarmic/src/dynarmic/common/cast_util.h @@ -5,41 +5,14 @@ #pragma once -#include -#include - -#include +#include namespace Dynarmic::Common { -/// Reinterpret objects of one type as another by bit-casting between object representations. -template -inline Dest BitCast(const Source& source) noexcept { - static_assert(sizeof(Dest) == sizeof(Source), "size of destination and source objects must be equal"); - static_assert(std::is_trivially_copyable_v, "destination type must be trivially copyable."); - static_assert(std::is_trivially_copyable_v, "source type must be trivially copyable"); - - std::aligned_storage_t dest; - std::memcpy(&dest, &source, sizeof(dest)); - return reinterpret_cast(dest); -} - -/// Reinterpret objects of any arbitrary type as another type by bit-casting between object representations. -/// Note that here we do not verify if source has enough bytes to read from. -template -inline Dest BitCastPointee(const SourcePtr source) noexcept { - static_assert(sizeof(SourcePtr) == sizeof(void*), "source pointer must have size of a pointer"); - static_assert(std::is_trivially_copyable_v, "destination type must be trivially copyable."); - - std::aligned_storage_t dest; - std::memcpy(&dest, BitCast(source), sizeof(dest)); - return reinterpret_cast(dest); -} - /// Cast a lambda into an equivalent function pointer. template inline auto FptrCast(Function f) noexcept { - return static_cast*>(f); + return static_cast*>(f); } } // namespace Dynarmic::Common diff --git a/externals/dynarmic/src/dynarmic/common/crypto/aes.cpp b/externals/dynarmic/src/dynarmic/common/crypto/aes.cpp index 3f67dbac9..c431758e5 100755 --- a/externals/dynarmic/src/dynarmic/common/crypto/aes.cpp +++ b/externals/dynarmic/src/dynarmic/common/crypto/aes.cpp @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common::Crypto::AES { diff --git a/externals/dynarmic/src/dynarmic/common/crypto/aes.h b/externals/dynarmic/src/dynarmic/common/crypto/aes.h index 8e1e76fef..fa6d5a81b 100755 --- a/externals/dynarmic/src/dynarmic/common/crypto/aes.h +++ b/externals/dynarmic/src/dynarmic/common/crypto/aes.h @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common::Crypto::AES { diff --git a/externals/dynarmic/src/dynarmic/common/crypto/crc32.cpp b/externals/dynarmic/src/dynarmic/common/crypto/crc32.cpp index 6b33a88c7..c00385078 100755 --- a/externals/dynarmic/src/dynarmic/common/crypto/crc32.cpp +++ b/externals/dynarmic/src/dynarmic/common/crypto/crc32.cpp @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common::Crypto::CRC32 { diff --git a/externals/dynarmic/src/dynarmic/common/crypto/crc32.h b/externals/dynarmic/src/dynarmic/common/crypto/crc32.h index 11f9233eb..30942327d 100755 --- a/externals/dynarmic/src/dynarmic/common/crypto/crc32.h +++ b/externals/dynarmic/src/dynarmic/common/crypto/crc32.h @@ -5,7 +5,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common::Crypto::CRC32 { diff --git a/externals/dynarmic/src/dynarmic/common/crypto/sm4.cpp b/externals/dynarmic/src/dynarmic/common/crypto/sm4.cpp index c101634a8..5743e5be9 100755 --- a/externals/dynarmic/src/dynarmic/common/crypto/sm4.cpp +++ b/externals/dynarmic/src/dynarmic/common/crypto/sm4.cpp @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common::Crypto::SM4 { diff --git a/externals/dynarmic/src/dynarmic/common/crypto/sm4.h b/externals/dynarmic/src/dynarmic/common/crypto/sm4.h index 2444ed28f..417e9b926 100755 --- a/externals/dynarmic/src/dynarmic/common/crypto/sm4.h +++ b/externals/dynarmic/src/dynarmic/common/crypto/sm4.h @@ -5,7 +5,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common::Crypto::SM4 { diff --git a/externals/dynarmic/src/dynarmic/common/fp/fpcr.h b/externals/dynarmic/src/dynarmic/common/fp/fpcr.h index 8a1b0d73b..287f6d288 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/fpcr.h +++ b/externals/dynarmic/src/dynarmic/common/fp/fpcr.h @@ -7,9 +7,10 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include + #include "dynarmic/common/fp/rounding_mode.h" namespace Dynarmic::FP { @@ -34,49 +35,49 @@ public: /// Get alternate half-precision control flag. bool AHP() const { - return Common::Bit<26>(value); + return mcl::bit::get_bit<26>(value); } /// Set alternate half-precision control flag. void AHP(bool ahp) { - value = Common::ModifyBit<26>(value, ahp); + value = mcl::bit::set_bit<26>(value, ahp); } /// Get default NaN mode control bit. bool DN() const { - return Common::Bit<25>(value); + return mcl::bit::get_bit<25>(value); } /// Set default NaN mode control bit. void DN(bool dn) { - value = Common::ModifyBit<25>(value, dn); + value = mcl::bit::set_bit<25>(value, dn); } /// Get flush-to-zero mode control bit. bool FZ() const { - return Common::Bit<24>(value); + return mcl::bit::get_bit<24>(value); } /// Set flush-to-zero mode control bit. void FZ(bool fz) { - value = Common::ModifyBit<24>(value, fz); + value = mcl::bit::set_bit<24>(value, fz); } /// Get rounding mode control field. FP::RoundingMode RMode() const { - return static_cast(Common::Bits<22, 23>(value)); + return static_cast(mcl::bit::get_bits<22, 23>(value)); } /// Set rounding mode control field. void RMode(FP::RoundingMode rounding_mode) { ASSERT_MSG(static_cast(rounding_mode) <= 0b11, "FPCR: Invalid rounding mode"); - value = Common::ModifyBits<22, 23>(value, static_cast(rounding_mode)); + value = mcl::bit::set_bits<22, 23>(value, static_cast(rounding_mode)); } /// Get the stride of a vector when executing AArch32 VFP instructions. /// This field has no function in AArch64 state. std::optional Stride() const { - switch (Common::Bits<20, 21>(value)) { + switch (mcl::bit::get_bits<20, 21>(value)) { case 0b00: return 1; case 0b11: @@ -90,90 +91,90 @@ public: /// This field has no function in AArch64 state. void Stride(size_t stride) { ASSERT_MSG(stride >= 1 && stride <= 2, "FPCR: Invalid stride"); - value = Common::ModifyBits<20, 21>(value, stride == 1 ? 0b00u : 0b11u); + value = mcl::bit::set_bits<20, 21>(value, stride == 1 ? 0b00u : 0b11u); } /// Get flush-to-zero (half-precision specific) mode control bit. bool FZ16() const { - return Common::Bit<19>(value); + return mcl::bit::get_bit<19>(value); } /// Set flush-to-zero (half-precision specific) mode control bit. void FZ16(bool fz16) { - value = Common::ModifyBit<19>(value, fz16); + value = mcl::bit::set_bit<19>(value, fz16); } /// Gets the length of a vector when executing AArch32 VFP instructions. /// This field has no function in AArch64 state. size_t Len() const { - return Common::Bits<16, 18>(value) + 1; + return mcl::bit::get_bits<16, 18>(value) + 1; } /// Sets the length of a vector when executing AArch32 VFP instructions. /// This field has no function in AArch64 state. void Len(size_t len) { ASSERT_MSG(len >= 1 && len <= 8, "FPCR: Invalid len"); - value = Common::ModifyBits<16, 18>(value, static_cast(len - 1)); + value = mcl::bit::set_bits<16, 18>(value, static_cast(len - 1)); } /// Get input denormal exception trap enable flag. bool IDE() const { - return Common::Bit<15>(value); + return mcl::bit::get_bit<15>(value); } /// Set input denormal exception trap enable flag. void IDE(bool ide) { - value = Common::ModifyBit<15>(value, ide); + value = mcl::bit::set_bit<15>(value, ide); } /// Get inexact exception trap enable flag. bool IXE() const { - return Common::Bit<12>(value); + return mcl::bit::get_bit<12>(value); } /// Set inexact exception trap enable flag. void IXE(bool ixe) { - value = Common::ModifyBit<12>(value, ixe); + value = mcl::bit::set_bit<12>(value, ixe); } /// Get underflow exception trap enable flag. bool UFE() const { - return Common::Bit<11>(value); + return mcl::bit::get_bit<11>(value); } /// Set underflow exception trap enable flag. void UFE(bool ufe) { - value = Common::ModifyBit<11>(value, ufe); + value = mcl::bit::set_bit<11>(value, ufe); } /// Get overflow exception trap enable flag. bool OFE() const { - return Common::Bit<10>(value); + return mcl::bit::get_bit<10>(value); } /// Set overflow exception trap enable flag. void OFE(bool ofe) { - value = Common::ModifyBit<10>(value, ofe); + value = mcl::bit::set_bit<10>(value, ofe); } /// Get division by zero exception trap enable flag. bool DZE() const { - return Common::Bit<9>(value); + return mcl::bit::get_bit<9>(value); } /// Set division by zero exception trap enable flag. void DZE(bool dze) { - value = Common::ModifyBit<9>(value, dze); + value = mcl::bit::set_bit<9>(value, dze); } /// Get invalid operation exception trap enable flag. bool IOE() const { - return Common::Bit<8>(value); + return mcl::bit::get_bit<8>(value); } /// Set invalid operation exception trap enable flag. void IOE(bool ioe) { - value = Common::ModifyBit<8>(value, ioe); + value = mcl::bit::set_bit<8>(value, ioe); } /// Gets the underlying raw value within the FPCR. diff --git a/externals/dynarmic/src/dynarmic/common/fp/fpsr.h b/externals/dynarmic/src/dynarmic/common/fp/fpsr.h index 1accf872c..fba58ebbb 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/fpsr.h +++ b/externals/dynarmic/src/dynarmic/common/fp/fpsr.h @@ -5,8 +5,8 @@ #pragma once -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include namespace Dynarmic::FP { @@ -30,112 +30,112 @@ public: /// Get negative condition flag bool N() const { - return Common::Bit<31>(value); + return mcl::bit::get_bit<31>(value); } /// Set negative condition flag void N(bool N_) { - value = Common::ModifyBit<31>(value, N_); + value = mcl::bit::set_bit<31>(value, N_); } /// Get zero condition flag bool Z() const { - return Common::Bit<30>(value); + return mcl::bit::get_bit<30>(value); } /// Set zero condition flag void Z(bool Z_) { - value = Common::ModifyBit<30>(value, Z_); + value = mcl::bit::set_bit<30>(value, Z_); } /// Get carry condition flag bool C() const { - return Common::Bit<29>(value); + return mcl::bit::get_bit<29>(value); } /// Set carry condition flag void C(bool C_) { - value = Common::ModifyBit<29>(value, C_); + value = mcl::bit::set_bit<29>(value, C_); } /// Get overflow condition flag bool V() const { - return Common::Bit<28>(value); + return mcl::bit::get_bit<28>(value); } /// Set overflow condition flag void V(bool V_) { - value = Common::ModifyBit<28>(value, V_); + value = mcl::bit::set_bit<28>(value, V_); } /// Get cumulative saturation bit bool QC() const { - return Common::Bit<27>(value); + return mcl::bit::get_bit<27>(value); } /// Set cumulative saturation bit void QC(bool QC_) { - value = Common::ModifyBit<27>(value, QC_); + value = mcl::bit::set_bit<27>(value, QC_); } /// Get input denormal floating-point exception bit bool IDC() const { - return Common::Bit<7>(value); + return mcl::bit::get_bit<7>(value); } /// Set input denormal floating-point exception bit void IDC(bool IDC_) { - value = Common::ModifyBit<7>(value, IDC_); + value = mcl::bit::set_bit<7>(value, IDC_); } /// Get inexact cumulative floating-point exception bit bool IXC() const { - return Common::Bit<4>(value); + return mcl::bit::get_bit<4>(value); } /// Set inexact cumulative floating-point exception bit void IXC(bool IXC_) { - value = Common::ModifyBit<4>(value, IXC_); + value = mcl::bit::set_bit<4>(value, IXC_); } /// Get underflow cumulative floating-point exception bit bool UFC() const { - return Common::Bit<3>(value); + return mcl::bit::get_bit<3>(value); } /// Set underflow cumulative floating-point exception bit void UFC(bool UFC_) { - value = Common::ModifyBit<3>(value, UFC_); + value = mcl::bit::set_bit<3>(value, UFC_); } /// Get overflow cumulative floating-point exception bit bool OFC() const { - return Common::Bit<2>(value); + return mcl::bit::get_bit<2>(value); } /// Set overflow cumulative floating-point exception bit void OFC(bool OFC_) { - value = Common::ModifyBit<2>(value, OFC_); + value = mcl::bit::set_bit<2>(value, OFC_); } /// Get divide by zero cumulative floating-point exception bit bool DZC() const { - return Common::Bit<1>(value); + return mcl::bit::get_bit<1>(value); } /// Set divide by zero cumulative floating-point exception bit void DZC(bool DZC_) { - value = Common::ModifyBit<1>(value, DZC_); + value = mcl::bit::set_bit<1>(value, DZC_); } /// Get invalid operation cumulative floating-point exception bit bool IOC() const { - return Common::Bit<0>(value); + return mcl::bit::get_bit<0>(value); } /// Set invalid operation cumulative floating-point exception bit void IOC(bool IOC_) { - value = Common::ModifyBit<0>(value, IOC_); + value = mcl::bit::set_bit<0>(value, IOC_); } /// Gets the underlying raw value within the FPSR. diff --git a/externals/dynarmic/src/dynarmic/common/fp/fused.cpp b/externals/dynarmic/src/dynarmic/common/fp/fused.cpp index 2f3ccacbe..883de6516 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/fused.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/fused.cpp @@ -5,6 +5,8 @@ #include "dynarmic/common/fp/fused.h" +#include + #include "dynarmic/common/fp/mantissa_util.h" #include "dynarmic/common/fp/unpacked.h" #include "dynarmic/common/u128.h" @@ -81,7 +83,7 @@ FPUnpacked FusedMulAdd(FPUnpacked addend, FPUnpacked op1, FPUnpacked op2) { return FPUnpacked{result_sign, result_exponent, result.lower}; } - const int required_shift = normalized_point_position - Common::HighestSetBit(result.upper); + const int required_shift = normalized_point_position - mcl::bit::highest_set_bit(result.upper); result = result << required_shift; result_exponent -= required_shift; return ReduceMantissa(result_sign, result_exponent, result); diff --git a/externals/dynarmic/src/dynarmic/common/fp/info.h b/externals/dynarmic/src/dynarmic/common/fp/info.h index f5a7b57f6..8cc2d29de 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/info.h +++ b/externals/dynarmic/src/dynarmic/common/fp/info.h @@ -5,8 +5,8 @@ #pragma once -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include namespace Dynarmic::FP { @@ -124,7 +124,7 @@ constexpr FPT FPValue() { } constexpr int point_position = static_cast(FPInfo::explicit_mantissa_width); - constexpr int highest_bit = Common::HighestSetBit(value); + constexpr int highest_bit = mcl::bit::highest_set_bit(value); constexpr int offset = point_position - highest_bit; constexpr int normalized_exponent = exponent - offset + point_position; static_assert(offset >= 0); diff --git a/externals/dynarmic/src/dynarmic/common/fp/mantissa_util.h b/externals/dynarmic/src/dynarmic/common/fp/mantissa_util.h index a2fe7c216..31be52f76 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/mantissa_util.h +++ b/externals/dynarmic/src/dynarmic/common/fp/mantissa_util.h @@ -5,8 +5,9 @@ #pragma once -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include namespace Dynarmic::FP { @@ -22,13 +23,13 @@ inline ResidualError ResidualErrorOnRightShift(u64 mantissa, int shift_amount) { return ResidualError::Zero; } - if (shift_amount > static_cast(Common::BitSize())) { - return Common::MostSignificantBit(mantissa) ? ResidualError::GreaterThanHalf : ResidualError::LessThanHalf; + if (shift_amount > static_cast(mcl::bitsizeof)) { + return mcl::bit::most_significant_bit(mantissa) ? ResidualError::GreaterThanHalf : ResidualError::LessThanHalf; } const size_t half_bit_position = static_cast(shift_amount - 1); const u64 half = static_cast(1) << half_bit_position; - const u64 error_mask = Common::Ones(static_cast(shift_amount)); + const u64 error_mask = mcl::bit::ones(static_cast(shift_amount)); const u64 error = mantissa & error_mask; if (error == 0) { diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPConvert.cpp b/externals/dynarmic/src/dynarmic/common/fp/op/FPConvert.cpp index 8d01e5243..85f1eaf89 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPConvert.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPConvert.cpp @@ -5,7 +5,10 @@ #include "dynarmic/common/fp/op/FPConvert.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/info.h" @@ -16,27 +19,27 @@ namespace Dynarmic::FP { namespace { template FPT_TO FPConvertNaN(FPT_FROM op) { - const bool sign = Common::Bit() - 1>(op); + const bool sign = mcl::bit::get_bit - 1>(op); const u64 frac = [op] { if constexpr (sizeof(FPT_FROM) == sizeof(u64)) { - return Common::Bits<0, 50>(op); + return mcl::bit::get_bits<0, 50>(op); } else if constexpr (sizeof(FPT_FROM) == sizeof(u32)) { - return u64{Common::Bits<0, 21>(op)} << 29; + return u64{mcl::bit::get_bits<0, 21>(op)} << 29; } else { - return u64{Common::Bits<0, 8>(op)} << 42; + return u64{mcl::bit::get_bits<0, 8>(op)} << 42; } }(); - const size_t dest_bit_size = Common::BitSize(); + const size_t dest_bit_size = mcl::bitsizeof; const u64 shifted_sign = u64{sign} << (dest_bit_size - 1); - const u64 exponent = Common::Ones(dest_bit_size - FPInfo::explicit_mantissa_width); + const u64 exponent = mcl::bit::ones(dest_bit_size - FPInfo::explicit_mantissa_width); if constexpr (sizeof(FPT_TO) == sizeof(u64)) { return FPT_TO(shifted_sign | exponent << 51 | frac); } else if constexpr (sizeof(FPT_TO) == sizeof(u32)) { - return FPT_TO(shifted_sign | exponent << 22 | Common::Bits<29, 50>(frac)); + return FPT_TO(shifted_sign | exponent << 22 | mcl::bit::get_bits<29, 50>(frac)); } else { - return FPT_TO(shifted_sign | exponent << 9 | Common::Bits<42, 50>(frac)); + return FPT_TO(shifted_sign | exponent << 9 | mcl::bit::get_bits<42, 50>(frac)); } } } // Anonymous namespace @@ -44,7 +47,7 @@ FPT_TO FPConvertNaN(FPT_FROM op) { template FPT_TO FPConvert(FPT_FROM op, FPCR fpcr, RoundingMode rounding_mode, FPSR& fpsr) { const auto [type, sign, value] = FPUnpackCV(op, fpcr, fpsr); - const bool is_althp = Common::BitSize() == 16 && fpcr.AHP(); + const bool is_althp = mcl::bitsizeof == 16 && fpcr.AHP(); if (type == FPType::SNaN || type == FPType::QNaN) { std::uintmax_t result{}; diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPMulAdd.cpp b/externals/dynarmic/src/dynarmic/common/fp/op/FPMulAdd.cpp index 409b750b7..be699ef86 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPMulAdd.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPMulAdd.cpp @@ -5,7 +5,8 @@ #include "dynarmic/common/fp/op/FPMulAdd.h" -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/fused.h" diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPRSqrtEstimate.cpp b/externals/dynarmic/src/dynarmic/common/fp/op/FPRSqrtEstimate.cpp index 4f547e9df..ed28bcc5c 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPRSqrtEstimate.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPRSqrtEstimate.cpp @@ -5,7 +5,8 @@ #include "dynarmic/common/fp/op/FPRSqrtEstimate.h" -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/info.h" diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPRecipEstimate.cpp b/externals/dynarmic/src/dynarmic/common/fp/op/FPRecipEstimate.cpp index 956c78192..1fd4b924b 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPRecipEstimate.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPRecipEstimate.cpp @@ -7,8 +7,9 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/info.h" diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPRecipExponent.cpp b/externals/dynarmic/src/dynarmic/common/fp/op/FPRecipExponent.cpp index 7bbcb8cc9..171b94e96 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPRecipExponent.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPRecipExponent.cpp @@ -5,8 +5,9 @@ #include "dynarmic/common/fp/op/FPRecipExponent.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/info.h" @@ -18,11 +19,11 @@ namespace { template FPT DetermineExponentValue(size_t value) { if constexpr (sizeof(FPT) == sizeof(u32)) { - return static_cast(Common::Bits<23, 30>(value)); + return static_cast(mcl::bit::get_bits<23, 30>(value)); } else if constexpr (sizeof(FPT) == sizeof(u64)) { - return static_cast(Common::Bits<52, 62>(value)); + return static_cast(mcl::bit::get_bits<52, 62>(value)); } else { - return static_cast(Common::Bits<10, 14>(value)); + return static_cast(mcl::bit::get_bits<10, 14>(value)); } } } // Anonymous namespace @@ -41,7 +42,7 @@ FPT FPRecipExponent(FPT op, FPCR fpcr, FPSR& fpsr) { // Zero and denormals if (exponent == 0) { - const FPT max_exponent = Common::Ones(FPInfo::exponent_width) - 1; + const FPT max_exponent = mcl::bit::ones(FPInfo::exponent_width) - 1; return FPT(sign_bits | (max_exponent << FPInfo::explicit_mantissa_width)); } diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.cpp b/externals/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.cpp index 6721228bf..732590907 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.cpp @@ -5,9 +5,10 @@ #include "dynarmic/common/fp/op/FPRoundInt.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/info.h" @@ -53,7 +54,7 @@ u64 FPRoundInt(FPT op, FPCR fpcr, RoundingMode rounding, bool exact, FPSR& fpsr) bool round_up = false; switch (rounding) { case RoundingMode::ToNearest_TieEven: - round_up = error > ResidualError::Half || (error == ResidualError::Half && Common::Bit<0>(int_result)); + round_up = error > ResidualError::Half || (error == ResidualError::Half && mcl::bit::get_bit<0>(int_result)); break; case RoundingMode::TowardsPlusInfinity: round_up = error != ResidualError::Zero; @@ -62,10 +63,10 @@ u64 FPRoundInt(FPT op, FPCR fpcr, RoundingMode rounding, bool exact, FPSR& fpsr) round_up = false; break; case RoundingMode::TowardsZero: - round_up = error != ResidualError::Zero && Common::MostSignificantBit(int_result); + round_up = error != ResidualError::Zero && mcl::bit::most_significant_bit(int_result); break; case RoundingMode::ToNearest_TieAwayFromZero: - round_up = error > ResidualError::Half || (error == ResidualError::Half && !Common::MostSignificantBit(int_result)); + round_up = error > ResidualError::Half || (error == ResidualError::Half && !mcl::bit::most_significant_bit(int_result)); break; case RoundingMode::ToOdd: UNREACHABLE(); @@ -75,7 +76,7 @@ u64 FPRoundInt(FPT op, FPCR fpcr, RoundingMode rounding, bool exact, FPSR& fpsr) int_result++; } - const bool new_sign = Common::MostSignificantBit(int_result); + const bool new_sign = mcl::bit::most_significant_bit(int_result); const u64 abs_int_result = new_sign ? Safe::Negate(int_result) : static_cast(int_result); const FPT result = int_result == 0 diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.h b/externals/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.h index e8d0609a3..e326627ce 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.h +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPRoundInt.h @@ -5,7 +5,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::FP { diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPToFixed.cpp b/externals/dynarmic/src/dynarmic/common/fp/op/FPToFixed.cpp index 011ec4e88..adb90180c 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPToFixed.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPToFixed.cpp @@ -5,9 +5,11 @@ #include "dynarmic/common/fp/op/FPToFixed.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/mantissa_util.h" @@ -50,7 +52,7 @@ u64 FPToFixed(size_t ibits, FPT op, size_t fbits, bool unsigned_, FPCR fpcr, Rou bool round_up = false; switch (rounding) { case RoundingMode::ToNearest_TieEven: - round_up = error > ResidualError::Half || (error == ResidualError::Half && Common::Bit<0>(int_result)); + round_up = error > ResidualError::Half || (error == ResidualError::Half && mcl::bit::get_bit<0>(int_result)); break; case RoundingMode::TowardsPlusInfinity: round_up = error != ResidualError::Zero; @@ -59,10 +61,10 @@ u64 FPToFixed(size_t ibits, FPT op, size_t fbits, bool unsigned_, FPCR fpcr, Rou round_up = false; break; case RoundingMode::TowardsZero: - round_up = error != ResidualError::Zero && Common::MostSignificantBit(int_result); + round_up = error != ResidualError::Zero && mcl::bit::most_significant_bit(int_result); break; case RoundingMode::ToNearest_TieAwayFromZero: - round_up = error > ResidualError::Half || (error == ResidualError::Half && !Common::MostSignificantBit(int_result)); + round_up = error > ResidualError::Half || (error == ResidualError::Half && !mcl::bit::most_significant_bit(int_result)); break; case RoundingMode::ToOdd: UNREACHABLE(); @@ -73,12 +75,12 @@ u64 FPToFixed(size_t ibits, FPT op, size_t fbits, bool unsigned_, FPCR fpcr, Rou } // Detect Overflow - const int min_exponent_for_overflow = static_cast(ibits) - static_cast(Common::HighestSetBit(value.mantissa + (round_up ? 1 : 0))) - (unsigned_ ? 0 : 1); + const int min_exponent_for_overflow = static_cast(ibits) - static_cast(mcl::bit::highest_set_bit(value.mantissa + (round_up ? 1 : 0))) - (unsigned_ ? 0 : 1); if (exponent >= min_exponent_for_overflow) { // Positive overflow if (unsigned_ || !sign) { FPProcessException(FPExc::InvalidOp, fpcr, fpsr); - return Common::Ones(ibits - (unsigned_ ? 0 : 1)); + return mcl::bit::ones(ibits - (unsigned_ ? 0 : 1)); } // Negative overflow @@ -92,7 +94,7 @@ u64 FPToFixed(size_t ibits, FPT op, size_t fbits, bool unsigned_, FPCR fpcr, Rou if (error != ResidualError::Zero) { FPProcessException(FPExc::Inexact, fpcr, fpsr); } - return int_result & Common::Ones(ibits); + return int_result & mcl::bit::ones(ibits); } template u64 FPToFixed(size_t ibits, u16 op, size_t fbits, bool unsigned_, FPCR fpcr, RoundingMode rounding, FPSR& fpsr); diff --git a/externals/dynarmic/src/dynarmic/common/fp/op/FPToFixed.h b/externals/dynarmic/src/dynarmic/common/fp/op/FPToFixed.h index e87565a40..53a952836 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/op/FPToFixed.h +++ b/externals/dynarmic/src/dynarmic/common/fp/op/FPToFixed.h @@ -5,7 +5,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::FP { diff --git a/externals/dynarmic/src/dynarmic/common/fp/process_exception.cpp b/externals/dynarmic/src/dynarmic/common/fp/process_exception.cpp index a934118f0..a97e0ec82 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/process_exception.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/process_exception.cpp @@ -5,7 +5,8 @@ #include "dynarmic/common/fp/process_exception.h" -#include "dynarmic/common/assert.h" +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" diff --git a/externals/dynarmic/src/dynarmic/common/fp/process_nan.cpp b/externals/dynarmic/src/dynarmic/common/fp/process_nan.cpp index 0e2891dc2..516b92adb 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/process_nan.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/process_nan.cpp @@ -7,8 +7,9 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/info.h" @@ -26,7 +27,7 @@ FPT FPProcessNaN(FPType type, FPT op, FPCR fpcr, FPSR& fpsr) { FPT result = op; if (type == FPType::SNaN) { - result = Common::ModifyBit(op, true); + result = mcl::bit::set_bit(op, true); FPProcessException(FPExc::InvalidOp, fpcr, fpsr); } diff --git a/externals/dynarmic/src/dynarmic/common/fp/unpacked.cpp b/externals/dynarmic/src/dynarmic/common/fp/unpacked.cpp index 7b4c1a68a..f853ab07e 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/unpacked.cpp +++ b/externals/dynarmic/src/dynarmic/common/fp/unpacked.cpp @@ -7,6 +7,9 @@ #include +#include +#include + #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/info.h" #include "dynarmic/common/fp/mantissa_util.h" @@ -26,9 +29,9 @@ std::tuple FPUnpackBase(FPT op, FPCR fpcr, [[maybe_unu constexpr int denormal_exponent = FPInfo::exponent_min - int(FPInfo::explicit_mantissa_width); constexpr bool is_half_precision = std::is_same_v; - const bool sign = Common::Bit(op); - const FPT exp_raw = Common::Bits(op); - const FPT frac_raw = Common::Bits(op); + const bool sign = mcl::bit::get_bit(op); + const FPT exp_raw = mcl::bit::get_bits(op); + const FPT frac_raw = mcl::bit::get_bits(op); if (exp_raw == 0) { if constexpr (is_half_precision) { @@ -48,14 +51,14 @@ std::tuple FPUnpackBase(FPT op, FPCR fpcr, [[maybe_unu } } - const bool exp_all_ones = exp_raw == Common::Ones(FPInfo::exponent_width); + const bool exp_all_ones = exp_raw == mcl::bit::ones(FPInfo::exponent_width); const bool ahp_disabled = is_half_precision && !fpcr.AHP(); if ((exp_all_ones && !is_half_precision) || (exp_all_ones && ahp_disabled)) { if (frac_raw == 0) { return {FPType::Infinity, sign, ToNormalized(sign, 1000000, 1)}; } - const bool is_quiet = Common::Bit(frac_raw); + const bool is_quiet = mcl::bit::get_bit(frac_raw); return {is_quiet ? FPType::QNaN : FPType::SNaN, sign, {sign, 0, 0}}; } @@ -70,7 +73,7 @@ template std::tuple FPUnpackBase(u64 op, FPCR fpc template std::tuple Normalize(FPUnpacked op, int extra_right_shift = 0) { - const int highest_set_bit = Common::HighestSetBit(op.mantissa); + const int highest_set_bit = mcl::bit::highest_set_bit(op.mantissa); const int shift_amount = highest_set_bit - static_cast(F) + extra_right_shift; const u64 mantissa = Safe::LogicalShiftRight(op.mantissa, shift_amount); const ResidualError error = ResidualErrorOnRightShift(op.mantissa, shift_amount); @@ -107,7 +110,7 @@ FPT FPRoundBase(FPUnpacked op, FPCR fpcr, RoundingMode rounding, FPSR& fpsr) { bool round_up = false, overflow_to_inf = false; switch (rounding) { case RoundingMode::ToNearest_TieEven: { - round_up = (error > ResidualError::Half) || (error == ResidualError::Half && Common::Bit<0>(mantissa)); + round_up = (error > ResidualError::Half) || (error == ResidualError::Half && mcl::bit::get_bit<0>(mantissa)); overflow_to_inf = true; break; } @@ -141,7 +144,7 @@ FPT FPRoundBase(FPUnpacked op, FPCR fpcr, RoundingMode rounding, FPSR& fpsr) { } if (error != ResidualError::Zero && rounding == RoundingMode::ToOdd) { - mantissa = Common::ModifyBit<0>(mantissa, true); + mantissa = mcl::bit::set_bit<0>(mantissa, true); } FPT result = 0; diff --git a/externals/dynarmic/src/dynarmic/common/fp/unpacked.h b/externals/dynarmic/src/dynarmic/common/fp/unpacked.h index 5b2528050..77f33d896 100755 --- a/externals/dynarmic/src/dynarmic/common/fp/unpacked.h +++ b/externals/dynarmic/src/dynarmic/common/fp/unpacked.h @@ -7,7 +7,9 @@ #include -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/common/fp/fpcr.h" namespace Dynarmic::FP { @@ -43,7 +45,7 @@ constexpr FPUnpacked ToNormalized(bool sign, int exponent, u64 value) { return {sign, 0, 0}; } - const int highest_bit = Common::HighestSetBit(value); + const int highest_bit = mcl::bit::highest_set_bit(value); const int offset = static_cast(normalized_point_position) - highest_bit; value <<= offset; exponent -= offset - static_cast(normalized_point_position); diff --git a/externals/dynarmic/src/dynarmic/common/llvm_disassemble.cpp b/externals/dynarmic/src/dynarmic/common/llvm_disassemble.cpp index 614dff4fb..72dfafd40 100755 --- a/externals/dynarmic/src/dynarmic/common/llvm_disassemble.cpp +++ b/externals/dynarmic/src/dynarmic/common/llvm_disassemble.cpp @@ -12,9 +12,10 @@ # include #endif -#include "dynarmic/common/assert.h" -#include "dynarmic/common/cast_util.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include + #include "dynarmic/common/llvm_disassemble.h" namespace Dynarmic::Common { @@ -49,7 +50,7 @@ std::string DisassembleX64(const void* begin, const void* end) { LLVMDisasmDispose(llvm_ctx); #else result += fmt::format("(recompile with DYNARMIC_USE_LLVM=ON to disassemble the generated x86_64 code)\n"); - result += fmt::format("start: {:016x}, end: {:016x}\n", BitCast(begin), BitCast(end)); + result += fmt::format("start: {:016x}, end: {:016x}\n", mcl::bit_cast(begin), mcl::bit_cast(end)); #endif return result; diff --git a/externals/dynarmic/src/dynarmic/common/llvm_disassemble.h b/externals/dynarmic/src/dynarmic/common/llvm_disassemble.h index 16dc15f8c..56de791a5 100755 --- a/externals/dynarmic/src/dynarmic/common/llvm_disassemble.h +++ b/externals/dynarmic/src/dynarmic/common/llvm_disassemble.h @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common { diff --git a/externals/dynarmic/src/dynarmic/common/lut_from_list.h b/externals/dynarmic/src/dynarmic/common/lut_from_list.h index 5145a6b3a..ed9e3dc04 100755 --- a/externals/dynarmic/src/dynarmic/common/lut_from_list.h +++ b/externals/dynarmic/src/dynarmic/common/lut_from_list.h @@ -9,26 +9,26 @@ #include #include -#include -#include -#include +#include +#include +#include #ifdef _MSC_VER -# include +# include #endif namespace Dynarmic::Common { template -inline auto GenerateLookupTableFromList(Function f, mp::list) { +inline auto GenerateLookupTableFromList(Function f, mcl::mp::list) { #ifdef _MSC_VER - using PairT = std::invoke_result_t>>; + using PairT = std::invoke_result_t>>; #else using PairT = std::common_type_t...>; #endif - using MapT = mp::apply; + using MapT = mcl::mp::apply; - static_assert(mp::is_instance_of_template_v); + static_assert(mcl::is_instance_of_template_v); const std::initializer_list pair_array{f(Values{})...}; return MapT(pair_array.begin(), pair_array.end()); diff --git a/externals/dynarmic/src/dynarmic/common/math_util.h b/externals/dynarmic/src/dynarmic/common/math_util.h index 9006fb2d5..5c1f784c8 100755 --- a/externals/dynarmic/src/dynarmic/common/math_util.h +++ b/externals/dynarmic/src/dynarmic/common/math_util.h @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common { diff --git a/externals/dynarmic/src/dynarmic/common/safe_ops.h b/externals/dynarmic/src/dynarmic/common/safe_ops.h index 50e20fbf9..aef313476 100755 --- a/externals/dynarmic/src/dynarmic/common/safe_ops.h +++ b/externals/dynarmic/src/dynarmic/common/safe_ops.h @@ -7,8 +7,9 @@ #include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/common/u128.h" namespace Dynarmic::Safe { @@ -26,7 +27,7 @@ template T LogicalShiftLeft(T value, int shift_amount) { static_assert(std::is_integral_v); - if (shift_amount >= static_cast(Common::BitSize())) { + if (shift_amount >= static_cast(mcl::bitsizeof)) { return 0; } @@ -47,7 +48,7 @@ template T LogicalShiftRight(T value, int shift_amount) { static_assert(std::is_integral_v); - if (shift_amount >= static_cast(Common::BitSize())) { + if (shift_amount >= static_cast(mcl::bitsizeof)) { return 0; } @@ -66,14 +67,14 @@ inline u128 LogicalShiftRight(u128 value, int shift_amount) { template T LogicalShiftRightDouble(T top, T bottom, int shift_amount) { - return LogicalShiftLeft(top, int(Common::BitSize()) - shift_amount) | LogicalShiftRight(bottom, shift_amount); + return LogicalShiftLeft(top, int(mcl::bitsizeof) - shift_amount) | LogicalShiftRight(bottom, shift_amount); } template T ArithmeticShiftLeft(T value, int shift_amount) { static_assert(std::is_integral_v); - if (shift_amount >= static_cast(Common::BitSize())) { + if (shift_amount >= static_cast(mcl::bitsizeof)) { return 0; } @@ -89,8 +90,8 @@ template T ArithmeticShiftRight(T value, int shift_amount) { static_assert(std::is_integral_v); - if (shift_amount >= static_cast(Common::BitSize())) { - return Common::MostSignificantBit(value) ? ~static_cast(0) : 0; + if (shift_amount >= static_cast(mcl::bitsizeof)) { + return mcl::bit::most_significant_bit(value) ? ~static_cast(0) : 0; } if (shift_amount < 0) { @@ -103,7 +104,7 @@ T ArithmeticShiftRight(T value, int shift_amount) { template T ArithmeticShiftRightDouble(T top, T bottom, int shift_amount) { - return ArithmeticShiftLeft(top, int(Common::BitSize()) - shift_amount) | LogicalShiftRight(bottom, shift_amount); + return ArithmeticShiftLeft(top, int(mcl::bitsizeof) - shift_amount) | LogicalShiftRight(bottom, shift_amount); } template diff --git a/externals/dynarmic/src/dynarmic/common/u128.cpp b/externals/dynarmic/src/dynarmic/common/u128.cpp index 81aa0cf91..a19269e86 100755 --- a/externals/dynarmic/src/dynarmic/common/u128.cpp +++ b/externals/dynarmic/src/dynarmic/common/u128.cpp @@ -5,7 +5,8 @@ #include "dynarmic/common/u128.h" -#include "dynarmic/common/common_types.h" +#include +#include namespace Dynarmic { diff --git a/externals/dynarmic/src/dynarmic/common/u128.h b/externals/dynarmic/src/dynarmic/common/u128.h index 415173b08..f6df1ae6c 100755 --- a/externals/dynarmic/src/dynarmic/common/u128.h +++ b/externals/dynarmic/src/dynarmic/common/u128.h @@ -8,8 +8,9 @@ #include #include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include namespace Dynarmic { @@ -27,7 +28,7 @@ struct u128 { /* implicit */ u128(T value) : lower(value), upper(0) { static_assert(std::is_integral_v); - static_assert(Common::BitSize() <= Common::BitSize()); + static_assert(mcl::bitsizeof <= mcl::bitsizeof); } u64 lower = 0; @@ -37,14 +38,14 @@ struct u128 { bool Bit() const { static_assert(bit_position < 128); if constexpr (bit_position < 64) { - return Common::Bit(lower); + return mcl::bit::get_bit(lower); } else { - return Common::Bit(upper); + return mcl::bit::get_bit(upper); } } }; -static_assert(Common::BitSize() == 128); +static_assert(mcl::bitsizeof == 128); static_assert(std::is_standard_layout_v); static_assert(std::is_trivially_copyable_v); diff --git a/externals/dynarmic/src/dynarmic/common/x64_disassemble.cpp b/externals/dynarmic/src/dynarmic/common/x64_disassemble.cpp index ce32028d0..03d1d129a 100755 --- a/externals/dynarmic/src/dynarmic/common/x64_disassemble.cpp +++ b/externals/dynarmic/src/dynarmic/common/x64_disassemble.cpp @@ -7,8 +7,7 @@ #include #include - -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common { diff --git a/externals/dynarmic/src/dynarmic/common/x64_disassemble.h b/externals/dynarmic/src/dynarmic/common/x64_disassemble.h index ec7a33787..03c511bfd 100755 --- a/externals/dynarmic/src/dynarmic/common/x64_disassemble.h +++ b/externals/dynarmic/src/dynarmic/common/x64_disassemble.h @@ -8,7 +8,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::Common { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/FPSCR.h b/externals/dynarmic/src/dynarmic/frontend/A32/FPSCR.h index f8f0205d4..28414e9fa 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/FPSCR.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/FPSCR.h @@ -7,8 +7,9 @@ #include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/common/fp/rounding_mode.h" namespace Dynarmic::A32 { @@ -33,52 +34,52 @@ public: /// Negative condition flag. bool N() const { - return Common::Bit<31>(value); + return mcl::bit::get_bit<31>(value); } /// Zero condition flag. bool Z() const { - return Common::Bit<30>(value); + return mcl::bit::get_bit<30>(value); } /// Carry condition flag. bool C() const { - return Common::Bit<29>(value); + return mcl::bit::get_bit<29>(value); } /// Overflow condition flag. bool V() const { - return Common::Bit<28>(value); + return mcl::bit::get_bit<28>(value); } /// Cumulative saturation flag. bool QC() const { - return Common::Bit<27>(value); + return mcl::bit::get_bit<27>(value); } /// Alternate half-precision control flag. bool AHP() const { - return Common::Bit<26>(value); + return mcl::bit::get_bit<26>(value); } /// Default NaN mode control bit. bool DN() const { - return Common::Bit<25>(value); + return mcl::bit::get_bit<25>(value); } /// Flush-to-zero mode control bit. bool FTZ() const { - return Common::Bit<24>(value); + return mcl::bit::get_bit<24>(value); } /// Rounding mode control field. FP::RoundingMode RMode() const { - return static_cast(Common::Bits<22, 23>(value)); + return static_cast(mcl::bit::get_bits<22, 23>(value)); } /// Indicates the stride of a vector. std::optional Stride() const { - switch (Common::Bits<20, 21>(value)) { + switch (mcl::bit::get_bits<20, 21>(value)) { case 0b00: return 1; case 0b11: @@ -90,67 +91,67 @@ public: /// Indicates the length of a vector. size_t Len() const { - return Common::Bits<16, 18>(value) + 1; + return mcl::bit::get_bits<16, 18>(value) + 1; } /// Input denormal exception trap enable flag. bool IDE() const { - return Common::Bit<15>(value); + return mcl::bit::get_bit<15>(value); } /// Inexact exception trap enable flag. bool IXE() const { - return Common::Bit<12>(value); + return mcl::bit::get_bit<12>(value); } /// Underflow exception trap enable flag. bool UFE() const { - return Common::Bit<11>(value); + return mcl::bit::get_bit<11>(value); } /// Overflow exception trap enable flag. bool OFE() const { - return Common::Bit<10>(value); + return mcl::bit::get_bit<10>(value); } /// Division by zero exception trap enable flag. bool DZE() const { - return Common::Bit<9>(value); + return mcl::bit::get_bit<9>(value); } /// Invalid operation exception trap enable flag. bool IOE() const { - return Common::Bit<8>(value); + return mcl::bit::get_bit<8>(value); } /// Input denormal cumulative exception bit. bool IDC() const { - return Common::Bit<7>(value); + return mcl::bit::get_bit<7>(value); } /// Inexact cumulative exception bit. bool IXC() const { - return Common::Bit<4>(value); + return mcl::bit::get_bit<4>(value); } /// Underflow cumulative exception bit. bool UFC() const { - return Common::Bit<3>(value); + return mcl::bit::get_bit<3>(value); } /// Overflow cumulative exception bit. bool OFC() const { - return Common::Bit<2>(value); + return mcl::bit::get_bit<2>(value); } /// Division by zero cumulative exception bit. bool DZC() const { - return Common::Bit<1>(value); + return mcl::bit::get_bit<1>(value); } /// Invalid operation cumulative exception bit. bool IOC() const { - return Common::Bit<0>(value); + return mcl::bit::get_bit<0>(value); } /** diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/ITState.h b/externals/dynarmic/src/dynarmic/frontend/A32/ITState.h index ef8228f19..ae69fa1e3 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/ITState.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/ITState.h @@ -5,8 +5,9 @@ #pragma once -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/ir/cond.h" namespace Dynarmic::A32 { @@ -26,22 +27,22 @@ public: if (value == 0b00000000) { return IR::Cond::AL; } - return static_cast(Common::Bits<4, 7>(value)); + return static_cast(mcl::bit::get_bits<4, 7>(value)); } bool IsInITBlock() const { - return Common::Bits<0, 3>(value) != 0b0000; + return mcl::bit::get_bits<0, 3>(value) != 0b0000; } bool IsLastInITBlock() const { - return Common::Bits<0, 3>(value) == 0b1000; + return mcl::bit::get_bits<0, 3>(value) == 0b1000; } ITState Advance() const { - if (Common::Bits<0, 2>(value) == 0b000) { + if (mcl::bit::get_bits<0, 2>(value) == 0b000) { return ITState{0b00000000}; } - return ITState{Common::ModifyBits<0, 4>(value, static_cast(Common::Bits<0, 4>(value) << 1))}; + return ITState{mcl::bit::set_bits<0, 4>(value, static_cast(mcl::bit::get_bits<0, 4>(value) << 1))}; } u8 Value() const { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/PSR.h b/externals/dynarmic/src/dynarmic/frontend/A32/PSR.h index 5c12ba4bd..9af78eaae 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/PSR.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/PSR.h @@ -5,8 +5,9 @@ #pragma once -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/frontend/A32/ITState.h" namespace Dynarmic::A32 { @@ -65,52 +66,52 @@ public: } bool N() const { - return Common::Bit<31>(value); + return mcl::bit::get_bit<31>(value); } void N(bool set) { - value = Common::ModifyBit<31>(value, set); + value = mcl::bit::set_bit<31>(value, set); } bool Z() const { - return Common::Bit<30>(value); + return mcl::bit::get_bit<30>(value); } void Z(bool set) { - value = Common::ModifyBit<30>(value, set); + value = mcl::bit::set_bit<30>(value, set); } bool C() const { - return Common::Bit<29>(value); + return mcl::bit::get_bit<29>(value); } void C(bool set) { - value = Common::ModifyBit<29>(value, set); + value = mcl::bit::set_bit<29>(value, set); } bool V() const { - return Common::Bit<28>(value); + return mcl::bit::get_bit<28>(value); } void V(bool set) { - value = Common::ModifyBit<28>(value, set); + value = mcl::bit::set_bit<28>(value, set); } bool Q() const { - return Common::Bit<27>(value); + return mcl::bit::get_bit<27>(value); } void Q(bool set) { - value = Common::ModifyBit<27>(value, set); + value = mcl::bit::set_bit<27>(value, set); } bool J() const { - return Common::Bit<24>(value); + return mcl::bit::get_bit<24>(value); } void J(bool set) { - value = Common::ModifyBit<24>(value, set); + value = mcl::bit::set_bit<24>(value, set); } u32 GE() const { - return Common::Bits<16, 19>(value); + return mcl::bit::get_bits<16, 19>(value); } void GE(u32 data) { - value = Common::ModifyBits<16, 19>(value, data); + value = mcl::bit::set_bits<16, 19>(value, data); } ITState IT() const { @@ -123,45 +124,45 @@ public: } bool E() const { - return Common::Bit<9>(value); + return mcl::bit::get_bit<9>(value); } void E(bool set) { - value = Common::ModifyBit<9>(value, set); + value = mcl::bit::set_bit<9>(value, set); } bool A() const { - return Common::Bit<8>(value); + return mcl::bit::get_bit<8>(value); } void A(bool set) { - value = Common::ModifyBit<8>(value, set); + value = mcl::bit::set_bit<8>(value, set); } bool I() const { - return Common::Bit<7>(value); + return mcl::bit::get_bit<7>(value); } void I(bool set) { - value = Common::ModifyBit<7>(value, set); + value = mcl::bit::set_bit<7>(value, set); } bool F() const { - return Common::Bit<6>(value); + return mcl::bit::get_bit<6>(value); } void F(bool set) { - value = Common::ModifyBit<6>(value, set); + value = mcl::bit::set_bit<6>(value, set); } bool T() const { - return Common::Bit<5>(value); + return mcl::bit::get_bit<5>(value); } void T(bool set) { - value = Common::ModifyBit<5>(value, set); + value = mcl::bit::set_bit<5>(value, set); } Mode M() const { - return static_cast(Common::Bits<0, 4>(value)); + return static_cast(mcl::bit::get_bits<0, 4>(value)); } void M(Mode mode) { - value = Common::ModifyBits<0, 4>(value, static_cast(mode)); + value = mcl::bit::set_bits<0, 4>(value, static_cast(mode)); } u32 Value() const { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.cpp index 8d2b9db72..9b9e645d0 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.cpp @@ -5,7 +5,8 @@ #include "dynarmic/frontend/A32/a32_ir_emitter.h" -#include "dynarmic/common/assert.h" +#include + #include "dynarmic/frontend/A32/a32_types.h" #include "dynarmic/interface/A32/arch_version.h" #include "dynarmic/ir/opcodes.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.h b/externals/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.h index 0f36958a3..8cdebe493 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/a32_ir_emitter.h @@ -7,7 +7,8 @@ #include -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/ir/ir_emitter.h" #include "dynarmic/ir/value.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/a32_location_descriptor.h b/externals/dynarmic/src/dynarmic/frontend/A32/a32_location_descriptor.h index 4b68d2def..3bdb72c9a 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/a32_location_descriptor.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/a32_location_descriptor.h @@ -9,7 +9,8 @@ #include #include -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/frontend/A32/FPSCR.h" #include "dynarmic/frontend/A32/ITState.h" #include "dynarmic/frontend/A32/PSR.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/a32_types.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/a32_types.cpp index 046286270..c922f57b3 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/a32_types.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/a32_types.cpp @@ -8,7 +8,7 @@ #include #include -#include "dynarmic/common/bit_util.h" +#include namespace Dynarmic::A32 { @@ -46,7 +46,7 @@ std::string RegListToString(RegList reg_list) { std::string ret; bool first_reg = true; for (size_t i = 0; i < 16; i++) { - if (Common::Bit(i, reg_list)) { + if (mcl::bit::get_bit(i, reg_list)) { if (!first_reg) { ret += ", "; } diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/a32_types.h b/externals/dynarmic/src/dynarmic/frontend/A32/a32_types.h index ff30cc760..5d1166f3a 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/a32_types.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/a32_types.h @@ -9,8 +9,9 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/interface/A32/coprocessor_util.h" #include "dynarmic/ir/cond.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/arm.h b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/arm.h index 3ef69c05a..5b4a7b349 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/arm.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/arm.h @@ -12,8 +12,9 @@ #include #include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" @@ -34,7 +35,7 @@ std::vector> GetArmDecodeTable() { // If a matcher has more bits in its mask it is more specific, so it should come first. std::stable_sort(table.begin(), table.end(), [](const auto& matcher1, const auto& matcher2) { - return Common::BitCount(matcher1.GetMask()) > Common::BitCount(matcher2.GetMask()); + return mcl::bit::count_ones(matcher1.GetMask()) > mcl::bit::count_ones(matcher2.GetMask()); }); return table; diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/asimd.h b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/asimd.h index 73b029751..cfcd28c6e 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/asimd.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/asimd.h @@ -11,8 +11,9 @@ #include #include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" @@ -58,7 +59,7 @@ std::vector> GetASIMDDecodeTable() { // If a matcher has more bits in its mask it is more specific, so it should come first. std::stable_sort(sort_begin, sort_end, [](const auto& matcher1, const auto& matcher2) { - return Common::BitCount(matcher1.GetMask()) > Common::BitCount(matcher2.GetMask()); + return mcl::bit::count_ones(matcher1.GetMask()) > mcl::bit::count_ones(matcher2.GetMask()); }); return table; diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/thumb16.h b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/thumb16.h index 568d5f42c..6a4275f72 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/thumb16.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/thumb16.h @@ -10,7 +10,8 @@ #include #include -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/thumb32.h b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/thumb32.h index 2d5d5b1e8..f3f4b3b9e 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/thumb32.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/thumb32.h @@ -9,7 +9,8 @@ #include #include -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/vfp.h b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/vfp.h index 62b1288a8..f79a859bf 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/decoder/vfp.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/decoder/vfp.h @@ -10,7 +10,8 @@ #include #include -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler.h b/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler.h index 65dac998b..6a61afdef 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler.h @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::A32 { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler_arm.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler_arm.cpp index b42600dcd..ff0c48a1c 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler_arm.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler_arm.cpp @@ -8,8 +8,9 @@ #include #include +#include +#include -#include "dynarmic/common/bit_util.h" #include "dynarmic/common/string_util.h" #include "dynarmic/frontend/A32/a32_types.h" #include "dynarmic/frontend/A32/decoder/arm.h" @@ -24,7 +25,7 @@ public: using instruction_return_type = std::string; static u32 ArmExpandImm(int rotate, Imm<8> imm8) { - return Common::RotateRight(static_cast(imm8.ZeroExtend()), rotate * 2); + return mcl::bit::rotate_right(static_cast(imm8.ZeroExtend()), rotate * 2); } static std::string ShiftStr(ShiftType shift, Imm<5> imm5) { @@ -150,15 +151,15 @@ public: // Branch instructions std::string arm_B(Cond cond, Imm<24> imm24) { - const s32 offset = Common::SignExtend<26, s32>(imm24.ZeroExtend() << 2) + 8; + const s32 offset = static_cast(mcl::bit::sign_extend<26, u32>(imm24.ZeroExtend() << 2) + 8); return fmt::format("b{} {}#{}", CondToString(cond), Common::SignToChar(offset), abs(offset)); } std::string arm_BL(Cond cond, Imm<24> imm24) { - const s32 offset = Common::SignExtend<26, s32>(imm24.ZeroExtend() << 2) + 8; + const s32 offset = static_cast(mcl::bit::sign_extend<26, u32>(imm24.ZeroExtend() << 2) + 8); return fmt::format("bl{} {}#{}", CondToString(cond), Common::SignToChar(offset), abs(offset)); } std::string arm_BLX_imm(bool H, Imm<24> imm24) { - const s32 offset = Common::SignExtend<26, s32>(imm24.ZeroExtend() << 2) + 8 + (H ? 2 : 0); + const s32 offset = static_cast(mcl::bit::sign_extend<26, u32>(imm24.ZeroExtend() << 2) + 8 + (H ? 2 : 0)); return fmt::format("blx {}#{}", Common::SignToChar(offset), abs(offset)); } std::string arm_BLX_reg(Cond cond, Reg m) { @@ -1209,11 +1210,11 @@ public: std::string arm_MRS(Cond cond, Reg d) { return fmt::format("mrs{} {}, apsr", CondToString(cond), d); } - std::string arm_MSR_imm(Cond cond, int mask, int rotate, Imm<8> imm8) { - const bool write_c = Common::Bit<0>(mask); - const bool write_x = Common::Bit<1>(mask); - const bool write_s = Common::Bit<2>(mask); - const bool write_f = Common::Bit<3>(mask); + std::string arm_MSR_imm(Cond cond, unsigned mask, int rotate, Imm<8> imm8) { + const bool write_c = mcl::bit::get_bit<0>(mask); + const bool write_x = mcl::bit::get_bit<1>(mask); + const bool write_s = mcl::bit::get_bit<2>(mask); + const bool write_f = mcl::bit::get_bit<3>(mask); return fmt::format("msr{} cpsr_{}{}{}{}, #{}", CondToString(cond), write_c ? "c" : "", @@ -1222,11 +1223,11 @@ public: write_f ? "f" : "", ArmExpandImm(rotate, imm8)); } - std::string arm_MSR_reg(Cond cond, int mask, Reg n) { - const bool write_c = Common::Bit<0>(mask); - const bool write_x = Common::Bit<1>(mask); - const bool write_s = Common::Bit<2>(mask); - const bool write_f = Common::Bit<3>(mask); + std::string arm_MSR_reg(Cond cond, unsigned mask, Reg n) { + const bool write_c = mcl::bit::get_bit<0>(mask); + const bool write_x = mcl::bit::get_bit<1>(mask); + const bool write_s = mcl::bit::get_bit<2>(mask); + const bool write_f = mcl::bit::get_bit<3>(mask); return fmt::format("msr{} cpsr_{}{}{}{}, {}", CondToString(cond), write_c ? "c" : "", diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler_thumb.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler_thumb.cpp index ec05b0dd0..860181311 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler_thumb.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/disassembler/disassembler_thumb.cpp @@ -8,8 +8,8 @@ #include #include +#include -#include "dynarmic/common/bit_util.h" #include "dynarmic/common/string_util.h" #include "dynarmic/frontend/A32/a32_types.h" #include "dynarmic/frontend/A32/decoder/thumb16.h" @@ -345,7 +345,7 @@ public: } std::string thumb16_LDMIA(Reg n, RegList reg_list) { - const bool write_back = !Common::Bit(static_cast(n), reg_list); + const bool write_back = !mcl::bit::get_bit(static_cast(n), reg_list); return fmt::format("ldm {}{}, {{{}}}", n, write_back ? "!" : "", RegListToString(reg_list)); } diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/a32_translate.h b/externals/dynarmic/src/dynarmic/frontend/A32/translate/a32_translate.h index 9af458e62..0f2c3a121 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/a32_translate.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/a32_translate.h @@ -4,7 +4,8 @@ */ #pragma once -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/interface/A32/arch_version.h" namespace Dynarmic::IR { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp index 9488e628e..8bd875c7d 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.cpp @@ -7,8 +7,9 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/frontend/A32/a32_ir_emitter.h" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" #include "dynarmic/interface/A32/config.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.h b/externals/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.h index a86bf9fb4..18c8b1ccc 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/conditional_state.h @@ -5,7 +5,7 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::IR { enum class Cond; diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_branch.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_branch.cpp index 41beea7bb..d87cfcfe8 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_branch.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_branch.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -14,7 +15,7 @@ bool TranslatorVisitor::arm_B(Cond cond, Imm<24> imm24) { return true; } - const u32 imm32 = Common::SignExtend<26, u32>(imm24.ZeroExtend() << 2) + 8; + const u32 imm32 = mcl::bit::sign_extend<26, u32>(imm24.ZeroExtend() << 2) + 8; const auto new_location = ir.current_location.AdvancePC(imm32); ir.SetTerm(IR::Term::LinkBlock{new_location}); return false; @@ -29,7 +30,7 @@ bool TranslatorVisitor::arm_BL(Cond cond, Imm<24> imm24) { ir.PushRSB(ir.current_location.AdvancePC(4)); ir.SetRegister(Reg::LR, ir.Imm32(ir.current_location.PC() + 4)); - const u32 imm32 = Common::SignExtend<26, u32>(imm24.ZeroExtend() << 2) + 8; + const u32 imm32 = mcl::bit::sign_extend<26, u32>(imm24.ZeroExtend() << 2) + 8; const auto new_location = ir.current_location.AdvancePC(imm32); ir.SetTerm(IR::Term::LinkBlock{new_location}); return false; @@ -40,7 +41,7 @@ bool TranslatorVisitor::arm_BLX_imm(bool H, Imm<24> imm24) { ir.PushRSB(ir.current_location.AdvancePC(4)); ir.SetRegister(Reg::LR, ir.Imm32(ir.current_location.PC() + 4)); - const u32 imm32 = Common::SignExtend<26, u32>((imm24.ZeroExtend() << 2)) + (H ? 2 : 0) + 8; + const u32 imm32 = mcl::bit::sign_extend<26, u32>((imm24.ZeroExtend() << 2)) + (H ? 2 : 0) + 8; const auto new_location = ir.current_location.AdvancePC(imm32).SetTFlag(true); ir.SetTerm(IR::Term::LinkBlock{new_location}); return false; diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.cpp index e85231a40..276f8384e 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.cpp @@ -5,7 +5,8 @@ #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" -#include "dynarmic/common/assert.h" +#include + #include "dynarmic/interface/A32/config.h" namespace Dynarmic::A32 { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.h b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.h index d20a2c561..61a97b1cc 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/a32_translate_impl.h @@ -5,8 +5,10 @@ #pragma once -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include +#include + #include "dynarmic/frontend/A32/a32_ir_emitter.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/frontend/A32/a32_types.h" @@ -49,8 +51,8 @@ struct TranslatorVisitor final { u32 imm32 = imm8.ZeroExtend(); auto carry_out = carry_in; if (rotate) { - imm32 = Common::RotateRight(imm8.ZeroExtend(), rotate * 2); - carry_out = ir.Imm1(Common::Bit<31>(imm32)); + imm32 = mcl::bit::rotate_right(imm8.ZeroExtend(), rotate * 2); + carry_out = ir.Imm1(mcl::bit::get_bit<31>(imm32)); } return {imm32, carry_out}; } @@ -68,18 +70,18 @@ struct TranslatorVisitor final { case 0b00: return imm8; case 0b01: - return Common::Replicate(imm8, 16); + return mcl::bit::replicate_element(imm8); case 0b10: - return Common::Replicate(imm8 << 8, 16); + return mcl::bit::replicate_element(imm8 << 8); case 0b11: - return Common::Replicate(imm8, 8); + return mcl::bit::replicate_element(imm8); } UNREACHABLE(); }(); return {imm32, carry_in}; } - const u32 imm32 = Common::RotateRight((1 << 7) | imm12.Bits<0, 6>(), imm12.Bits<7, 11>()); - return {imm32, ir.Imm1(Common::Bit<31>(imm32))}; + const u32 imm32 = mcl::bit::rotate_right((1 << 7) | imm12.Bits<0, 6>(), imm12.Bits<7, 11>()); + return {imm32, ir.Imm1(mcl::bit::get_bit<31>(imm32))}; } u32 ThumbExpandImm(Imm<1> i, Imm<3> imm3, Imm<8> imm8) { @@ -397,8 +399,8 @@ struct TranslatorVisitor final { // Status register access instructions bool arm_CPS(); bool arm_MRS(Cond cond, Reg d); - bool arm_MSR_imm(Cond cond, int mask, int rotate, Imm<8> imm8); - bool arm_MSR_reg(Cond cond, int mask, Reg n); + bool arm_MSR_imm(Cond cond, unsigned mask, int rotate, Imm<8> imm8); + bool arm_MSR_reg(Cond cond, unsigned mask, Reg n); bool arm_RFE(); bool arm_SETEND(bool E); bool arm_SRS(); diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_load_store_structures.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_load_store_structures.cpp index 4afd0b1fc..d444e023e 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_load_store_structures.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_load_store_structures.cpp @@ -6,7 +6,8 @@ #include #include -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -16,7 +17,7 @@ namespace { std::optional> DecodeType(Imm<4> type, size_t size, size_t align) { switch (type.ZeroExtend()) { case 0b0111: // VST1 A1 / VLD1 A1 - if (Common::Bit<1>(align)) { + if (mcl::bit::get_bit<1>(align)) { return std::nullopt; } return std::tuple{1, 1, 0}; @@ -26,7 +27,7 @@ std::optional> DecodeType(Imm<4> type, size_t } return std::tuple{1, 2, 0}; case 0b0110: // VST1 A3 / VLD1 A3 - if (Common::Bit<1>(align)) { + if (mcl::bit::get_bit<1>(align)) { return std::nullopt; } return std::tuple{1, 3, 0}; @@ -48,12 +49,12 @@ std::optional> DecodeType(Imm<4> type, size_t } return std::tuple{2, 2, 2}; case 0b0100: // VST3 / VLD3 - if (size == 0b11 || Common::Bit<1>(align)) { + if (size == 0b11 || mcl::bit::get_bit<1>(align)) { return std::nullopt; } return std::tuple{3, 1, 1}; case 0b0101: // VST3 / VLD3 - if (size == 0b11 || Common::Bit<1>(align)) { + if (size == 0b11 || mcl::bit::get_bit<1>(align)) { return std::nullopt; } return std::tuple{3, 1, 2}; @@ -250,14 +251,14 @@ bool TranslatorVisitor::v8_VST_single(bool D, Reg n, size_t Vd, size_t sz, size_ return DecodeError(); } - if (nelem == 1 && Common::Bit(sz, index_align)) { + if (nelem == 1 && mcl::bit::get_bit(sz, index_align)) { return UndefinedInstruction(); } const size_t ebytes = size_t(1) << sz; - const size_t index = Common::Bits(sz + 1, 3, index_align); - const size_t inc = (sz != 0 && Common::Bit(sz, index_align)) ? 2 : 1; - const size_t a = Common::Bits(0, sz ? sz - 1 : 0, index_align); + const size_t index = mcl::bit::get_bits(sz + 1, 3, index_align); + const size_t inc = (sz != 0 && mcl::bit::get_bit(sz, index_align)) ? 2 : 1; + const size_t a = mcl::bit::get_bits(0, sz ? sz - 1 : 0, index_align); if (nelem == 1 && inc == 2) { return UndefinedInstruction(); @@ -265,7 +266,7 @@ bool TranslatorVisitor::v8_VST_single(bool D, Reg n, size_t Vd, size_t sz, size_ if (nelem == 1 && sz == 2 && (a != 0b00 && a != 0b11)) { return UndefinedInstruction(); } - if (nelem == 2 && Common::Bit<1>(a)) { + if (nelem == 2 && mcl::bit::get_bit<1>(a)) { return UndefinedInstruction(); } if (nelem == 3 && a != 0b00) { @@ -314,14 +315,14 @@ bool TranslatorVisitor::v8_VLD_single(bool D, Reg n, size_t Vd, size_t sz, size_ return DecodeError(); } - if (nelem == 1 && Common::Bit(sz, index_align)) { + if (nelem == 1 && mcl::bit::get_bit(sz, index_align)) { return UndefinedInstruction(); } const size_t ebytes = size_t(1) << sz; - const size_t index = Common::Bits(sz + 1, 3, index_align); - const size_t inc = (sz != 0 && Common::Bit(sz, index_align)) ? 2 : 1; - const size_t a = Common::Bits(0, sz ? sz - 1 : 0, index_align); + const size_t index = mcl::bit::get_bits(sz + 1, 3, index_align); + const size_t inc = (sz != 0 && mcl::bit::get_bit(sz, index_align)) ? 2 : 1; + const size_t a = mcl::bit::get_bits(0, sz ? sz - 1 : 0, index_align); if (nelem == 1 && inc == 2) { return UndefinedInstruction(); @@ -329,7 +330,7 @@ bool TranslatorVisitor::v8_VLD_single(bool D, Reg n, size_t Vd, size_t sz, size_ if (nelem == 1 && sz == 2 && (a != 0b00 && a != 0b11)) { return UndefinedInstruction(); } - if (nelem == 2 && Common::Bit<1>(a)) { + if (nelem == 2 && mcl::bit::get_bit<1>(a)) { return UndefinedInstruction(); } if (nelem == 3 && a != 0b00) { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_misc.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_misc.cpp index aae0018b8..1dcab2794 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_misc.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_misc.cpp @@ -3,8 +3,10 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -35,7 +37,7 @@ static bool TableLookup(TranslatorVisitor& v, bool is_vtbl, bool D, size_t Vn, s } bool TranslatorVisitor::asimd_VEXT(bool D, size_t Vn, size_t Vd, Imm<4> imm4, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -65,7 +67,7 @@ bool TranslatorVisitor::asimd_VTBX(bool D, size_t Vn, size_t Vd, size_t len, boo } bool TranslatorVisitor::asimd_VDUP_scalar(bool D, Imm<4> imm4, size_t Vd, bool Q, bool M, size_t Vm) { - if (Q && Common::Bit<0>(Vd)) { + if (Q && mcl::bit::get_bit<0>(Vd)) { return UndefinedInstruction(); } @@ -73,7 +75,7 @@ bool TranslatorVisitor::asimd_VDUP_scalar(bool D, Imm<4> imm4, size_t Vd, bool Q return UndefinedInstruction(); } - const size_t imm4_lsb = Common::LowestSetBit(imm4.ZeroExtend()); + const size_t imm4_lsb = mcl::bit::lowest_set_bit(imm4.ZeroExtend()); const size_t esize = 8u << imm4_lsb; const size_t index = imm4.ZeroExtend() >> (imm4_lsb + 1); const auto d = ToVector(Q, Vd, D); diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp index a0fda6311..7427770c7 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_one_reg_modified_immediate.cpp @@ -3,14 +3,15 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { bool TranslatorVisitor::asimd_VMOV_imm(Imm<1> a, bool D, Imm<1> b, Imm<1> c, Imm<1> d, size_t Vd, Imm<4> cmode, bool Q, bool op, Imm<1> e, Imm<1> f, Imm<1> g, Imm<1> h) { - if (Q && Common::Bit<0>(Vd)) { + if (Q && mcl::bit::get_bit<0>(Vd)) { return UndefinedInstruction(); } diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_three_regs.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_three_regs.cpp index f803d059b..bf7abde28 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_three_regs.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_three_regs.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -28,7 +29,7 @@ enum class WidenBehaviour { template bool BitwiseInstruction(TranslatorVisitor& v, bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm, Callable fn) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return v.UndefinedInstruction(); } @@ -54,7 +55,7 @@ bool BitwiseInstruction(TranslatorVisitor& v, bool D, size_t Vn, size_t Vd, bool template bool FloatingPointInstruction(TranslatorVisitor& v, bool D, bool sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm, Callable fn) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return v.UndefinedInstruction(); } @@ -80,7 +81,7 @@ bool IntegerComparison(TranslatorVisitor& v, bool U, bool D, size_t sz, size_t V return v.UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return v.UndefinedInstruction(); } @@ -115,7 +116,7 @@ bool FloatComparison(TranslatorVisitor& v, bool D, bool sz, size_t Vn, size_t Vd return v.UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return v.UndefinedInstruction(); } @@ -151,7 +152,7 @@ bool AbsoluteDifference(TranslatorVisitor& v, bool U, bool D, size_t sz, size_t return v.UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return v.UndefinedInstruction(); } @@ -183,7 +184,7 @@ bool AbsoluteDifferenceLong(TranslatorVisitor& v, bool U, bool D, size_t sz, siz return v.DecodeError(); } - if (Common::Bit<0>(Vd)) { + if (mcl::bit::get_bit<0>(Vd)) { return v.UndefinedInstruction(); } @@ -221,7 +222,7 @@ bool WideInstruction(TranslatorVisitor& v, bool U, bool D, size_t sz, size_t Vn, return v.DecodeError(); } - if (Common::Bit<0>(Vd) || (!widen_first && Common::Bit<0>(Vn))) { + if (mcl::bit::get_bit<0>(Vd) || (!widen_first && mcl::bit::get_bit<0>(Vn))) { return v.UndefinedInstruction(); } @@ -245,7 +246,7 @@ bool WideInstruction(TranslatorVisitor& v, bool U, bool D, size_t sz, size_t Vn, // ASIMD Three registers of the same length bool TranslatorVisitor::asimd_VHADD(bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -267,7 +268,7 @@ bool TranslatorVisitor::asimd_VHADD(bool U, bool D, size_t sz, size_t Vn, size_t } bool TranslatorVisitor::asimd_VQADD(bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -289,7 +290,7 @@ bool TranslatorVisitor::asimd_VQADD(bool U, bool D, size_t sz, size_t Vn, size_t } bool TranslatorVisitor::asimd_VRHADD(bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -359,7 +360,7 @@ bool TranslatorVisitor::asimd_VBIF(bool D, size_t Vn, size_t Vd, bool N, bool Q, } bool TranslatorVisitor::asimd_VHSUB(bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -381,7 +382,7 @@ bool TranslatorVisitor::asimd_VHSUB(bool U, bool D, size_t sz, size_t Vn, size_t } bool TranslatorVisitor::asimd_VQSUB(bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -419,7 +420,7 @@ bool TranslatorVisitor::asimd_VABA(bool U, bool D, size_t sz, size_t Vn, size_t } bool TranslatorVisitor::asimd_VADD_int(bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -437,7 +438,7 @@ bool TranslatorVisitor::asimd_VADD_int(bool D, size_t sz, size_t Vn, size_t Vd, } bool TranslatorVisitor::asimd_VSUB_int(bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -455,7 +456,7 @@ bool TranslatorVisitor::asimd_VSUB_int(bool D, size_t sz, size_t Vn, size_t Vd, } bool TranslatorVisitor::asimd_VSHL_reg(bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -474,7 +475,7 @@ bool TranslatorVisitor::asimd_VSHL_reg(bool U, bool D, size_t sz, size_t Vn, siz } bool TranslatorVisitor::asimd_VQSHL_reg(bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -493,7 +494,7 @@ bool TranslatorVisitor::asimd_VQSHL_reg(bool U, bool D, size_t sz, size_t Vn, si } bool TranslatorVisitor::asimd_VRSHL(bool U, bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -516,7 +517,7 @@ bool TranslatorVisitor::asimd_VMAX(bool U, bool D, size_t sz, size_t Vn, size_t return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -542,7 +543,7 @@ bool TranslatorVisitor::asimd_VMAX(bool U, bool D, size_t sz, size_t Vn, size_t } bool TranslatorVisitor::asimd_VTST(bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -573,7 +574,7 @@ bool TranslatorVisitor::asimd_VMLA(bool op, bool D, size_t sz, size_t Vn, size_t return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -598,7 +599,7 @@ bool TranslatorVisitor::asimd_VMUL(bool P, bool D, size_t sz, size_t Vn, size_t return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -647,7 +648,7 @@ bool TranslatorVisitor::asimd_VPMAX_int(bool U, bool D, size_t sz, size_t Vn, si } bool TranslatorVisitor::asimd_VQDMULH(bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -669,7 +670,7 @@ bool TranslatorVisitor::asimd_VQDMULH(bool D, size_t sz, size_t Vn, size_t Vd, b } bool TranslatorVisitor::asimd_VQRDMULH(bool D, size_t sz, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -832,7 +833,7 @@ bool TranslatorVisitor::asimd_VRSQRTS(bool D, bool sz, size_t Vn, size_t Vd, boo } bool TranslatorVisitor::v8_SHA256H(bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (!Q || Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm)) { + if (!Q || mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -850,7 +851,7 @@ bool TranslatorVisitor::v8_SHA256H(bool D, size_t Vn, size_t Vd, bool N, bool Q, } bool TranslatorVisitor::v8_SHA256H2(bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (!Q || Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm)) { + if (!Q || mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -868,7 +869,7 @@ bool TranslatorVisitor::v8_SHA256H2(bool D, size_t Vn, size_t Vd, bool N, bool Q } bool TranslatorVisitor::v8_SHA256SU1(bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { - if (!Q || Common::Bit<0>(Vd) || Common::Bit<0>(Vn) || Common::Bit<0>(Vm)) { + if (!Q || mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn) || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -920,7 +921,7 @@ bool TranslatorVisitor::asimd_VMULL(bool U, bool D, size_t sz, size_t Vn, size_t return DecodeError(); } - if ((P & (U || sz == 0b10)) || Common::Bit<0>(Vd)) { + if ((P & (U || sz == 0b10)) || mcl::bit::get_bit<0>(Vd)) { return UndefinedInstruction(); } diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_misc.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_misc.cpp index e9532aa8e..b1961b20f 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_misc.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_misc.cpp @@ -5,7 +5,8 @@ #include -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -23,7 +24,7 @@ bool CompareWithZero(TranslatorVisitor& v, bool D, size_t sz, size_t Vd, bool F, return v.UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return v.UndefinedInstruction(); } @@ -76,7 +77,7 @@ bool PairedAddOperation(TranslatorVisitor& v, bool D, size_t sz, size_t Vd, bool return v.UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return v.UndefinedInstruction(); } @@ -108,7 +109,7 @@ bool TranslatorVisitor::asimd_VREV(bool D, size_t sz, size_t Vd, size_t op, bool return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -168,7 +169,7 @@ bool TranslatorVisitor::asimd_VPADDL(bool D, size_t sz, size_t Vd, bool op, bool } bool TranslatorVisitor::v8_AESD(bool D, size_t sz, size_t Vd, bool M, size_t Vm) { - if (sz != 0b00 || Common::Bit<0>(Vd) || Common::Bit<0>(Vm)) { + if (sz != 0b00 || mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -183,7 +184,7 @@ bool TranslatorVisitor::v8_AESD(bool D, size_t sz, size_t Vd, bool M, size_t Vm) } bool TranslatorVisitor::v8_AESE(bool D, size_t sz, size_t Vd, bool M, size_t Vm) { - if (sz != 0b00 || Common::Bit<0>(Vd) || Common::Bit<0>(Vm)) { + if (sz != 0b00 || mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -198,7 +199,7 @@ bool TranslatorVisitor::v8_AESE(bool D, size_t sz, size_t Vd, bool M, size_t Vm) } bool TranslatorVisitor::v8_AESIMC(bool D, size_t sz, size_t Vd, bool M, size_t Vm) { - if (sz != 0b00 || Common::Bit<0>(Vd) || Common::Bit<0>(Vm)) { + if (sz != 0b00 || mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -212,7 +213,7 @@ bool TranslatorVisitor::v8_AESIMC(bool D, size_t sz, size_t Vd, bool M, size_t V } bool TranslatorVisitor::v8_AESMC(bool D, size_t sz, size_t Vd, bool M, size_t Vm) { - if (sz != 0b00 || Common::Bit<0>(Vd) || Common::Bit<0>(Vm)) { + if (sz != 0b00 || mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -226,7 +227,7 @@ bool TranslatorVisitor::v8_AESMC(bool D, size_t sz, size_t Vd, bool M, size_t Vm } bool TranslatorVisitor::v8_SHA256SU0(bool D, size_t sz, size_t Vd, bool M, size_t Vm) { - if (sz != 0b10 || Common::Bit<0>(Vd) || Common::Bit<0>(Vm)) { + if (sz != 0b10 || mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -245,7 +246,7 @@ bool TranslatorVisitor::asimd_VCLS(bool D, size_t sz, size_t Vd, bool Q, bool M, return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -269,7 +270,7 @@ bool TranslatorVisitor::asimd_VCLZ(bool D, size_t sz, size_t Vd, bool Q, bool M, return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -291,7 +292,7 @@ bool TranslatorVisitor::asimd_VCNT(bool D, size_t sz, size_t Vd, bool Q, bool M, return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -309,7 +310,7 @@ bool TranslatorVisitor::asimd_VMVN_reg(bool D, size_t sz, size_t Vd, bool Q, boo return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -332,7 +333,7 @@ bool TranslatorVisitor::asimd_VQABS(bool D, size_t sz, size_t Vd, bool Q, bool M return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -352,7 +353,7 @@ bool TranslatorVisitor::asimd_VQNEG(bool D, size_t sz, size_t Vd, bool Q, bool M return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -392,7 +393,7 @@ bool TranslatorVisitor::asimd_VABS(bool D, size_t sz, size_t Vd, bool F, bool Q, return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -418,7 +419,7 @@ bool TranslatorVisitor::asimd_VNEG(bool D, size_t sz, size_t Vd, bool F, bool Q, return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -440,7 +441,7 @@ bool TranslatorVisitor::asimd_VNEG(bool D, size_t sz, size_t Vd, bool F, bool Q, } bool TranslatorVisitor::asimd_VSWP(bool D, size_t Vd, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -473,7 +474,7 @@ bool TranslatorVisitor::asimd_VTRN(bool D, size_t sz, size_t Vd, bool Q, bool M, return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -500,7 +501,7 @@ bool TranslatorVisitor::asimd_VUZP(bool D, size_t sz, size_t Vd, bool Q, bool M, return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -532,7 +533,7 @@ bool TranslatorVisitor::asimd_VZIP(bool D, size_t sz, size_t Vd, bool Q, bool M, return UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -563,7 +564,7 @@ bool TranslatorVisitor::asimd_VZIP(bool D, size_t sz, size_t Vd, bool Q, bool M, } bool TranslatorVisitor::asimd_VMOVN(bool D, size_t sz, size_t Vd, bool M, size_t Vm) { - if (sz == 0b11 || Common::Bit<0>(Vm)) { + if (sz == 0b11 || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } const size_t esize = 8U << sz; @@ -578,7 +579,7 @@ bool TranslatorVisitor::asimd_VMOVN(bool D, size_t sz, size_t Vd, bool M, size_t } bool TranslatorVisitor::asimd_VQMOVUN(bool D, size_t sz, size_t Vd, bool M, size_t Vm) { - if (sz == 0b11 || Common::Bit<0>(Vm)) { + if (sz == 0b11 || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } const size_t esize = 8U << sz; @@ -593,7 +594,7 @@ bool TranslatorVisitor::asimd_VQMOVUN(bool D, size_t sz, size_t Vd, bool M, size } bool TranslatorVisitor::asimd_VQMOVN(bool D, size_t sz, size_t Vd, bool op, bool M, size_t Vm) { - if (sz == 0b11 || Common::Bit<0>(Vm)) { + if (sz == 0b11 || mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } const size_t esize = 8U << sz; @@ -609,7 +610,7 @@ bool TranslatorVisitor::asimd_VQMOVN(bool D, size_t sz, size_t Vd, bool op, bool } bool TranslatorVisitor::asimd_VSHLL_max(bool D, size_t sz, size_t Vd, bool M, size_t Vm) { - if (sz == 0b11 || Common::Bit<0>(Vd)) { + if (sz == 0b11 || mcl::bit::get_bit<0>(Vd)) { return UndefinedInstruction(); } const size_t esize = 8U << sz; @@ -627,10 +628,10 @@ bool TranslatorVisitor::asimd_VCVT_half(bool D, size_t sz, size_t Vd, bool half_ if (sz != 0b01) { return UndefinedInstruction(); } - if (half_to_single && Common::Bit<0>(Vd)) { + if (half_to_single && mcl::bit::get_bit<0>(Vd)) { return UndefinedInstruction(); } - if (!half_to_single && Common::Bit<0>(Vm)) { + if (!half_to_single && mcl::bit::get_bit<0>(Vm)) { return UndefinedInstruction(); } @@ -647,7 +648,7 @@ bool TranslatorVisitor::asimd_VCVT_half(bool D, size_t sz, size_t Vd, bool half_ } bool TranslatorVisitor::asimd_VRECPE(bool D, size_t sz, size_t Vd, bool F, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -673,7 +674,7 @@ bool TranslatorVisitor::asimd_VRECPE(bool D, size_t sz, size_t Vd, bool F, bool } bool TranslatorVisitor::asimd_VRSQRTE(bool D, size_t sz, size_t Vd, bool F, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -699,7 +700,7 @@ bool TranslatorVisitor::asimd_VRSQRTE(bool D, size_t sz, size_t Vd, bool F, bool } bool TranslatorVisitor::asimd_VCVT_integer(bool D, size_t sz, size_t Vd, bool op, bool U, bool Q, bool M, size_t Vm) { - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp index 9b0979655..4e774d417 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_scalar.cpp @@ -5,15 +5,16 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { namespace { std::pair GetScalarLocation(size_t esize, bool M, size_t Vm) { const ExtReg m = ExtReg::Q0 + ((Vm >> 1) & (esize == 16 ? 0b11 : 0b111)); - const size_t index = concatenate(Imm<1>{Common::Bit<0>(Vm)}, Imm<1>{M}, Imm<1>{Common::Bit<3>(Vm)}).ZeroExtend() >> (esize == 16 ? 0 : 1); + const size_t index = concatenate(Imm<1>{mcl::bit::get_bit<0>(Vm)}, Imm<1>{M}, Imm<1>{mcl::bit::get_bit<3>(Vm)}).ZeroExtend() >> (esize == 16 ? 0 : 1); return std::make_pair(m, index); } @@ -37,7 +38,7 @@ bool ScalarMultiply(TranslatorVisitor& v, bool Q, bool D, size_t sz, size_t Vn, return v.UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn))) { return v.UndefinedInstruction(); } @@ -74,7 +75,7 @@ bool ScalarMultiplyLong(TranslatorVisitor& v, bool U, bool D, size_t sz, size_t return v.DecodeError(); } - if (sz == 0b00 || Common::Bit<0>(Vd)) { + if (sz == 0b00 || mcl::bit::get_bit<0>(Vd)) { return v.UndefinedInstruction(); } @@ -115,7 +116,7 @@ bool ScalarMultiplyReturnHigh(TranslatorVisitor& v, bool Q, bool D, size_t sz, s return v.UndefinedInstruction(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vn))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vn))) { return v.UndefinedInstruction(); } @@ -166,7 +167,7 @@ bool TranslatorVisitor::asimd_VQDMULL_scalar(bool D, size_t sz, size_t Vn, size_ return DecodeError(); } - if (sz == 0b00 || Common::Bit<0>(Vd)) { + if (sz == 0b00 || mcl::bit::get_bit<0>(Vd)) { return UndefinedInstruction(); } diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp index f1d8e6219..aec91d0c1 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp @@ -3,8 +3,10 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -42,7 +44,7 @@ std::pair ElementSizeAndShiftAmount(bool right_shift, bool L, si return {64, 64 - imm6}; } - const size_t esize = 8U << Common::HighestSetBit(imm6 >> 3); + const size_t esize = 8U << mcl::bit::highest_set_bit(imm6 >> 3); const size_t shift_amount = (esize * 2) - imm6; return {esize, shift_amount}; } else { @@ -50,18 +52,18 @@ std::pair ElementSizeAndShiftAmount(bool right_shift, bool L, si return {64, imm6}; } - const size_t esize = 8U << Common::HighestSetBit(imm6 >> 3); + const size_t esize = 8U << mcl::bit::highest_set_bit(imm6 >> 3); const size_t shift_amount = imm6 - esize; return {esize, shift_amount}; } } bool ShiftRight(TranslatorVisitor& v, bool U, bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm, Accumulating accumulate, Rounding rounding) { - if (!L && Common::Bits<3, 5>(imm6) == 0) { + if (!L && mcl::bit::get_bits<3, 5>(imm6) == 0) { return v.DecodeError(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return v.UndefinedInstruction(); } @@ -88,11 +90,11 @@ bool ShiftRight(TranslatorVisitor& v, bool U, bool D, size_t imm6, size_t Vd, bo } bool ShiftRightNarrowing(TranslatorVisitor& v, bool D, size_t imm6, size_t Vd, bool M, size_t Vm, Rounding rounding, Narrowing narrowing, Signedness signedness) { - if (Common::Bits<3, 5>(imm6) == 0) { + if (mcl::bit::get_bits<3, 5>(imm6) == 0) { return v.DecodeError(); } - if (Common::Bit<0>(Vm)) { + if (mcl::bit::get_bit<0>(Vm)) { return v.UndefinedInstruction(); } @@ -158,16 +160,16 @@ bool TranslatorVisitor::asimd_VRSRA(bool U, bool D, size_t imm6, size_t Vd, bool } bool TranslatorVisitor::asimd_VSRI(bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm) { - if (!L && Common::Bits<3, 5>(imm6) == 0) { + if (!L && mcl::bit::get_bits<3, 5>(imm6) == 0) { return DecodeError(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } const auto [esize, shift_amount] = ElementSizeAndShiftAmount(true, L, imm6); - const u64 mask = shift_amount == esize ? 0 : Common::Ones(esize) >> shift_amount; + const u64 mask = shift_amount == esize ? 0 : mcl::bit::ones(esize) >> shift_amount; const auto d = ToVector(Q, Vd, D); const auto m = ToVector(Q, Vm, M); @@ -184,16 +186,16 @@ bool TranslatorVisitor::asimd_VSRI(bool D, size_t imm6, size_t Vd, bool L, bool } bool TranslatorVisitor::asimd_VSLI(bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm) { - if (!L && Common::Bits<3, 5>(imm6) == 0) { + if (!L && mcl::bit::get_bits<3, 5>(imm6) == 0) { return DecodeError(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } const auto [esize, shift_amount] = ElementSizeAndShiftAmount(false, L, imm6); - const u64 mask = Common::Ones(esize) << shift_amount; + const u64 mask = mcl::bit::ones(esize) << shift_amount; const auto d = ToVector(Q, Vd, D); const auto m = ToVector(Q, Vm, M); @@ -210,11 +212,11 @@ bool TranslatorVisitor::asimd_VSLI(bool D, size_t imm6, size_t Vd, bool L, bool } bool TranslatorVisitor::asimd_VQSHL(bool U, bool D, size_t imm6, size_t Vd, bool op, bool L, bool Q, bool M, size_t Vm) { - if (!L && Common::Bits<3, 5>(imm6) == 0) { + if (!L && mcl::bit::get_bits<3, 5>(imm6) == 0) { return DecodeError(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -248,11 +250,11 @@ bool TranslatorVisitor::asimd_VQSHL(bool U, bool D, size_t imm6, size_t Vd, bool } bool TranslatorVisitor::asimd_VSHL(bool D, size_t imm6, size_t Vd, bool L, bool Q, bool M, size_t Vm) { - if (!L && Common::Bits<3, 5>(imm6) == 0) { + if (!L && mcl::bit::get_bits<3, 5>(imm6) == 0) { return DecodeError(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } @@ -298,11 +300,11 @@ bool TranslatorVisitor::asimd_VQRSHRN(bool U, bool D, size_t imm6, size_t Vd, bo } bool TranslatorVisitor::asimd_VSHLL(bool U, bool D, size_t imm6, size_t Vd, bool M, size_t Vm) { - if (Common::Bits<3, 5>(imm6) == 0) { + if (mcl::bit::get_bits<3, 5>(imm6) == 0) { return DecodeError(); } - if (Common::Bit<0>(Vd)) { + if (mcl::bit::get_bit<0>(Vd)) { return UndefinedInstruction(); } @@ -320,15 +322,15 @@ bool TranslatorVisitor::asimd_VSHLL(bool U, bool D, size_t imm6, size_t Vd, bool } bool TranslatorVisitor::asimd_VCVT_fixed(bool U, bool D, size_t imm6, size_t Vd, bool to_fixed, bool Q, bool M, size_t Vm) { - if (Common::Bits<3, 5>(imm6) == 0) { + if (mcl::bit::get_bits<3, 5>(imm6) == 0) { return DecodeError(); } - if (Q && (Common::Bit<0>(Vd) || Common::Bit<0>(Vm))) { + if (Q && (mcl::bit::get_bit<0>(Vd) || mcl::bit::get_bit<0>(Vm))) { return UndefinedInstruction(); } - if (!Common::Bit<5>(imm6)) { + if (!mcl::bit::get_bit<5>(imm6)) { return UndefinedInstruction(); } diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/load_store.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/load_store.cpp index 77df6a4d1..7ef8b7e89 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/load_store.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/load_store.cpp @@ -3,6 +3,9 @@ * SPDX-License-Identifier: 0BSD */ +#include +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -771,15 +774,15 @@ bool TranslatorVisitor::arm_STRH_reg(Cond cond, bool P, bool U, bool W, Reg n, R static bool LDMHelper(A32::IREmitter& ir, bool W, Reg n, RegList list, IR::U32 start_address, IR::U32 writeback_address) { auto address = start_address; for (size_t i = 0; i <= 14; i++) { - if (Common::Bit(i, list)) { + if (mcl::bit::get_bit(i, list)) { ir.SetRegister(static_cast(i), ir.ReadMemory32(address, IR::AccType::ATOMIC)); address = ir.Add(address, ir.Imm32(4)); } } - if (W && !Common::Bit(RegNumber(n), list)) { + if (W && !mcl::bit::get_bit(RegNumber(n), list)) { ir.SetRegister(n, writeback_address); } - if (Common::Bit<15>(list)) { + if (mcl::bit::get_bit<15>(list)) { ir.LoadWritePC(ir.ReadMemory32(address, IR::AccType::ATOMIC)); if (n == Reg::R13) ir.SetTerm(IR::Term::PopRSBHint{}); @@ -792,10 +795,10 @@ static bool LDMHelper(A32::IREmitter& ir, bool W, Reg n, RegList list, IR::U32 s // LDM {!}, bool TranslatorVisitor::arm_LDM(Cond cond, bool W, Reg n, RegList list) { - if (n == Reg::PC || Common::BitCount(list) < 1) { + if (n == Reg::PC || mcl::bit::count_ones(list) < 1) { return UnpredictableInstruction(); } - if (W && Common::Bit(static_cast(n), list)) { + if (W && mcl::bit::get_bit(static_cast(n), list)) { return UnpredictableInstruction(); } @@ -804,16 +807,16 @@ bool TranslatorVisitor::arm_LDM(Cond cond, bool W, Reg n, RegList list) { } const auto start_address = ir.GetRegister(n); - const auto writeback_address = ir.Add(start_address, ir.Imm32(u32(Common::BitCount(list) * 4))); + const auto writeback_address = ir.Add(start_address, ir.Imm32(u32(mcl::bit::count_ones(list) * 4))); return LDMHelper(ir, W, n, list, start_address, writeback_address); } // LDMDA {!}, bool TranslatorVisitor::arm_LDMDA(Cond cond, bool W, Reg n, RegList list) { - if (n == Reg::PC || Common::BitCount(list) < 1) { + if (n == Reg::PC || mcl::bit::count_ones(list) < 1) { return UnpredictableInstruction(); } - if (W && Common::Bit(static_cast(n), list)) { + if (W && mcl::bit::get_bit(static_cast(n), list)) { return UnpredictableInstruction(); } @@ -821,17 +824,17 @@ bool TranslatorVisitor::arm_LDMDA(Cond cond, bool W, Reg n, RegList list) { return true; } - const auto start_address = ir.Sub(ir.GetRegister(n), ir.Imm32(u32(4 * Common::BitCount(list) - 4))); + const auto start_address = ir.Sub(ir.GetRegister(n), ir.Imm32(u32(4 * mcl::bit::count_ones(list) - 4))); const auto writeback_address = ir.Sub(start_address, ir.Imm32(4)); return LDMHelper(ir, W, n, list, start_address, writeback_address); } // LDMDB {!}, bool TranslatorVisitor::arm_LDMDB(Cond cond, bool W, Reg n, RegList list) { - if (n == Reg::PC || Common::BitCount(list) < 1) { + if (n == Reg::PC || mcl::bit::count_ones(list) < 1) { return UnpredictableInstruction(); } - if (W && Common::Bit(static_cast(n), list)) { + if (W && mcl::bit::get_bit(static_cast(n), list)) { return UnpredictableInstruction(); } @@ -839,17 +842,17 @@ bool TranslatorVisitor::arm_LDMDB(Cond cond, bool W, Reg n, RegList list) { return true; } - const auto start_address = ir.Sub(ir.GetRegister(n), ir.Imm32(u32(4 * Common::BitCount(list)))); + const auto start_address = ir.Sub(ir.GetRegister(n), ir.Imm32(u32(4 * mcl::bit::count_ones(list)))); const auto writeback_address = start_address; return LDMHelper(ir, W, n, list, start_address, writeback_address); } // LDMIB {!}, bool TranslatorVisitor::arm_LDMIB(Cond cond, bool W, Reg n, RegList list) { - if (n == Reg::PC || Common::BitCount(list) < 1) { + if (n == Reg::PC || mcl::bit::count_ones(list) < 1) { return UnpredictableInstruction(); } - if (W && Common::Bit(static_cast(n), list)) { + if (W && mcl::bit::get_bit(static_cast(n), list)) { return UnpredictableInstruction(); } @@ -858,7 +861,7 @@ bool TranslatorVisitor::arm_LDMIB(Cond cond, bool W, Reg n, RegList list) { } const auto start_address = ir.Add(ir.GetRegister(n), ir.Imm32(4)); - const auto writeback_address = ir.Add(ir.GetRegister(n), ir.Imm32(u32(4 * Common::BitCount(list)))); + const auto writeback_address = ir.Add(ir.GetRegister(n), ir.Imm32(u32(4 * mcl::bit::count_ones(list)))); return LDMHelper(ir, W, n, list, start_address, writeback_address); } @@ -873,7 +876,7 @@ bool TranslatorVisitor::arm_LDM_eret() { static bool STMHelper(A32::IREmitter& ir, bool W, Reg n, RegList list, IR::U32 start_address, IR::U32 writeback_address) { auto address = start_address; for (size_t i = 0; i <= 14; i++) { - if (Common::Bit(i, list)) { + if (mcl::bit::get_bit(i, list)) { ir.WriteMemory32(address, ir.GetRegister(static_cast(i)), IR::AccType::ATOMIC); address = ir.Add(address, ir.Imm32(4)); } @@ -881,7 +884,7 @@ static bool STMHelper(A32::IREmitter& ir, bool W, Reg n, RegList list, IR::U32 s if (W) { ir.SetRegister(n, writeback_address); } - if (Common::Bit<15>(list)) { + if (mcl::bit::get_bit<15>(list)) { ir.WriteMemory32(address, ir.Imm32(ir.PC()), IR::AccType::ATOMIC); } return true; @@ -889,7 +892,7 @@ static bool STMHelper(A32::IREmitter& ir, bool W, Reg n, RegList list, IR::U32 s // STM {!}, bool TranslatorVisitor::arm_STM(Cond cond, bool W, Reg n, RegList list) { - if (n == Reg::PC || Common::BitCount(list) < 1) { + if (n == Reg::PC || mcl::bit::count_ones(list) < 1) { return UnpredictableInstruction(); } @@ -898,13 +901,13 @@ bool TranslatorVisitor::arm_STM(Cond cond, bool W, Reg n, RegList list) { } const auto start_address = ir.GetRegister(n); - const auto writeback_address = ir.Add(start_address, ir.Imm32(u32(Common::BitCount(list) * 4))); + const auto writeback_address = ir.Add(start_address, ir.Imm32(u32(mcl::bit::count_ones(list) * 4))); return STMHelper(ir, W, n, list, start_address, writeback_address); } // STMDA {!}, bool TranslatorVisitor::arm_STMDA(Cond cond, bool W, Reg n, RegList list) { - if (n == Reg::PC || Common::BitCount(list) < 1) { + if (n == Reg::PC || mcl::bit::count_ones(list) < 1) { return UnpredictableInstruction(); } @@ -912,14 +915,14 @@ bool TranslatorVisitor::arm_STMDA(Cond cond, bool W, Reg n, RegList list) { return true; } - const auto start_address = ir.Sub(ir.GetRegister(n), ir.Imm32(u32(4 * Common::BitCount(list) - 4))); + const auto start_address = ir.Sub(ir.GetRegister(n), ir.Imm32(u32(4 * mcl::bit::count_ones(list) - 4))); const auto writeback_address = ir.Sub(start_address, ir.Imm32(4)); return STMHelper(ir, W, n, list, start_address, writeback_address); } // STMDB {!}, bool TranslatorVisitor::arm_STMDB(Cond cond, bool W, Reg n, RegList list) { - if (n == Reg::PC || Common::BitCount(list) < 1) { + if (n == Reg::PC || mcl::bit::count_ones(list) < 1) { return UnpredictableInstruction(); } @@ -927,14 +930,14 @@ bool TranslatorVisitor::arm_STMDB(Cond cond, bool W, Reg n, RegList list) { return true; } - const auto start_address = ir.Sub(ir.GetRegister(n), ir.Imm32(u32(4 * Common::BitCount(list)))); + const auto start_address = ir.Sub(ir.GetRegister(n), ir.Imm32(u32(4 * mcl::bit::count_ones(list)))); const auto writeback_address = start_address; return STMHelper(ir, W, n, list, start_address, writeback_address); } // STMIB {!}, bool TranslatorVisitor::arm_STMIB(Cond cond, bool W, Reg n, RegList list) { - if (n == Reg::PC || Common::BitCount(list) < 1) { + if (n == Reg::PC || mcl::bit::count_ones(list) < 1) { return UnpredictableInstruction(); } @@ -943,7 +946,7 @@ bool TranslatorVisitor::arm_STMIB(Cond cond, bool W, Reg n, RegList list) { } const auto start_address = ir.Add(ir.GetRegister(n), ir.Imm32(4)); - const auto writeback_address = ir.Add(ir.GetRegister(n), ir.Imm32(u32(4 * Common::BitCount(list)))); + const auto writeback_address = ir.Add(ir.GetRegister(n), ir.Imm32(u32(4 * mcl::bit::count_ones(list)))); return STMHelper(ir, W, n, list, start_address, writeback_address); } diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/misc.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/misc.cpp index 8adab9ca8..ef54b6682 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/misc.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/misc.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -23,7 +24,7 @@ bool TranslatorVisitor::arm_BFC(Cond cond, Imm<5> msb, Reg d, Imm<5> lsb) { const u32 lsb_value = lsb.ZeroExtend(); const u32 msb_value = msb.ZeroExtend(); - const u32 mask = ~(Common::Ones(msb_value - lsb_value + 1) << lsb_value); + const u32 mask = ~(mcl::bit::ones(msb_value - lsb_value + 1) << lsb_value); const IR::U32 operand = ir.GetRegister(d); const IR::U32 result = ir.And(operand, ir.Imm32(mask)); @@ -46,7 +47,7 @@ bool TranslatorVisitor::arm_BFI(Cond cond, Imm<5> msb, Reg d, Imm<5> lsb, Reg n) const u32 lsb_value = lsb.ZeroExtend(); const u32 msb_value = msb.ZeroExtend(); - const u32 inclusion_mask = Common::Ones(msb_value - lsb_value + 1) << lsb_value; + const u32 inclusion_mask = mcl::bit::ones(msb_value - lsb_value + 1) << lsb_value; const u32 exclusion_mask = ~inclusion_mask; const IR::U32 operand1 = ir.And(ir.GetRegister(d), ir.Imm32(exclusion_mask)); const IR::U32 operand2 = ir.And(ir.LogicalShiftLeft(ir.GetRegister(n), ir.Imm8(u8(lsb_value))), ir.Imm32(inclusion_mask)); @@ -112,7 +113,7 @@ bool TranslatorVisitor::arm_SBFX(Cond cond, Imm<5> widthm1, Reg d, Imm<5> lsb, R const u32 lsb_value = lsb.ZeroExtend(); const u32 widthm1_value = widthm1.ZeroExtend(); const u32 msb = lsb_value + widthm1_value; - if (msb >= Common::BitSize()) { + if (msb >= mcl::bitsizeof) { return UnpredictableInstruction(); } @@ -120,7 +121,7 @@ bool TranslatorVisitor::arm_SBFX(Cond cond, Imm<5> widthm1, Reg d, Imm<5> lsb, R return true; } - constexpr size_t max_width = Common::BitSize(); + constexpr size_t max_width = mcl::bitsizeof; const u32 width = widthm1_value + 1; const u8 left_shift_amount = static_cast(max_width - width - lsb_value); const u8 right_shift_amount = static_cast(max_width - width); @@ -159,7 +160,7 @@ bool TranslatorVisitor::arm_UBFX(Cond cond, Imm<5> widthm1, Reg d, Imm<5> lsb, R const u32 lsb_value = lsb.ZeroExtend(); const u32 widthm1_value = widthm1.ZeroExtend(); const u32 msb = lsb_value + widthm1_value; - if (msb >= Common::BitSize()) { + if (msb >= mcl::bitsizeof) { return UnpredictableInstruction(); } @@ -168,7 +169,7 @@ bool TranslatorVisitor::arm_UBFX(Cond cond, Imm<5> widthm1, Reg d, Imm<5> lsb, R } const IR::U32 operand = ir.GetRegister(n); - const IR::U32 mask = ir.Imm32(Common::Ones(widthm1_value + 1)); + const IR::U32 mask = ir.Imm32(mcl::bit::ones(widthm1_value + 1)); const IR::U32 result = ir.And(ir.LogicalShiftRight(operand, ir.Imm8(u8(lsb_value))), mask); ir.SetRegister(d, result); diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/status_register_access.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/status_register_access.cpp index d2df86e80..60110df89 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/status_register_access.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/status_register_access.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -29,16 +30,16 @@ bool TranslatorVisitor::arm_MRS(Cond cond, Reg d) { } // MSR , # -bool TranslatorVisitor::arm_MSR_imm(Cond cond, int mask, int rotate, Imm<8> imm8) { +bool TranslatorVisitor::arm_MSR_imm(Cond cond, unsigned mask, int rotate, Imm<8> imm8) { ASSERT_MSG(mask != 0, "Decode error"); if (!ArmConditionPassed(cond)) { return true; } - const bool write_nzcvq = Common::Bit<3>(mask); - const bool write_g = Common::Bit<2>(mask); - const bool write_e = Common::Bit<1>(mask); + const bool write_nzcvq = mcl::bit::get_bit<3>(mask); + const bool write_g = mcl::bit::get_bit<2>(mask); + const bool write_e = mcl::bit::get_bit<1>(mask); const u32 imm32 = ArmExpandImm(rotate, imm8); if (write_nzcvq) { @@ -61,7 +62,7 @@ bool TranslatorVisitor::arm_MSR_imm(Cond cond, int mask, int rotate, Imm<8> imm8 } // MSR , -bool TranslatorVisitor::arm_MSR_reg(Cond cond, int mask, Reg n) { +bool TranslatorVisitor::arm_MSR_reg(Cond cond, unsigned mask, Reg n) { if (mask == 0) { return UnpredictableInstruction(); } @@ -74,9 +75,9 @@ bool TranslatorVisitor::arm_MSR_reg(Cond cond, int mask, Reg n) { return true; } - const bool write_nzcvq = Common::Bit<3>(mask); - const bool write_g = Common::Bit<2>(mask); - const bool write_e = Common::Bit<1>(mask); + const bool write_nzcvq = mcl::bit::get_bit<3>(mask); + const bool write_g = mcl::bit::get_bit<2>(mask); + const bool write_e = mcl::bit::get_bit<1>(mask); const auto value = ir.GetRegister(n); if (!write_e) { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb16.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb16.cpp index dbaf5f08f..0c531e9f2 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb16.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb16.cpp @@ -3,6 +3,8 @@ * SPDX-License-Identifier: 0BSD */ +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" #include "dynarmic/interface/A32/config.h" @@ -705,7 +707,7 @@ bool TranslatorVisitor::thumb16_NOP() { // IT{{{}}} bool TranslatorVisitor::thumb16_IT(Imm<8> imm8) { ASSERT_MSG((imm8.Bits<0, 3>() != 0b0000), "Decode Error"); - if (imm8.Bits<4, 7>() == 0b1111 || (imm8.Bits<4, 7>() == 0b1110 && Common::BitCount(imm8.Bits<0, 3>()) != 1)) { + if (imm8.Bits<4, 7>() == 0b1111 || (imm8.Bits<4, 7>() == 0b1110 && mcl::bit::count_ones(imm8.Bits<0, 3>()) != 1)) { return UnpredictableInstruction(); } if (ir.current_location.IT().IsInITBlock()) { @@ -755,15 +757,15 @@ bool TranslatorVisitor::thumb16_PUSH(bool M, RegList reg_list) { if (M) { reg_list |= 1 << 14; } - if (Common::BitCount(reg_list) < 1) { + if (mcl::bit::count_ones(reg_list) < 1) { return UnpredictableInstruction(); } - const u32 num_bytes_to_push = static_cast(4 * Common::BitCount(reg_list)); + const u32 num_bytes_to_push = static_cast(4 * mcl::bit::count_ones(reg_list)); const auto final_address = ir.Sub(ir.GetRegister(Reg::SP), ir.Imm32(num_bytes_to_push)); auto address = final_address; for (size_t i = 0; i < 16; i++) { - if (Common::Bit(i, reg_list)) { + if (mcl::bit::get_bit(i, reg_list)) { // TODO: Deal with alignment const auto Ri = ir.GetRegister(static_cast(i)); ir.WriteMemory32(address, Ri, IR::AccType::ATOMIC); @@ -781,13 +783,13 @@ bool TranslatorVisitor::thumb16_POP(bool P, RegList reg_list) { if (P) { reg_list |= 1 << 15; } - if (Common::BitCount(reg_list) < 1) { + if (mcl::bit::count_ones(reg_list) < 1) { return UnpredictableInstruction(); } auto address = ir.GetRegister(Reg::SP); for (size_t i = 0; i < 15; i++) { - if (Common::Bit(i, reg_list)) { + if (mcl::bit::get_bit(i, reg_list)) { // TODO: Deal with alignment const auto data = ir.ReadMemory32(address, IR::AccType::ATOMIC); ir.SetRegister(static_cast(i), data); @@ -795,7 +797,7 @@ bool TranslatorVisitor::thumb16_POP(bool P, RegList reg_list) { } } - if (Common::Bit<15>(reg_list)) { + if (mcl::bit::get_bit<15>(reg_list)) { // TODO(optimization): Possible location for an RSB pop. const auto data = ir.ReadMemory32(address, IR::AccType::ATOMIC); ir.UpdateUpperLocationDescriptor(); @@ -868,16 +870,16 @@ bool TranslatorVisitor::thumb16_BKPT(Imm<8> /*imm8*/) { // STM !, bool TranslatorVisitor::thumb16_STMIA(Reg n, RegList reg_list) { - if (Common::BitCount(reg_list) == 0) { + if (mcl::bit::count_ones(reg_list) == 0) { return UnpredictableInstruction(); } - if (Common::Bit(static_cast(n), reg_list) && n != static_cast(Common::LowestSetBit(reg_list))) { + if (mcl::bit::get_bit(static_cast(n), reg_list) && n != static_cast(mcl::bit::lowest_set_bit(reg_list))) { return UnpredictableInstruction(); } auto address = ir.GetRegister(n); for (size_t i = 0; i < 8; i++) { - if (Common::Bit(i, reg_list)) { + if (mcl::bit::get_bit(i, reg_list)) { const auto Ri = ir.GetRegister(static_cast(i)); ir.WriteMemory32(address, Ri, IR::AccType::ATOMIC); address = ir.Add(address, ir.Imm32(4)); @@ -890,15 +892,15 @@ bool TranslatorVisitor::thumb16_STMIA(Reg n, RegList reg_list) { // LDM !, bool TranslatorVisitor::thumb16_LDMIA(Reg n, RegList reg_list) { - if (Common::BitCount(reg_list) == 0) { + if (mcl::bit::count_ones(reg_list) == 0) { return UnpredictableInstruction(); } - const bool write_back = !Common::Bit(static_cast(n), reg_list); + const bool write_back = !mcl::bit::get_bit(static_cast(n), reg_list); auto address = ir.GetRegister(n); for (size_t i = 0; i < 8; i++) { - if (Common::Bit(i, reg_list)) { + if (mcl::bit::get_bit(i, reg_list)) { const auto data = ir.ReadMemory32(address, IR::AccType::ATOMIC); ir.SetRegister(static_cast(i), data); address = ir.Add(address, ir.Imm32(4)); diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp index 358b7d7b6..1a6767dbe 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp @@ -3,8 +3,9 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -101,7 +102,7 @@ bool TranslatorVisitor::thumb32_BFC(Imm<3> imm3, Reg d, Imm<2> imm2, Imm<5> msb) return UnpredictableInstruction(); } - const u32 mask = ~(Common::Ones(msbit - lsbit + 1) << lsbit); + const u32 mask = ~(mcl::bit::ones(msbit - lsbit + 1) << lsbit); const auto reg_d = ir.GetRegister(d); const auto result = ir.And(reg_d, ir.Imm32(mask)); @@ -121,7 +122,7 @@ bool TranslatorVisitor::thumb32_BFI(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm< return UnpredictableInstruction(); } - const u32 inclusion_mask = Common::Ones(msbit - lsbit + 1) << lsbit; + const u32 inclusion_mask = mcl::bit::ones(msbit - lsbit + 1) << lsbit; const u32 exclusion_mask = ~inclusion_mask; const IR::U32 operand1 = ir.And(ir.GetRegister(d), ir.Imm32(exclusion_mask)); const IR::U32 operand2 = ir.And(ir.LogicalShiftLeft(ir.GetRegister(n), ir.Imm8(u8(lsbit))), ir.Imm32(inclusion_mask)); @@ -163,11 +164,11 @@ bool TranslatorVisitor::thumb32_SBFX(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm const u32 lsbit = concatenate(imm3, imm2).ZeroExtend(); const u32 widthm1_value = widthm1.ZeroExtend(); const u32 msb = lsbit + widthm1_value; - if (msb >= Common::BitSize()) { + if (msb >= mcl::bitsizeof) { return UnpredictableInstruction(); } - constexpr size_t max_width = Common::BitSize(); + constexpr size_t max_width = mcl::bitsizeof; const auto width = widthm1_value + 1; const auto left_shift_amount = static_cast(max_width - width - lsbit); const auto right_shift_amount = static_cast(max_width - width); @@ -208,12 +209,12 @@ bool TranslatorVisitor::thumb32_UBFX(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm const u32 lsbit = concatenate(imm3, imm2).ZeroExtend(); const u32 widthm1_value = widthm1.ZeroExtend(); const u32 msb = lsbit + widthm1_value; - if (msb >= Common::BitSize()) { + if (msb >= mcl::bitsizeof) { return UnpredictableInstruction(); } const auto operand = ir.GetRegister(n); - const auto mask = ir.Imm32(Common::Ones(widthm1_value + 1)); + const auto mask = ir.Imm32(mcl::bit::ones(widthm1_value + 1)); const auto result = ir.And(ir.LogicalShiftRight(operand, ir.Imm8(u8(lsbit))), mask); ir.SetRegister(d, result); diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_load_store_dual.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_load_store_dual.cpp index 374cc906f..17d4285c2 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_load_store_dual.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_load_store_dual.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_load_store_multiple.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_load_store_multiple.cpp index c4ff07664..2bc782b97 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_load_store_multiple.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/thumb32_load_store_multiple.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" namespace Dynarmic::A32 { @@ -14,15 +15,15 @@ static bool ITBlockCheck(const A32::IREmitter& ir) { static bool LDMHelper(A32::IREmitter& ir, bool W, Reg n, u32 list, const IR::U32& start_address, const IR::U32& writeback_address) { auto address = start_address; for (size_t i = 0; i <= 14; i++) { - if (Common::Bit(i, list)) { + if (mcl::bit::get_bit(i, list)) { ir.SetRegister(static_cast(i), ir.ReadMemory32(address, IR::AccType::ATOMIC)); address = ir.Add(address, ir.Imm32(4)); } } - if (W && !Common::Bit(RegNumber(n), list)) { + if (W && !mcl::bit::get_bit(RegNumber(n), list)) { ir.SetRegister(n, writeback_address); } - if (Common::Bit<15>(list)) { + if (mcl::bit::get_bit<15>(list)) { ir.UpdateUpperLocationDescriptor(); ir.LoadWritePC(ir.ReadMemory32(address, IR::AccType::ATOMIC)); if (n == Reg::R13) { @@ -38,7 +39,7 @@ static bool LDMHelper(A32::IREmitter& ir, bool W, Reg n, u32 list, const IR::U32 static bool STMHelper(A32::IREmitter& ir, bool W, Reg n, u32 list, const IR::U32& start_address, const IR::U32& writeback_address) { auto address = start_address; for (size_t i = 0; i <= 14; i++) { - if (Common::Bit(i, list)) { + if (mcl::bit::get_bit(i, list)) { ir.WriteMemory32(address, ir.GetRegister(static_cast(i)), IR::AccType::ATOMIC); address = ir.Add(address, ir.Imm32(4)); } @@ -51,7 +52,7 @@ static bool STMHelper(A32::IREmitter& ir, bool W, Reg n, u32 list, const IR::U32 bool TranslatorVisitor::thumb32_LDMDB(bool W, Reg n, Imm<16> reg_list) { const auto regs_imm = reg_list.ZeroExtend(); - const auto num_regs = static_cast(Common::BitCount(regs_imm)); + const auto num_regs = static_cast(mcl::bit::count_ones(regs_imm)); if (n == Reg::PC || num_regs < 2) { return UnpredictableInstruction(); @@ -59,7 +60,7 @@ bool TranslatorVisitor::thumb32_LDMDB(bool W, Reg n, Imm<16> reg_list) { if (reg_list.Bit<15>() && reg_list.Bit<14>()) { return UnpredictableInstruction(); } - if (W && Common::Bit(static_cast(n), regs_imm)) { + if (W && mcl::bit::get_bit(static_cast(n), regs_imm)) { return UnpredictableInstruction(); } if (reg_list.Bit<13>()) { @@ -76,7 +77,7 @@ bool TranslatorVisitor::thumb32_LDMDB(bool W, Reg n, Imm<16> reg_list) { bool TranslatorVisitor::thumb32_LDMIA(bool W, Reg n, Imm<16> reg_list) { const auto regs_imm = reg_list.ZeroExtend(); - const auto num_regs = static_cast(Common::BitCount(regs_imm)); + const auto num_regs = static_cast(mcl::bit::count_ones(regs_imm)); if (n == Reg::PC || num_regs < 2) { return UnpredictableInstruction(); @@ -84,7 +85,7 @@ bool TranslatorVisitor::thumb32_LDMIA(bool W, Reg n, Imm<16> reg_list) { if (reg_list.Bit<15>() && reg_list.Bit<14>()) { return UnpredictableInstruction(); } - if (W && Common::Bit(static_cast(n), regs_imm)) { + if (W && mcl::bit::get_bit(static_cast(n), regs_imm)) { return UnpredictableInstruction(); } if (reg_list.Bit<13>()) { @@ -109,12 +110,12 @@ bool TranslatorVisitor::thumb32_PUSH(Imm<15> reg_list) { bool TranslatorVisitor::thumb32_STMIA(bool W, Reg n, Imm<15> reg_list) { const auto regs_imm = reg_list.ZeroExtend(); - const auto num_regs = static_cast(Common::BitCount(regs_imm)); + const auto num_regs = static_cast(mcl::bit::count_ones(regs_imm)); if (n == Reg::PC || num_regs < 2) { return UnpredictableInstruction(); } - if (W && Common::Bit(static_cast(n), regs_imm)) { + if (W && mcl::bit::get_bit(static_cast(n), regs_imm)) { return UnpredictableInstruction(); } if (reg_list.Bit<13>()) { @@ -128,12 +129,12 @@ bool TranslatorVisitor::thumb32_STMIA(bool W, Reg n, Imm<15> reg_list) { bool TranslatorVisitor::thumb32_STMDB(bool W, Reg n, Imm<15> reg_list) { const auto regs_imm = reg_list.ZeroExtend(); - const auto num_regs = static_cast(Common::BitCount(regs_imm)); + const auto num_regs = static_cast(mcl::bit::count_ones(regs_imm)); if (n == Reg::PC || num_regs < 2) { return UnpredictableInstruction(); } - if (W && Common::Bit(static_cast(n), regs_imm)) { + if (W && mcl::bit::get_bit(static_cast(n), regs_imm)) { return UnpredictableInstruction(); } if (reg_list.Bit<13>()) { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/vfp.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/vfp.cpp index f68c8f382..2e7734caf 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/vfp.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/impl/vfp.cpp @@ -661,7 +661,7 @@ bool TranslatorVisitor::vfp_VDUP(Cond cond, Imm<1> B, bool Q, size_t Vd, Reg t, return true; } - if (Q && Common::Bit<0>(Vd)) { + if (Q && mcl::bit::get_bit<0>(Vd)) { return UndefinedInstruction(); } if (t == Reg::R15) { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp index 384fa6779..95c704dad 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_arm.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/assert.h" +#include + #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/frontend/A32/a32_types.h" #include "dynarmic/frontend/A32/decoder/arm.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_callbacks.h b/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_callbacks.h index eeffd9d4e..8e0bba3ac 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_callbacks.h +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_callbacks.h @@ -4,7 +4,7 @@ */ #pragma once -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::A32 { diff --git a/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp b/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp index 08bbbadc9..9716f11f2 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A32/translate/translate_thumb.cpp @@ -5,8 +5,10 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include +#include + #include "dynarmic/frontend/A32/a32_ir_emitter.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/frontend/A32/decoder/asimd.h" @@ -69,7 +71,7 @@ std::tuple ReadThumbInstruction(u32 arm_pc, TranslateCallbac // Convert from thumb ASIMD format to ARM ASIMD format. u32 ConvertASIMDInstruction(u32 thumb_instruction) { if ((thumb_instruction & 0xEF000000) == 0xEF000000) { - const bool U = Common::Bit<28>(thumb_instruction); + const bool U = mcl::bit::get_bit<28>(thumb_instruction); return 0xF2000000 | (U << 24) | (thumb_instruction & 0x00FFFFFF); } @@ -167,7 +169,7 @@ bool TranslateSingleThumbInstruction(IR::Block& block, LocationDescriptor descri should_continue = visitor.thumb16_UDF(); } } else { - thumb_instruction = Common::SwapHalves32(thumb_instruction); + thumb_instruction = mcl::bit::swap_halves_32(thumb_instruction); if (MaybeVFPOrASIMDInstruction(thumb_instruction)) { if (const auto vfp_decoder = DecodeVFP(thumb_instruction)) { should_continue = vfp_decoder->get().call(visitor, thumb_instruction); diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.cpp b/externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.cpp index e4ea1f5e6..d0c038b42 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.cpp @@ -5,7 +5,8 @@ #include "dynarmic/frontend/A64/a64_ir_emitter.h" -#include "dynarmic/common/assert.h" +#include + #include "dynarmic/ir/opcodes.h" namespace Dynarmic::A64 { diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.h b/externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.h index 56ad7673e..7bb71bead 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.h +++ b/externals/dynarmic/src/dynarmic/frontend/A64/a64_ir_emitter.h @@ -7,7 +7,8 @@ #include -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/frontend/A64/a64_location_descriptor.h" #include "dynarmic/frontend/A64/a64_types.h" #include "dynarmic/interface/A64/config.h" diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/a64_location_descriptor.h b/externals/dynarmic/src/dynarmic/frontend/A64/a64_location_descriptor.h index 322cea3ba..3301616fa 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/a64_location_descriptor.h +++ b/externals/dynarmic/src/dynarmic/frontend/A64/a64_location_descriptor.h @@ -9,8 +9,9 @@ #include #include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/ir/location_descriptor.h" @@ -24,7 +25,7 @@ namespace Dynarmic::A64 { class LocationDescriptor { public: static constexpr size_t pc_bit_count = 56; - static constexpr u64 pc_mask = Common::Ones(pc_bit_count); + static constexpr u64 pc_mask = mcl::bit::ones(pc_bit_count); static constexpr u32 fpcr_mask = 0x07C8'0000; static constexpr size_t fpcr_shift = 37; static constexpr size_t single_stepping_bit = 57; @@ -36,9 +37,9 @@ public: explicit LocationDescriptor(const IR::LocationDescriptor& o) : pc(o.Value() & pc_mask) , fpcr((o.Value() >> fpcr_shift) & fpcr_mask) - , single_stepping(Common::Bit(o.Value())) {} + , single_stepping(mcl::bit::get_bit(o.Value())) {} - u64 PC() const { return Common::SignExtend(pc); } + u64 PC() const { return mcl::bit::sign_extend(pc); } FP::FPCR FPCR() const { return fpcr; } bool SingleStepping() const { return single_stepping; } diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/a64_types.h b/externals/dynarmic/src/dynarmic/frontend/A64/a64_types.h index 6e12754c1..3bcb84aaf 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/a64_types.h +++ b/externals/dynarmic/src/dynarmic/frontend/A64/a64_types.h @@ -8,8 +8,9 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/ir/cond.h" namespace Dynarmic::A64 { diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/decoder/a64.h b/externals/dynarmic/src/dynarmic/frontend/A64/decoder/a64.h index 7da60e301..d6f447e57 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/decoder/a64.h +++ b/externals/dynarmic/src/dynarmic/frontend/A64/decoder/a64.h @@ -12,8 +12,9 @@ #include #include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/frontend/decoder/decoder_detail.h" #include "dynarmic/frontend/decoder/matcher.h" @@ -41,7 +42,7 @@ DecodeTable GetDecodeTable() { std::stable_sort(list.begin(), list.end(), [](const auto& matcher1, const auto& matcher2) { // If a matcher has more bits in its mask it is more specific, so it should come first. - return Common::BitCount(matcher1.GetMask()) > Common::BitCount(matcher2.GetMask()); + return mcl::bit::count_ones(matcher1.GetMask()) > mcl::bit::count_ones(matcher2.GetMask()); }); // Exceptions to the above rule of thumb. diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.h b/externals/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.h index 9ab6d2648..d61f5e86b 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.h +++ b/externals/dynarmic/src/dynarmic/frontend/A64/translate/a64_translate.h @@ -6,7 +6,7 @@ #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic { diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/impl.cpp b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/impl.cpp index 24607ef74..d0fd93867 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/impl.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/impl.cpp @@ -5,7 +5,10 @@ #include "dynarmic/frontend/A64/translate/impl/impl.h" -#include "dynarmic/common/bit_util.h" +#include +#include +#include + #include "dynarmic/ir/terminal.h" namespace Dynarmic::A64 { @@ -39,12 +42,12 @@ bool TranslatorVisitor::RaiseException(Exception exception) { } std::optional TranslatorVisitor::DecodeBitMasks(bool immN, Imm<6> imms, Imm<6> immr, bool immediate) { - const int len = Common::HighestSetBit((immN ? 1 << 6 : 0) | (imms.ZeroExtend() ^ 0b111111)); + const int len = mcl::bit::highest_set_bit((immN ? 1 << 6 : 0) | (imms.ZeroExtend() ^ 0b111111)); if (len < 1) { return std::nullopt; } - const size_t levels = Common::Ones(len); + const size_t levels = mcl::bit::ones(len); if (immediate && (imms.ZeroExtend() & levels) == levels) { return std::nullopt; } @@ -54,10 +57,10 @@ std::optional TranslatorVisitor::DecodeBitMasks(boo const u64 d = u64(S - R) & levels; const size_t esize = size_t{1} << len; - const u64 welem = Common::Ones(S + 1); - const u64 telem = Common::Ones(d + 1); - const u64 wmask = Common::RotateRight(Common::Replicate(welem, esize), R); - const u64 tmask = Common::Replicate(telem, esize); + const u64 welem = mcl::bit::ones(S + 1); + const u64 telem = mcl::bit::ones(d + 1); + const u64 wmask = mcl::bit::rotate_right(mcl::bit::replicate_element(esize, welem), R); + const u64 tmask = mcl::bit::replicate_element(esize, telem); return BitMasks{wmask, tmask}; } diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_copy.cpp b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_copy.cpp index 38697bb50..b33bc8f5a 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_copy.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_copy.cpp @@ -3,13 +3,14 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { bool TranslatorVisitor::DUP_elt_1(Imm<5> imm5, Vec Vn, Vec Vd) { - const size_t size = Common::LowestSetBit(imm5.ZeroExtend()); + const size_t size = mcl::bit::lowest_set_bit(imm5.ZeroExtend()); if (size > 3) { return ReservedValue(); } @@ -26,7 +27,7 @@ bool TranslatorVisitor::DUP_elt_1(Imm<5> imm5, Vec Vn, Vec Vd) { } bool TranslatorVisitor::DUP_elt_2(bool Q, Imm<5> imm5, Vec Vn, Vec Vd) { - const size_t size = Common::LowestSetBit(imm5.ZeroExtend()); + const size_t size = mcl::bit::lowest_set_bit(imm5.ZeroExtend()); if (size > 3) { return ReservedValue(); } @@ -47,7 +48,7 @@ bool TranslatorVisitor::DUP_elt_2(bool Q, Imm<5> imm5, Vec Vn, Vec Vd) { } bool TranslatorVisitor::DUP_gen(bool Q, Imm<5> imm5, Reg Rn, Vec Vd) { - const size_t size = Common::LowestSetBit(imm5.ZeroExtend()); + const size_t size = mcl::bit::lowest_set_bit(imm5.ZeroExtend()); if (size > 3) { return ReservedValue(); } @@ -69,7 +70,7 @@ bool TranslatorVisitor::DUP_gen(bool Q, Imm<5> imm5, Reg Rn, Vec Vd) { } bool TranslatorVisitor::SMOV(bool Q, Imm<5> imm5, Vec Vn, Reg Rd) { - const size_t size = Common::LowestSetBit(imm5.ZeroExtend()); + const size_t size = mcl::bit::lowest_set_bit(imm5.ZeroExtend()); if (size == 2 && !Q) { return UnallocatedEncoding(); } @@ -92,7 +93,7 @@ bool TranslatorVisitor::SMOV(bool Q, Imm<5> imm5, Vec Vn, Reg Rd) { } bool TranslatorVisitor::UMOV(bool Q, Imm<5> imm5, Vec Vn, Reg Rd) { - const size_t size = Common::LowestSetBit(imm5.ZeroExtend()); + const size_t size = mcl::bit::lowest_set_bit(imm5.ZeroExtend()); if (size < 3 && Q) { return UnallocatedEncoding(); } @@ -119,7 +120,7 @@ bool TranslatorVisitor::UMOV(bool Q, Imm<5> imm5, Vec Vn, Reg Rd) { } bool TranslatorVisitor::INS_gen(Imm<5> imm5, Reg Rn, Vec Vd) { - const size_t size = Common::LowestSetBit(imm5.ZeroExtend()); + const size_t size = mcl::bit::lowest_set_bit(imm5.ZeroExtend()); if (size > 3) { return ReservedValue(); } @@ -136,7 +137,7 @@ bool TranslatorVisitor::INS_gen(Imm<5> imm5, Reg Rn, Vec Vd) { } bool TranslatorVisitor::INS_elt(Imm<5> imm5, Imm<4> imm4, Vec Vn, Vec Vd) { - const size_t size = Common::LowestSetBit(imm5.ZeroExtend()); + const size_t size = mcl::bit::lowest_set_bit(imm5.ZeroExtend()); if (size > 3) { return ReservedValue(); } diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_modified_immediate.cpp b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_modified_immediate.cpp index ed45bf59c..db8e83631 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_modified_immediate.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_modified_immediate.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { @@ -119,7 +120,7 @@ bool TranslatorVisitor::FMOV_3(bool Q, Imm<1> a, Imm<1> b, Imm<1> c, Imm<1> d, I imm16 |= imm8.Bits<0, 5, u16>() << 6; return imm16; }(); - const u64 imm64 = Common::Replicate(imm16, 16); + const u64 imm64 = mcl::bit::replicate_element(imm16); const IR::U128 imm = datasize == 64 ? ir.ZeroExtendToQuad(ir.Imm64(imm64)) : ir.VectorBroadcast(64, ir.Imm64(imm64)); V(128, Vd, imm); diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp index af1ef9fe4..042213de6 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp @@ -3,6 +3,8 @@ * SPDX-License-Identifier: 0BSD */ +#include + #include "dynarmic/common/fp/rounding_mode.h" #include "dynarmic/frontend/A64/translate/impl/impl.h" @@ -40,7 +42,7 @@ bool SaturatingShiftLeft(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn, return v.ReservedValue(); } - const size_t esize = 8U << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8U << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t shift_amount = concatenate(immh, immb).ZeroExtend() - esize; const IR::U128 operand = v.ir.ZeroExtendToQuad(v.V_scalar(esize, Vn)); @@ -139,10 +141,10 @@ bool ShiftAndInsert(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn, Vec const u64 mask = [&] { if (direction == ShiftDirection::Right) { - return shift_amount == esize ? 0 : Common::Ones(esize) >> shift_amount; + return shift_amount == esize ? 0 : mcl::bit::ones(esize) >> shift_amount; } - return Common::Ones(esize) << shift_amount; + return mcl::bit::ones(esize) << shift_amount; }(); const IR::U64 operand1 = v.V_scalar(esize, Vn); @@ -170,7 +172,7 @@ bool ShiftRightNarrowing(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn, return v.ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t source_esize = 2 * esize; const u8 shift_amount = static_cast(source_esize - concatenate(immh, immb).ZeroExtend()); diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_scalar_three_same.cpp b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_scalar_three_same.cpp index 76ef26ad4..af1adbe35 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_scalar_three_same.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_scalar_three_same.cpp @@ -5,7 +5,8 @@ #include -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_shift_by_immediate.cpp b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_shift_by_immediate.cpp index f39ccd0fb..ee36423f0 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_shift_by_immediate.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_shift_by_immediate.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/bit_util.h" +#include + #include "dynarmic/common/fp/rounding_mode.h" #include "dynarmic/frontend/A64/translate/impl/impl.h" @@ -56,7 +57,7 @@ bool ShiftRight(TranslatorVisitor& v, bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, return v.ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = static_cast(2 * esize) - concatenate(immh, immb).ZeroExtend(); @@ -93,7 +94,7 @@ bool ShiftRightNarrowing(TranslatorVisitor& v, bool Q, Imm<4> immh, Imm<3> immb, return v.ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t source_esize = 2 * esize; const size_t part = Q ? 1 : 0; @@ -142,7 +143,7 @@ bool ShiftLeftLong(TranslatorVisitor& v, bool Q, Imm<4> immh, Imm<3> immb, Vec V return v.ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t datasize = 64; const size_t part = Q ? 1 : 0; @@ -166,7 +167,7 @@ bool SaturatingShiftLeft(TranslatorVisitor& v, bool Q, Imm<4> immh, Imm<3> immb, return v.ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const size_t shift = concatenate(immh, immb).ZeroExtend() - esize; @@ -201,7 +202,7 @@ bool ConvertFloat(TranslatorVisitor& v, bool Q, Imm<4> immh, Imm<3> immb, Vec Vn return v.ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 fbits = static_cast(esize * 2) - concatenate(immh, immb).ZeroExtend(); @@ -250,7 +251,7 @@ bool TranslatorVisitor::SHL_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) if (immh.Bit<3>() && !Q) { return ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = concatenate(immh, immb).ZeroExtend() - static_cast(esize); @@ -339,11 +340,11 @@ bool TranslatorVisitor::SRI_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) return ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = static_cast((esize * 2) - concatenate(immh, immb).ZeroExtend()); - const u64 mask = shift_amount == esize ? 0 : Common::Ones(esize) >> shift_amount; + const u64 mask = shift_amount == esize ? 0 : mcl::bit::ones(esize) >> shift_amount; const IR::U128 operand1 = V(datasize, Vn); const IR::U128 operand2 = V(datasize, Vd); @@ -365,11 +366,11 @@ bool TranslatorVisitor::SLI_2(bool Q, Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd) return ReservedValue(); } - const size_t esize = 8 << Common::HighestSetBit(immh.ZeroExtend()); + const size_t esize = 8 << mcl::bit::highest_set_bit(immh.ZeroExtend()); const size_t datasize = Q ? 128 : 64; const u8 shift_amount = concatenate(immh, immb).ZeroExtend() - static_cast(esize); - const u64 mask = Common::Ones(esize) << shift_amount; + const u64 mask = mcl::bit::ones(esize) << shift_amount; const IR::U128 operand1 = V(datasize, Vn); const IR::U128 operand2 = V(datasize, Vd); diff --git a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_vector_x_indexed_element.cpp b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_vector_x_indexed_element.cpp index 3d46c07d2..8b76e290b 100755 --- a/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_vector_x_indexed_element.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/A64/translate/impl/simd_vector_x_indexed_element.cpp @@ -5,7 +5,8 @@ #include -#include "dynarmic/common/assert.h" +#include + #include "dynarmic/frontend/A64/translate/impl/impl.h" namespace Dynarmic::A64 { diff --git a/externals/dynarmic/src/dynarmic/frontend/decoder/decoder_detail.h b/externals/dynarmic/src/dynarmic/frontend/decoder/decoder_detail.h index b5541d629..55d745c77 100755 --- a/externals/dynarmic/src/dynarmic/frontend/decoder/decoder_detail.h +++ b/externals/dynarmic/src/dynarmic/frontend/decoder/decoder_detail.h @@ -9,10 +9,9 @@ #include #include -#include - -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include +#include namespace Dynarmic::Decoder { namespace detail { @@ -36,7 +35,7 @@ struct detail { using opcode_type = typename MatcherT::opcode_type; using visitor_type = typename MatcherT::visitor_type; - static constexpr size_t opcode_bitsize = Common::BitSize(); + static constexpr size_t opcode_bitsize = mcl::bitsizeof; /** * Generates the mask and the expected value after masking from a given bitstring. @@ -165,7 +164,7 @@ struct detail { * Creates a matcher that can match and parse instructions based on bitstring. * See also: GetMaskAndExpect and GetArgInfo for format of bitstring. */ - template> + template> static auto GetMatcher(FnT fn, const char* const name, std::tuple mask_and_expect, std::tuple, std::array> masks_and_shifts) { using Iota = std::make_index_sequence; @@ -177,7 +176,7 @@ struct detail { } }; -#define DYNARMIC_DECODER_GET_MATCHER(MatcherT, fn, name, bitstring) Decoder::detail::detail>::GetMatcher(&V::fn, name, Decoder::detail::detail>::GetMaskAndExpect(bitstring), Decoder::detail::detail>::template GetArgInfo>(bitstring)) +#define DYNARMIC_DECODER_GET_MATCHER(MatcherT, fn, name, bitstring) Decoder::detail::detail>::GetMatcher(&V::fn, name, Decoder::detail::detail>::GetMaskAndExpect(bitstring), Decoder::detail::detail>::template GetArgInfo>(bitstring)) } // namespace detail } // namespace Dynarmic::Decoder diff --git a/externals/dynarmic/src/dynarmic/frontend/decoder/matcher.h b/externals/dynarmic/src/dynarmic/frontend/decoder/matcher.h index 54c2d1166..adf9556dd 100755 --- a/externals/dynarmic/src/dynarmic/frontend/decoder/matcher.h +++ b/externals/dynarmic/src/dynarmic/frontend/decoder/matcher.h @@ -7,7 +7,7 @@ #include -#include "dynarmic/common/assert.h" +#include namespace Dynarmic::Decoder { diff --git a/externals/dynarmic/src/dynarmic/frontend/imm.cpp b/externals/dynarmic/src/dynarmic/frontend/imm.cpp index 72d1e8fec..c802864df 100755 --- a/externals/dynarmic/src/dynarmic/frontend/imm.cpp +++ b/externals/dynarmic/src/dynarmic/frontend/imm.cpp @@ -5,45 +5,45 @@ #include "dynarmic/frontend/imm.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include namespace Dynarmic { u64 AdvSIMDExpandImm(bool op, Imm<4> cmode, Imm<8> imm8) { switch (cmode.Bits<1, 3>()) { case 0b000: - return Common::Replicate(imm8.ZeroExtend(), 32); + return mcl::bit::replicate_element(imm8.ZeroExtend()); case 0b001: - return Common::Replicate(imm8.ZeroExtend() << 8, 32); + return mcl::bit::replicate_element(imm8.ZeroExtend() << 8); case 0b010: - return Common::Replicate(imm8.ZeroExtend() << 16, 32); + return mcl::bit::replicate_element(imm8.ZeroExtend() << 16); case 0b011: - return Common::Replicate(imm8.ZeroExtend() << 24, 32); + return mcl::bit::replicate_element(imm8.ZeroExtend() << 24); case 0b100: - return Common::Replicate(imm8.ZeroExtend(), 16); + return mcl::bit::replicate_element(imm8.ZeroExtend()); case 0b101: - return Common::Replicate(imm8.ZeroExtend() << 8, 16); + return mcl::bit::replicate_element(imm8.ZeroExtend() << 8); case 0b110: if (!cmode.Bit<0>()) { - return Common::Replicate((imm8.ZeroExtend() << 8) | Common::Ones(8), 32); + return mcl::bit::replicate_element((imm8.ZeroExtend() << 8) | mcl::bit::ones(8)); } - return Common::Replicate((imm8.ZeroExtend() << 16) | Common::Ones(16), 32); + return mcl::bit::replicate_element((imm8.ZeroExtend() << 16) | mcl::bit::ones(16)); case 0b111: if (!cmode.Bit<0>() && !op) { - return Common::Replicate(imm8.ZeroExtend(), 8); + return mcl::bit::replicate_element(imm8.ZeroExtend()); } if (!cmode.Bit<0>() && op) { u64 result = 0; - result |= imm8.Bit<0>() ? Common::Ones(8) << (0 * 8) : 0; - result |= imm8.Bit<1>() ? Common::Ones(8) << (1 * 8) : 0; - result |= imm8.Bit<2>() ? Common::Ones(8) << (2 * 8) : 0; - result |= imm8.Bit<3>() ? Common::Ones(8) << (3 * 8) : 0; - result |= imm8.Bit<4>() ? Common::Ones(8) << (4 * 8) : 0; - result |= imm8.Bit<5>() ? Common::Ones(8) << (5 * 8) : 0; - result |= imm8.Bit<6>() ? Common::Ones(8) << (6 * 8) : 0; - result |= imm8.Bit<7>() ? Common::Ones(8) << (7 * 8) : 0; + result |= imm8.Bit<0>() ? mcl::bit::ones(8) << (0 * 8) : 0; + result |= imm8.Bit<1>() ? mcl::bit::ones(8) << (1 * 8) : 0; + result |= imm8.Bit<2>() ? mcl::bit::ones(8) << (2 * 8) : 0; + result |= imm8.Bit<3>() ? mcl::bit::ones(8) << (3 * 8) : 0; + result |= imm8.Bit<4>() ? mcl::bit::ones(8) << (4 * 8) : 0; + result |= imm8.Bit<5>() ? mcl::bit::ones(8) << (5 * 8) : 0; + result |= imm8.Bit<6>() ? mcl::bit::ones(8) << (6 * 8) : 0; + result |= imm8.Bit<7>() ? mcl::bit::ones(8) << (7 * 8) : 0; return result; } if (cmode.Bit<0>() && !op) { @@ -51,7 +51,7 @@ u64 AdvSIMDExpandImm(bool op, Imm<4> cmode, Imm<8> imm8) { result |= imm8.Bit<7>() ? 0x80000000 : 0; result |= imm8.Bit<6>() ? 0x3E000000 : 0x40000000; result |= imm8.Bits<0, 5, u64>() << 19; - return Common::Replicate(result, 32); + return mcl::bit::replicate_element(result); } if (cmode.Bit<0>() && op) { u64 result = 0; diff --git a/externals/dynarmic/src/dynarmic/frontend/imm.h b/externals/dynarmic/src/dynarmic/frontend/imm.h index d534d8666..7d86abbb6 100755 --- a/externals/dynarmic/src/dynarmic/frontend/imm.h +++ b/externals/dynarmic/src/dynarmic/frontend/imm.h @@ -5,9 +5,13 @@ #pragma once -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include + +#include +#include +#include +#include + #include "dynarmic/common/math_util.h" namespace Dynarmic { @@ -23,32 +27,32 @@ public: explicit Imm(u32 value) : value(value) { - ASSERT_MSG((Common::Bits<0, bit_size - 1>(value) == value), "More bits in value than expected"); + ASSERT_MSG((mcl::bit::get_bits<0, bit_size - 1>(value) == value), "More bits in value than expected"); } template T ZeroExtend() const { - static_assert(Common::BitSize() >= bit_size); + static_assert(mcl::bitsizeof >= bit_size); return static_cast(value); } template T SignExtend() const { - static_assert(Common::BitSize() >= bit_size); - return Common::SignExtend(value); + static_assert(mcl::bitsizeof >= bit_size); + return static_cast(mcl::bit::sign_extend>(value)); } template bool Bit() const { static_assert(bit < bit_size); - return Common::Bit(value); + return mcl::bit::get_bit(value); } template T Bits() const { static_assert(begin_bit <= end_bit && end_bit < bit_size); - static_assert(Common::BitSize() >= end_bit - begin_bit + 1); - return static_cast(Common::Bits(value)); + static_assert(mcl::bitsizeof >= end_bit - begin_bit + 1); + return static_cast(mcl::bit::get_bits(value)); } bool operator==(Imm other) const { diff --git a/externals/dynarmic/src/dynarmic/ir/basic_block.cpp b/externals/dynarmic/src/dynarmic/ir/basic_block.cpp index c1f66ef36..da7f837b2 100755 --- a/externals/dynarmic/src/dynarmic/ir/basic_block.cpp +++ b/externals/dynarmic/src/dynarmic/ir/basic_block.cpp @@ -12,8 +12,8 @@ #include #include +#include -#include "dynarmic/common/assert.h" #include "dynarmic/common/memory_pool.h" #include "dynarmic/frontend/A32/a32_types.h" #include "dynarmic/frontend/A64/a64_types.h" diff --git a/externals/dynarmic/src/dynarmic/ir/basic_block.h b/externals/dynarmic/src/dynarmic/ir/basic_block.h index 4f9a7805b..18d7fadae 100755 --- a/externals/dynarmic/src/dynarmic/ir/basic_block.h +++ b/externals/dynarmic/src/dynarmic/ir/basic_block.h @@ -10,8 +10,9 @@ #include #include -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/intrusive_list.h" +#include +#include + #include "dynarmic/ir/location_descriptor.h" #include "dynarmic/ir/microinstruction.h" #include "dynarmic/ir/terminal.h" @@ -34,7 +35,7 @@ enum class Opcode; */ class Block final { public: - using InstructionList = Common::IntrusiveList; + using InstructionList = mcl::intrusive_list; using size_type = InstructionList::size_type; using iterator = InstructionList::iterator; using const_iterator = InstructionList::const_iterator; diff --git a/externals/dynarmic/src/dynarmic/ir/ir_emitter.cpp b/externals/dynarmic/src/dynarmic/ir/ir_emitter.cpp index dfb03ae9e..f588d3dbb 100755 --- a/externals/dynarmic/src/dynarmic/ir/ir_emitter.cpp +++ b/externals/dynarmic/src/dynarmic/ir/ir_emitter.cpp @@ -5,8 +5,9 @@ #include "dynarmic/ir/ir_emitter.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/cast_util.h" +#include +#include + #include "dynarmic/ir/opcodes.h" namespace Dynarmic::IR { @@ -2717,19 +2718,19 @@ void IREmitter::Breakpoint() { } void IREmitter::CallHostFunction(void (*fn)(void)) { - Inst(Opcode::CallHostFunction, Imm64(Common::BitCast(fn))); + Inst(Opcode::CallHostFunction, Imm64(mcl::bit_cast(fn))); } void IREmitter::CallHostFunction(void (*fn)(u64), const U64& arg1) { - Inst(Opcode::CallHostFunction, Imm64(Common::BitCast(fn)), arg1); + Inst(Opcode::CallHostFunction, Imm64(mcl::bit_cast(fn)), arg1); } void IREmitter::CallHostFunction(void (*fn)(u64, u64), const U64& arg1, const U64& arg2) { - Inst(Opcode::CallHostFunction, Imm64(Common::BitCast(fn)), arg1, arg2); + Inst(Opcode::CallHostFunction, Imm64(mcl::bit_cast(fn)), arg1, arg2); } void IREmitter::CallHostFunction(void (*fn)(u64, u64, u64), const U64& arg1, const U64& arg2, const U64& arg3) { - Inst(Opcode::CallHostFunction, Imm64(Common::BitCast(fn)), arg1, arg2, arg3); + Inst(Opcode::CallHostFunction, Imm64(mcl::bit_cast(fn)), arg1, arg2, arg3); } void IREmitter::SetTerm(const Terminal& terminal) { diff --git a/externals/dynarmic/src/dynarmic/ir/ir_emitter.h b/externals/dynarmic/src/dynarmic/ir/ir_emitter.h index fb8d957cd..82b8acc0f 100755 --- a/externals/dynarmic/src/dynarmic/ir/ir_emitter.h +++ b/externals/dynarmic/src/dynarmic/ir/ir_emitter.h @@ -5,7 +5,8 @@ #pragma once -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/ir/acc_type.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/location_descriptor.h" diff --git a/externals/dynarmic/src/dynarmic/ir/location_descriptor.h b/externals/dynarmic/src/dynarmic/ir/location_descriptor.h index cd47b80b2..4b5d77d85 100755 --- a/externals/dynarmic/src/dynarmic/ir/location_descriptor.h +++ b/externals/dynarmic/src/dynarmic/ir/location_descriptor.h @@ -8,7 +8,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::IR { diff --git a/externals/dynarmic/src/dynarmic/ir/microinstruction.cpp b/externals/dynarmic/src/dynarmic/ir/microinstruction.cpp index dae5f6aeb..81bfbbaa3 100755 --- a/externals/dynarmic/src/dynarmic/ir/microinstruction.cpp +++ b/externals/dynarmic/src/dynarmic/ir/microinstruction.cpp @@ -8,8 +8,8 @@ #include #include +#include -#include "dynarmic/common/assert.h" #include "dynarmic/ir/opcodes.h" #include "dynarmic/ir/type.h" diff --git a/externals/dynarmic/src/dynarmic/ir/microinstruction.h b/externals/dynarmic/src/dynarmic/ir/microinstruction.h index de3db2e52..a5011b200 100755 --- a/externals/dynarmic/src/dynarmic/ir/microinstruction.h +++ b/externals/dynarmic/src/dynarmic/ir/microinstruction.h @@ -7,8 +7,9 @@ #include -#include "dynarmic/common/common_types.h" -#include "dynarmic/common/intrusive_list.h" +#include +#include + #include "dynarmic/ir/value.h" namespace Dynarmic::IR { @@ -22,7 +23,7 @@ constexpr size_t max_arg_count = 4; * A representation of a microinstruction. A single ARM/Thumb instruction may be * converted into zero or more microinstructions. */ -class Inst final : public Common::IntrusiveListNode { +class Inst final : public mcl::intrusive_list_node { public: explicit Inst(Opcode op) : op(op) {} diff --git a/externals/dynarmic/src/dynarmic/ir/opcodes.h b/externals/dynarmic/src/dynarmic/ir/opcodes.h index 2923511d1..719fda001 100755 --- a/externals/dynarmic/src/dynarmic/ir/opcodes.h +++ b/externals/dynarmic/src/dynarmic/ir/opcodes.h @@ -8,7 +8,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::IR { diff --git a/externals/dynarmic/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp b/externals/dynarmic/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp index 2731037ce..2689d194b 100755 --- a/externals/dynarmic/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp +++ b/externals/dynarmic/src/dynarmic/ir/opt/a32_get_set_elimination_pass.cpp @@ -5,8 +5,9 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/frontend/A32/a32_types.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/opcodes.h" diff --git a/externals/dynarmic/src/dynarmic/ir/opt/a64_get_set_elimination_pass.cpp b/externals/dynarmic/src/dynarmic/ir/opt/a64_get_set_elimination_pass.cpp index 2248a3c1e..f49201562 100755 --- a/externals/dynarmic/src/dynarmic/ir/opt/a64_get_set_elimination_pass.cpp +++ b/externals/dynarmic/src/dynarmic/ir/opt/a64_get_set_elimination_pass.cpp @@ -5,7 +5,8 @@ #include -#include "dynarmic/common/common_types.h" +#include + #include "dynarmic/frontend/A64/a64_types.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/opcodes.h" diff --git a/externals/dynarmic/src/dynarmic/ir/opt/a64_merge_interpret_blocks.cpp b/externals/dynarmic/src/dynarmic/ir/opt/a64_merge_interpret_blocks.cpp index af4e4bef6..d9b2558d8 100755 --- a/externals/dynarmic/src/dynarmic/ir/opt/a64_merge_interpret_blocks.cpp +++ b/externals/dynarmic/src/dynarmic/ir/opt/a64_merge_interpret_blocks.cpp @@ -4,8 +4,8 @@ */ #include +#include -#include "dynarmic/common/common_types.h" #include "dynarmic/frontend/A64/a64_location_descriptor.h" #include "dynarmic/frontend/A64/translate/a64_translate.h" #include "dynarmic/interface/A64/config.h" diff --git a/externals/dynarmic/src/dynarmic/ir/opt/constant_propagation_pass.cpp b/externals/dynarmic/src/dynarmic/ir/opt/constant_propagation_pass.cpp index f4eeba0a4..f30d98363 100755 --- a/externals/dynarmic/src/dynarmic/ir/opt/constant_propagation_pass.cpp +++ b/externals/dynarmic/src/dynarmic/ir/opt/constant_propagation_pass.cpp @@ -5,9 +5,11 @@ #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" +#include +#include +#include +#include + #include "dynarmic/common/safe_ops.h" #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/ir_emitter.h" @@ -138,13 +140,13 @@ void FoldByteReverse(IR::Inst& inst, Op op) { } if (op == Op::ByteReverseWord) { - const u32 result = Common::SwapBytes32(static_cast(operand.GetImmediateAsU64())); + const u32 result = mcl::bit::swap_bytes_32(static_cast(operand.GetImmediateAsU64())); inst.ReplaceUsesWith(IR::Value{result}); } else if (op == Op::ByteReverseHalf) { - const u16 result = Common::SwapBytes16(static_cast(operand.GetImmediateAsU64())); + const u16 result = mcl::bit::swap_bytes_16(static_cast(operand.GetImmediateAsU64())); inst.ReplaceUsesWith(IR::Value{result}); } else { - const u64 result = Common::SwapBytes64(operand.GetImmediateAsU64()); + const u64 result = mcl::bit::swap_bytes_64(operand.GetImmediateAsU64()); inst.ReplaceUsesWith(IR::Value{result}); } } @@ -237,7 +239,7 @@ void FoldMostSignificantWord(IR::Inst& inst) { const auto operand = inst.GetArg(0); if (carry_inst) { - carry_inst->ReplaceUsesWith(IR::Value{Common::Bit<31>(operand.GetImmediateAsU64())}); + carry_inst->ReplaceUsesWith(IR::Value{mcl::bit::get_bit<31>(operand.GetImmediateAsU64())}); } inst.ReplaceUsesWith(IR::Value{static_cast(operand.GetImmediateAsU64() >> 32)}); } @@ -425,12 +427,12 @@ void ConstantPropagation(IR::Block& block) { break; case Op::RotateRight32: if (FoldShifts(inst)) { - ReplaceUsesWith(inst, true, Common::RotateRight(inst.GetArg(0).GetU32(), inst.GetArg(1).GetU8())); + ReplaceUsesWith(inst, true, mcl::bit::rotate_right(inst.GetArg(0).GetU32(), inst.GetArg(1).GetU8())); } break; case Op::RotateRight64: if (FoldShifts(inst)) { - ReplaceUsesWith(inst, false, Common::RotateRight(inst.GetArg(0).GetU64(), inst.GetArg(1).GetU8())); + ReplaceUsesWith(inst, false, mcl::bit::rotate_right(inst.GetArg(0).GetU64(), inst.GetArg(1).GetU8())); } break; case Op::LogicalShiftLeftMasked32: @@ -465,12 +467,12 @@ void ConstantPropagation(IR::Block& block) { break; case Op::RotateRightMasked32: if (inst.AreAllArgsImmediates()) { - ReplaceUsesWith(inst, true, Common::RotateRight(inst.GetArg(0).GetU32(), inst.GetArg(1).GetU32())); + ReplaceUsesWith(inst, true, mcl::bit::rotate_right(inst.GetArg(0).GetU32(), inst.GetArg(1).GetU32())); } break; case Op::RotateRightMasked64: if (inst.AreAllArgsImmediates()) { - ReplaceUsesWith(inst, false, Common::RotateRight(inst.GetArg(0).GetU64(), inst.GetArg(1).GetU64())); + ReplaceUsesWith(inst, false, mcl::bit::rotate_right(inst.GetArg(0).GetU64(), inst.GetArg(1).GetU64())); } break; case Op::Add32: diff --git a/externals/dynarmic/src/dynarmic/ir/opt/dead_code_elimination_pass.cpp b/externals/dynarmic/src/dynarmic/ir/opt/dead_code_elimination_pass.cpp index 4f8820778..0d0de180a 100755 --- a/externals/dynarmic/src/dynarmic/ir/opt/dead_code_elimination_pass.cpp +++ b/externals/dynarmic/src/dynarmic/ir/opt/dead_code_elimination_pass.cpp @@ -3,7 +3,8 @@ * SPDX-License-Identifier: 0BSD */ -#include "dynarmic/common/iterator_util.h" +#include + #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/opt/passes.h" @@ -12,7 +13,7 @@ namespace Dynarmic::Optimization { void DeadCodeElimination(IR::Block& block) { // We iterate over the instructions in reverse order. // This is because removing an instruction reduces the number of uses for earlier instructions. - for (auto& inst : Common::Reverse(block)) { + for (auto& inst : mcl::iterator::reverse(block)) { if (!inst.HasUses() && !inst.MayHaveSideEffects()) { inst.Invalidate(); } diff --git a/externals/dynarmic/src/dynarmic/ir/opt/identity_removal_pass.cpp b/externals/dynarmic/src/dynarmic/ir/opt/identity_removal_pass.cpp index 2b79b8a72..57d198b7d 100755 --- a/externals/dynarmic/src/dynarmic/ir/opt/identity_removal_pass.cpp +++ b/externals/dynarmic/src/dynarmic/ir/opt/identity_removal_pass.cpp @@ -5,7 +5,8 @@ #include -#include "dynarmic/common/iterator_util.h" +#include + #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/opcodes.h" #include "dynarmic/ir/opt/passes.h" diff --git a/externals/dynarmic/src/dynarmic/ir/opt/verification_pass.cpp b/externals/dynarmic/src/dynarmic/ir/opt/verification_pass.cpp index 0a391f115..8bc9e6f1f 100755 --- a/externals/dynarmic/src/dynarmic/ir/opt/verification_pass.cpp +++ b/externals/dynarmic/src/dynarmic/ir/opt/verification_pass.cpp @@ -6,8 +6,9 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/ir/basic_block.h" #include "dynarmic/ir/microinstruction.h" #include "dynarmic/ir/opcodes.h" diff --git a/externals/dynarmic/src/dynarmic/ir/terminal.h b/externals/dynarmic/src/dynarmic/ir/terminal.h index 6a017e356..d437ffd5b 100755 --- a/externals/dynarmic/src/dynarmic/ir/terminal.h +++ b/externals/dynarmic/src/dynarmic/ir/terminal.h @@ -6,8 +6,8 @@ #pragma once #include +#include -#include "dynarmic/common/common_types.h" #include "dynarmic/ir/cond.h" #include "dynarmic/ir/location_descriptor.h" diff --git a/externals/dynarmic/src/dynarmic/ir/type.h b/externals/dynarmic/src/dynarmic/ir/type.h index 35c029702..7f99e4749 100755 --- a/externals/dynarmic/src/dynarmic/ir/type.h +++ b/externals/dynarmic/src/dynarmic/ir/type.h @@ -8,7 +8,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include namespace Dynarmic::IR { diff --git a/externals/dynarmic/src/dynarmic/ir/value.cpp b/externals/dynarmic/src/dynarmic/ir/value.cpp index 8cdefa39b..5b86f731a 100755 --- a/externals/dynarmic/src/dynarmic/ir/value.cpp +++ b/externals/dynarmic/src/dynarmic/ir/value.cpp @@ -5,8 +5,9 @@ #include "dynarmic/ir/value.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" +#include +#include + #include "dynarmic/ir/microinstruction.h" #include "dynarmic/ir/opcodes.h" #include "dynarmic/ir/type.h" @@ -197,11 +198,11 @@ s64 Value::GetImmediateAsS64() const { case IR::Type::U1: return s64(GetU1()); case IR::Type::U8: - return s64(Common::SignExtend<8, u64>(GetU8())); + return s64(mcl::bit::sign_extend<8, u64>(GetU8())); case IR::Type::U16: - return s64(Common::SignExtend<16, u64>(GetU16())); + return s64(mcl::bit::sign_extend<16, u64>(GetU16())); case IR::Type::U32: - return s64(Common::SignExtend<32, u64>(GetU32())); + return s64(mcl::bit::sign_extend<32, u64>(GetU32())); case IR::Type::U64: return s64(GetU64()); default: diff --git a/externals/dynarmic/src/dynarmic/ir/value.h b/externals/dynarmic/src/dynarmic/ir/value.h index 9e0b19c7e..122d86e5d 100755 --- a/externals/dynarmic/src/dynarmic/ir/value.h +++ b/externals/dynarmic/src/dynarmic/ir/value.h @@ -8,8 +8,9 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/ir/type.h" namespace Dynarmic::A32 { diff --git a/externals/dynarmic/tests/A32/fuzz_arm.cpp b/externals/dynarmic/tests/A32/fuzz_arm.cpp index ccc3d46b0..bd53af154 100755 --- a/externals/dynarmic/tests/A32/fuzz_arm.cpp +++ b/externals/dynarmic/tests/A32/fuzz_arm.cpp @@ -11,16 +11,18 @@ #include #include +#include +#include +#include +#include #include "../fuzz_util.h" #include "../rand_int.h" #include "../unicorn_emu/a32_unicorn.h" #include "./testenv.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/llvm_disassemble.h" -#include "dynarmic/common/scope_exit.h" #include "dynarmic/frontend/A32/ITState.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/frontend/A32/a32_types.h" @@ -255,7 +257,7 @@ std::vector GenRandomThumbInst(u32 pc, bool is_last_inst, A32::ITState it_s const u32 inst = instructions.generators[index].Generate(); const bool is_four_bytes = (inst >> 16) != 0; - if (ShouldTestInst(is_four_bytes ? Common::SwapHalves32(inst) : inst, pc, true, is_last_inst, it_state)) { + if (ShouldTestInst(is_four_bytes ? mcl::bit::swap_halves_32(inst) : inst, pc, true, is_last_inst, it_state)) { if (is_four_bytes) return {static_cast(inst >> 16), static_cast(inst)}; return {static_cast(inst)}; @@ -625,7 +627,7 @@ TEST_CASE("A32: Test thumb IT instruction", "[thumb]") { A32::ITState it_state = [&] { while (true) { const u16 imm8 = RandInt(0, 0xFF); - if (Common::Bits<0, 3>(imm8) == 0b0000 || Common::Bits<4, 7>(imm8) == 0b1111 || (Common::Bits<4, 7>(imm8) == 0b1110 && Common::BitCount(Common::Bits<0, 3>(imm8)) != 1)) { + if (mcl::bit::get_bits<0, 3>(imm8) == 0b0000 || mcl::bit::get_bits<4, 7>(imm8) == 0b1111 || (mcl::bit::get_bits<4, 7>(imm8) == 0b1110 && mcl::bit::count_ones(mcl::bit::get_bits<0, 3>(imm8)) != 1)) { continue; } instructions.push_back(0b1011111100000000 | imm8); diff --git a/externals/dynarmic/tests/A32/fuzz_thumb.cpp b/externals/dynarmic/tests/A32/fuzz_thumb.cpp index a7b04a57f..d412b97e8 100755 --- a/externals/dynarmic/tests/A32/fuzz_thumb.cpp +++ b/externals/dynarmic/tests/A32/fuzz_thumb.cpp @@ -13,12 +13,12 @@ #include #include +#include +#include #include "../rand_int.h" #include "../unicorn_emu/a32_unicorn.h" #include "./testenv.h" -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/frontend/A32/FPSCR.h" #include "dynarmic/frontend/A32/PSR.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" @@ -236,8 +236,8 @@ void FuzzJitThumb32(const size_t instruction_count, const size_t instructions_to for (size_t i = 0; i < instruction_count; i++) { const auto instruction = instruction_generator(); - const auto first_halfword = static_cast(Common::Bits<0, 15>(instruction)); - const auto second_halfword = static_cast(Common::Bits<16, 31>(instruction)); + const auto first_halfword = static_cast(mcl::bit::get_bits<0, 15>(instruction)); + const auto second_halfword = static_cast(mcl::bit::get_bits<16, 31>(instruction)); test_env.code_mem[i * 2 + 0] = second_halfword; test_env.code_mem[i * 2 + 1] = first_halfword; @@ -249,39 +249,39 @@ void FuzzJitThumb32(const size_t instruction_count, const size_t instructions_to TEST_CASE("Fuzz Thumb instructions set 1", "[JitX64][Thumb][Thumb16]") { const std::array instructions = { - ThumbInstGen("00000xxxxxxxxxxx"), // LSL , , # - ThumbInstGen("00001xxxxxxxxxxx"), // LSR , , # - ThumbInstGen("00010xxxxxxxxxxx"), // ASR , , # - ThumbInstGen("000110oxxxxxxxxx"), // ADD/SUB_reg - ThumbInstGen("000111oxxxxxxxxx"), // ADD/SUB_imm - ThumbInstGen("001ooxxxxxxxxxxx"), // ADD/SUB/CMP/MOV_imm - ThumbInstGen("010000ooooxxxxxx"), // Data Processing - ThumbInstGen("010001000hxxxxxx"), // ADD (high registers) - ThumbInstGen("0100010101xxxxxx", // CMP (high registers) - [](u32 inst) { return Common::Bits<3, 5>(inst) != 0b111; }), // R15 is UNPREDICTABLE - ThumbInstGen("0100010110xxxxxx", // CMP (high registers) - [](u32 inst) { return Common::Bits<0, 2>(inst) != 0b111; }), // R15 is UNPREDICTABLE - ThumbInstGen("010001100hxxxxxx"), // MOV (high registers) - ThumbInstGen("10110000oxxxxxxx"), // Adjust stack pointer - ThumbInstGen("10110010ooxxxxxx"), // SXT/UXT - ThumbInstGen("1011101000xxxxxx"), // REV - ThumbInstGen("1011101001xxxxxx"), // REV16 - ThumbInstGen("1011101011xxxxxx"), // REVSH - ThumbInstGen("01001xxxxxxxxxxx"), // LDR Rd, [PC, #] - ThumbInstGen("0101oooxxxxxxxxx"), // LDR/STR Rd, [Rn, Rm] - ThumbInstGen("011xxxxxxxxxxxxx"), // LDR(B)/STR(B) Rd, [Rn, #] - ThumbInstGen("1000xxxxxxxxxxxx"), // LDRH/STRH Rd, [Rn, #offset] - ThumbInstGen("1001xxxxxxxxxxxx"), // LDR/STR Rd, [SP, #] - ThumbInstGen("1011010xxxxxxxxx", // PUSH - [](u32 inst) { return Common::Bits<0, 7>(inst) != 0; }), // Empty reg_list is UNPREDICTABLE - ThumbInstGen("10111100xxxxxxxx", // POP (P = 0) - [](u32 inst) { return Common::Bits<0, 7>(inst) != 0; }), // Empty reg_list is UNPREDICTABLE - ThumbInstGen("1100xxxxxxxxxxxx", // STMIA/LDMIA + ThumbInstGen("00000xxxxxxxxxxx"), // LSL , , # + ThumbInstGen("00001xxxxxxxxxxx"), // LSR , , # + ThumbInstGen("00010xxxxxxxxxxx"), // ASR , , # + ThumbInstGen("000110oxxxxxxxxx"), // ADD/SUB_reg + ThumbInstGen("000111oxxxxxxxxx"), // ADD/SUB_imm + ThumbInstGen("001ooxxxxxxxxxxx"), // ADD/SUB/CMP/MOV_imm + ThumbInstGen("010000ooooxxxxxx"), // Data Processing + ThumbInstGen("010001000hxxxxxx"), // ADD (high registers) + ThumbInstGen("0100010101xxxxxx", // CMP (high registers) + [](u32 inst) { return mcl::bit::get_bits<3, 5>(inst) != 0b111; }), // R15 is UNPREDICTABLE + ThumbInstGen("0100010110xxxxxx", // CMP (high registers) + [](u32 inst) { return mcl::bit::get_bits<0, 2>(inst) != 0b111; }), // R15 is UNPREDICTABLE + ThumbInstGen("010001100hxxxxxx"), // MOV (high registers) + ThumbInstGen("10110000oxxxxxxx"), // Adjust stack pointer + ThumbInstGen("10110010ooxxxxxx"), // SXT/UXT + ThumbInstGen("1011101000xxxxxx"), // REV + ThumbInstGen("1011101001xxxxxx"), // REV16 + ThumbInstGen("1011101011xxxxxx"), // REVSH + ThumbInstGen("01001xxxxxxxxxxx"), // LDR Rd, [PC, #] + ThumbInstGen("0101oooxxxxxxxxx"), // LDR/STR Rd, [Rn, Rm] + ThumbInstGen("011xxxxxxxxxxxxx"), // LDR(B)/STR(B) Rd, [Rn, #] + ThumbInstGen("1000xxxxxxxxxxxx"), // LDRH/STRH Rd, [Rn, #offset] + ThumbInstGen("1001xxxxxxxxxxxx"), // LDR/STR Rd, [SP, #] + ThumbInstGen("1011010xxxxxxxxx", // PUSH + [](u32 inst) { return mcl::bit::get_bits<0, 7>(inst) != 0; }), // Empty reg_list is UNPREDICTABLE + ThumbInstGen("10111100xxxxxxxx", // POP (P = 0) + [](u32 inst) { return mcl::bit::get_bits<0, 7>(inst) != 0; }), // Empty reg_list is UNPREDICTABLE + ThumbInstGen("1100xxxxxxxxxxxx", // STMIA/LDMIA [](u32 inst) { // Ensure that the architecturally undefined case of // the base register being within the list isn't hit. - const u32 rn = Common::Bits<8, 10>(inst); - return (inst & (1U << rn)) == 0 && Common::Bits<0, 7>(inst) != 0; + const u32 rn = mcl::bit::get_bits<8, 10>(inst); + return (inst & (1U << rn)) == 0 && mcl::bit::get_bits<0, 7>(inst) != 0; }), // TODO: We should properly test against swapped // endianness cases, however Unicorn doesn't @@ -325,7 +325,7 @@ TEST_CASE("Fuzz Thumb instructions set 2 (affects PC)", "[JitX64][Thumb][Thumb16 #if 0 ThumbInstGen("01000111xmmmm000", // BLX/BX [](u32 inst){ - const u32 Rm = Common::Bits<3, 6>(inst); + const u32 Rm = mcl::bit::get_bits<3, 6>(inst); return Rm != 15; }), #endif @@ -335,7 +335,7 @@ TEST_CASE("Fuzz Thumb instructions set 2 (affects PC)", "[JitX64][Thumb][Thumb16 ThumbInstGen("01000110h0xxxxxx"), // MOV (high registers) ThumbInstGen("1101ccccxxxxxxxx", // B [](u32 inst) { - const u32 c = Common::Bits<9, 12>(inst); + const u32 c = mcl::bit::get_bits<9, 12>(inst); return c < 0b1110; // Don't want SWI or undefined instructions. }), ThumbInstGen("1011o0i1iiiiinnn"), // CBZ/CBNZ @@ -360,18 +360,18 @@ TEST_CASE("Fuzz Thumb instructions set 2 (affects PC)", "[JitX64][Thumb][Thumb16 TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { const auto three_reg_not_r15 = [](u32 inst) { - const auto d = Common::Bits<8, 11>(inst); - const auto m = Common::Bits<0, 3>(inst); - const auto n = Common::Bits<16, 19>(inst); + const auto d = mcl::bit::get_bits<8, 11>(inst); + const auto m = mcl::bit::get_bits<0, 3>(inst); + const auto n = mcl::bit::get_bits<16, 19>(inst); return d != 15 && m != 15 && n != 15; }; const std::array instructions = { ThumbInstGen("111110101011nnnn1111dddd1000mmmm", // CLZ [](u32 inst) { - const auto d = Common::Bits<8, 11>(inst); - const auto m = Common::Bits<0, 3>(inst); - const auto n = Common::Bits<16, 19>(inst); + const auto d = mcl::bit::get_bits<8, 11>(inst); + const auto m = mcl::bit::get_bits<0, 3>(inst); + const auto n = mcl::bit::get_bits<16, 19>(inst); return m == n && d != 15 && m != 15; }), ThumbInstGen("111110101000nnnn1111dddd1000mmmm", // QADD @@ -396,30 +396,30 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") { three_reg_not_r15), ThumbInstGen("111110101001nnnn1111dddd1010mmmm", // RBIT [](u32 inst) { - const auto d = Common::Bits<8, 11>(inst); - const auto m = Common::Bits<0, 3>(inst); - const auto n = Common::Bits<16, 19>(inst); + const auto d = mcl::bit::get_bits<8, 11>(inst); + const auto m = mcl::bit::get_bits<0, 3>(inst); + const auto n = mcl::bit::get_bits<16, 19>(inst); return m == n && d != 15 && m != 15; }), ThumbInstGen("111110101001nnnn1111dddd1000mmmm", // REV [](u32 inst) { - const auto d = Common::Bits<8, 11>(inst); - const auto m = Common::Bits<0, 3>(inst); - const auto n = Common::Bits<16, 19>(inst); + const auto d = mcl::bit::get_bits<8, 11>(inst); + const auto m = mcl::bit::get_bits<0, 3>(inst); + const auto n = mcl::bit::get_bits<16, 19>(inst); return m == n && d != 15 && m != 15; }), ThumbInstGen("111110101001nnnn1111dddd1001mmmm", // REV16 [](u32 inst) { - const auto d = Common::Bits<8, 11>(inst); - const auto m = Common::Bits<0, 3>(inst); - const auto n = Common::Bits<16, 19>(inst); + const auto d = mcl::bit::get_bits<8, 11>(inst); + const auto m = mcl::bit::get_bits<0, 3>(inst); + const auto n = mcl::bit::get_bits<16, 19>(inst); return m == n && d != 15 && m != 15; }), ThumbInstGen("111110101001nnnn1111dddd1011mmmm", // REVSH [](u32 inst) { - const auto d = Common::Bits<8, 11>(inst); - const auto m = Common::Bits<0, 3>(inst); - const auto n = Common::Bits<16, 19>(inst); + const auto d = mcl::bit::get_bits<8, 11>(inst); + const auto m = mcl::bit::get_bits<0, 3>(inst); + const auto n = mcl::bit::get_bits<16, 19>(inst); return m == n && d != 15 && m != 15; }), ThumbInstGen("111110101000nnnn1111dddd0000mmmm", // SADD8 diff --git a/externals/dynarmic/tests/A32/test_thumb_instructions.cpp b/externals/dynarmic/tests/A32/test_thumb_instructions.cpp index 734836a63..c403f8bb3 100755 --- a/externals/dynarmic/tests/A32/test_thumb_instructions.cpp +++ b/externals/dynarmic/tests/A32/test_thumb_instructions.cpp @@ -4,9 +4,9 @@ */ #include +#include #include "./testenv.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/interface/A32/a32.h" static Dynarmic::A32::UserConfig GetUserConfig(ThumbTestEnv* testenv) { diff --git a/externals/dynarmic/tests/A32/testenv.h b/externals/dynarmic/tests/A32/testenv.h index 68538ba2f..ac7921ec7 100755 --- a/externals/dynarmic/tests/A32/testenv.h +++ b/externals/dynarmic/tests/A32/testenv.h @@ -11,8 +11,9 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/interface/A32/a32.h" template diff --git a/externals/dynarmic/tests/A64/a64.cpp b/externals/dynarmic/tests/A64/a64.cpp index 2f2e2f622..795205692 100755 --- a/externals/dynarmic/tests/A64/a64.cpp +++ b/externals/dynarmic/tests/A64/a64.cpp @@ -228,6 +228,66 @@ TEST_CASE("A64: REV16", "[a64]") { REQUIRE(jit.GetPC() == 8); } +TEST_CASE("A64: SSHL", "[a64]") { + A64TestEnv env; + A64::Jit jit{A64::UserConfig{&env}}; + + env.code_mem.emplace_back(0x4e204484); // SSHL v4.16b, v4.16b, v0.16b + env.code_mem.emplace_back(0x4e6144a5); // SSHL v5.8h, v5.8h, v1.8h + env.code_mem.emplace_back(0x4ea244c6); // SSHL v6.4s, v6.4s, v2.4s + env.code_mem.emplace_back(0x4ee344e7); // SSHL v7.2d, v7.2d, v3.2d + env.code_mem.emplace_back(0x14000000); // B . + + jit.SetPC(0); + jit.SetVector(0, {0xEFF0FAFBFCFDFEFF, 0x0807050403020100}); + jit.SetVector(1, {0xFFFCFFFDFFFEFFFF, 0x0004000300020001}); + jit.SetVector(2, {0xFFFFFFFDFFFFFFFE, 0x0000000200000001}); + jit.SetVector(3, {0xFFFFFFFFFFFFFFFF, 0x0000000000000001}); + + jit.SetVector(4, {0x8080808080808080, 0xFFFFFFFFFFFFFFFF}); + jit.SetVector(5, {0x8000800080008000, 0xFFFFFFFFFFFFFFFF}); + jit.SetVector(6, {0x8000000080000000, 0xFFFFFFFFFFFFFFFF}); + jit.SetVector(7, {0x8000000000000000, 0xFFFFFFFFFFFFFFFF}); + + env.ticks_left = 4; + jit.Run(); + + REQUIRE(jit.GetVector(4) == Vector{0xfffffefcf8f0e0c0, 0x0080e0f0f8fcfeff}); + REQUIRE(jit.GetVector(5) == Vector{0xf800f000e000c000, 0xfff0fff8fffcfffe}); + REQUIRE(jit.GetVector(6) == Vector{0xf0000000e0000000, 0xfffffffcfffffffe}); + REQUIRE(jit.GetVector(7) == Vector{0xc000000000000000, 0xfffffffffffffffe}); +} + +TEST_CASE("A64: USHL", "[a64]") { + A64TestEnv env; + A64::Jit jit{A64::UserConfig{&env}}; + + env.code_mem.emplace_back(0x6e204484); // USHL v4.16b, v4.16b, v0.16b + env.code_mem.emplace_back(0x6e6144a5); // USHL v5.8h, v5.8h, v1.8h + env.code_mem.emplace_back(0x6ea244c6); // USHL v6.4s, v6.4s, v2.4s + env.code_mem.emplace_back(0x6ee344e7); // USHL v7.2d, v7.2d, v3.2d + env.code_mem.emplace_back(0x14000000); // B . + + jit.SetPC(0); + jit.SetVector(0, {0x100F0E0D0C0B0A09, 0x0807050403020100}); + jit.SetVector(1, {0x0008000700060005, 0x0004000300020001}); + jit.SetVector(2, {0x0000000400000003, 0x0000000200000001}); + jit.SetVector(3, {0x0000000000000002, 0x0000000000000001}); + + jit.SetVector(4, {0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF}); + jit.SetVector(5, {0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF}); + jit.SetVector(6, {0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF}); + jit.SetVector(7, {0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF}); + + env.ticks_left = 4; + jit.Run(); + + REQUIRE(jit.GetVector(4) == Vector{0x0000000000000000, 0x0080e0f0f8fcfeff}); + REQUIRE(jit.GetVector(5) == Vector{0xff00ff80ffc0ffe0, 0xfff0fff8fffcfffe}); + REQUIRE(jit.GetVector(6) == Vector{0xfffffff0fffffff8, 0xfffffffcfffffffe}); + REQUIRE(jit.GetVector(7) == Vector{0xfffffffffffffffc, 0xfffffffffffffffe}); +} + TEST_CASE("A64: XTN", "[a64]") { A64TestEnv env; A64::Jit jit{A64::UserConfig{&env}}; diff --git a/externals/dynarmic/tests/A64/fuzz_with_unicorn.cpp b/externals/dynarmic/tests/A64/fuzz_with_unicorn.cpp index 433f8ca93..0307751cf 100755 --- a/externals/dynarmic/tests/A64/fuzz_with_unicorn.cpp +++ b/externals/dynarmic/tests/A64/fuzz_with_unicorn.cpp @@ -9,16 +9,16 @@ #include #include +#include +#include #include "../fuzz_util.h" #include "../rand_int.h" #include "../unicorn_emu/a64_unicorn.h" #include "./testenv.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/llvm_disassemble.h" -#include "dynarmic/common/scope_exit.h" #include "dynarmic/frontend/A64/a64_location_descriptor.h" #include "dynarmic/frontend/A64/a64_types.h" #include "dynarmic/frontend/A64/decoder/a64.h" diff --git a/externals/dynarmic/tests/A64/testenv.h b/externals/dynarmic/tests/A64/testenv.h index d18797f20..596d01142 100755 --- a/externals/dynarmic/tests/A64/testenv.h +++ b/externals/dynarmic/tests/A64/testenv.h @@ -8,8 +8,9 @@ #include #include -#include "dynarmic/common/assert.h" -#include "dynarmic/common/common_types.h" +#include +#include + #include "dynarmic/interface/A64/a64.h" using Vector = Dynarmic::A64::Vector; diff --git a/externals/dynarmic/tests/CMakeLists.txt b/externals/dynarmic/tests/CMakeLists.txt index fc44dcc0e..94be83e2f 100755 --- a/externals/dynarmic/tests/CMakeLists.txt +++ b/externals/dynarmic/tests/CMakeLists.txt @@ -51,12 +51,12 @@ include(CreateDirectoryGroups) create_target_directory_groups(dynarmic_tests) create_target_directory_groups(dynarmic_print_info) -target_link_libraries(dynarmic_tests PRIVATE dynarmic boost catch fmt mp xbyak) +target_link_libraries(dynarmic_tests PRIVATE dynarmic boost catch fmt xbyak) target_include_directories(dynarmic_tests PRIVATE . ../src) target_compile_options(dynarmic_tests PRIVATE ${DYNARMIC_CXX_FLAGS}) target_compile_definitions(dynarmic_tests PRIVATE FMT_USE_USER_DEFINED_LITERALS=1 CATCH_CONFIG_ENABLE_BENCHMARKING=1) -target_link_libraries(dynarmic_print_info PRIVATE dynarmic boost catch fmt mp) +target_link_libraries(dynarmic_print_info PRIVATE dynarmic boost catch fmt) target_include_directories(dynarmic_print_info PRIVATE . ../src) target_compile_options(dynarmic_print_info PRIVATE ${DYNARMIC_CXX_FLAGS}) target_compile_definitions(dynarmic_print_info PRIVATE FMT_USE_USER_DEFINED_LITERALS=1) diff --git a/externals/dynarmic/tests/decoder_tests.cpp b/externals/dynarmic/tests/decoder_tests.cpp index b4b122735..519d2b176 100755 --- a/externals/dynarmic/tests/decoder_tests.cpp +++ b/externals/dynarmic/tests/decoder_tests.cpp @@ -8,8 +8,8 @@ #include #include +#include -#include "dynarmic/common/assert.h" #include "dynarmic/frontend/A32/decoder/asimd.h" #include "dynarmic/frontend/A32/translate/impl/a32_translate_impl.h" #include "dynarmic/interface/A32/config.h" diff --git a/externals/dynarmic/tests/fp/FPToFixed.cpp b/externals/dynarmic/tests/fp/FPToFixed.cpp index 354ab4830..9375003f0 100755 --- a/externals/dynarmic/tests/fp/FPToFixed.cpp +++ b/externals/dynarmic/tests/fp/FPToFixed.cpp @@ -7,9 +7,9 @@ #include #include +#include #include "../rand_int.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/op.h" diff --git a/externals/dynarmic/tests/fp/mantissa_util_tests.cpp b/externals/dynarmic/tests/fp/mantissa_util_tests.cpp index ce833ff67..76311f1f0 100755 --- a/externals/dynarmic/tests/fp/mantissa_util_tests.cpp +++ b/externals/dynarmic/tests/fp/mantissa_util_tests.cpp @@ -7,9 +7,9 @@ #include #include +#include #include "../rand_int.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/fp/mantissa_util.h" #include "dynarmic/common/safe_ops.h" @@ -37,7 +37,7 @@ TEST_CASE("ResidualErrorOnRightShift", "[fp]") { TEST_CASE("ResidualErrorOnRightShift Randomized", "[fp]") { for (size_t test = 0; test < 100000; test++) { - const u64 mantissa = Common::SignExtend<32, u64>(RandInt(0, 0xFFFFFFFF)); + const u64 mantissa = mcl::bit::sign_extend<32, u64>(RandInt(0, 0xFFFFFFFF)); const int shift = RandInt(-60, 60); const ResidualError result = ResidualErrorOnRightShift(mantissa, shift); diff --git a/externals/dynarmic/tests/fp/unpacked_tests.cpp b/externals/dynarmic/tests/fp/unpacked_tests.cpp index d201e7ecd..d61f514f9 100755 --- a/externals/dynarmic/tests/fp/unpacked_tests.cpp +++ b/externals/dynarmic/tests/fp/unpacked_tests.cpp @@ -7,9 +7,9 @@ #include #include +#include #include "../rand_int.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/unpacked.h" diff --git a/externals/dynarmic/tests/fuzz_util.cpp b/externals/dynarmic/tests/fuzz_util.cpp index 1de6c29f2..12dc850b4 100755 --- a/externals/dynarmic/tests/fuzz_util.cpp +++ b/externals/dynarmic/tests/fuzz_util.cpp @@ -9,9 +9,9 @@ #include #include +#include #include "./rand_int.h" -#include "dynarmic/common/assert.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/rounding_mode.h" diff --git a/externals/dynarmic/tests/fuzz_util.h b/externals/dynarmic/tests/fuzz_util.h index 043342727..953030772 100755 --- a/externals/dynarmic/tests/fuzz_util.h +++ b/externals/dynarmic/tests/fuzz_util.h @@ -8,7 +8,7 @@ #include #include -#include "dynarmic/common/common_types.h" +#include using Vector = std::array; diff --git a/externals/dynarmic/tests/print_info.cpp b/externals/dynarmic/tests/print_info.cpp index c20ac3717..d7978fd80 100755 --- a/externals/dynarmic/tests/print_info.cpp +++ b/externals/dynarmic/tests/print_info.cpp @@ -14,9 +14,9 @@ #include #include +#include +#include -#include "dynarmic/common/bit_util.h" -#include "dynarmic/common/common_types.h" #include "dynarmic/common/llvm_disassemble.h" #include "dynarmic/frontend/A32/a32_location_descriptor.h" #include "dynarmic/frontend/A32/decoder/arm.h" @@ -98,7 +98,7 @@ void PrintA64Instruction(u32 instruction) { void PrintThumbInstruction(u32 instruction) { const size_t inst_size = (instruction >> 16) == 0 ? 2 : 4; if (inst_size == 4) - instruction = Common::SwapHalves32(instruction); + instruction = mcl::bit::swap_halves_32(instruction); fmt::print("{:08x} {}\n", instruction, Common::DisassembleAArch32(true, 0, (u8*)&instruction, inst_size)); diff --git a/externals/dynarmic/tests/rsqrt_test.cpp b/externals/dynarmic/tests/rsqrt_test.cpp index f367da878..cb49ca0c1 100755 --- a/externals/dynarmic/tests/rsqrt_test.cpp +++ b/externals/dynarmic/tests/rsqrt_test.cpp @@ -5,8 +5,8 @@ #include #include +#include -#include "dynarmic/common/common_types.h" #include "dynarmic/common/fp/fpcr.h" #include "dynarmic/common/fp/fpsr.h" #include "dynarmic/common/fp/op/FPRSqrtEstimate.h" diff --git a/externals/dynarmic/tests/unicorn_emu/a32_unicorn.cpp b/externals/dynarmic/tests/unicorn_emu/a32_unicorn.cpp index d9a68662e..f3ffa0daf 100755 --- a/externals/dynarmic/tests/unicorn_emu/a32_unicorn.cpp +++ b/externals/dynarmic/tests/unicorn_emu/a32_unicorn.cpp @@ -7,9 +7,10 @@ #include +#include +#include + #include "../A32/testenv.h" -#include "dynarmic/common/assert.h" -#include "dynarmic/common/bit_util.h" #define CHECKED(expr) \ do { \ @@ -60,7 +61,7 @@ void A32Unicorn::Run() { } } - const bool T = Dynarmic::Common::Bit<5>(GetCpsr()); + const bool T = mcl::bit::get_bit<5>(GetCpsr()); const u32 new_pc = GetPC() | (T ? 1 : 0); SetPC(new_pc); } @@ -262,7 +263,7 @@ void A32Unicorn::InterruptHook(uc_engine* /*uc*/, u32 int_numbe auto* this_ = static_cast(user_data); u32 esr = 0; - //CHECKED(uc_reg_read(uc, UC_ARM_REG_ESR, &esr)); + // CHECKED(uc_reg_read(uc, UC_ARM_REG_ESR, &esr)); auto ec = esr >> 26; auto iss = esr & 0xFFFFFF; diff --git a/externals/dynarmic/tests/unicorn_emu/a32_unicorn.h b/externals/dynarmic/tests/unicorn_emu/a32_unicorn.h index 1cf06a02f..d4fe3c41a 100755 --- a/externals/dynarmic/tests/unicorn_emu/a32_unicorn.h +++ b/externals/dynarmic/tests/unicorn_emu/a32_unicorn.h @@ -16,8 +16,9 @@ # include #endif +#include + #include "../A32/testenv.h" -#include "dynarmic/common/common_types.h" namespace Unicorn::A32 { static constexpr size_t num_gprs = 16; diff --git a/externals/dynarmic/tests/unicorn_emu/a64_unicorn.cpp b/externals/dynarmic/tests/unicorn_emu/a64_unicorn.cpp index 583e04d9a..f4e14b25b 100755 --- a/externals/dynarmic/tests/unicorn_emu/a64_unicorn.cpp +++ b/externals/dynarmic/tests/unicorn_emu/a64_unicorn.cpp @@ -5,7 +5,7 @@ #include "./a64_unicorn.h" -#include "dynarmic/common/assert.h" +#include #define CHECKED(expr) \ do { \ diff --git a/externals/dynarmic/tests/unicorn_emu/a64_unicorn.h b/externals/dynarmic/tests/unicorn_emu/a64_unicorn.h index 580c88a0f..57759605f 100755 --- a/externals/dynarmic/tests/unicorn_emu/a64_unicorn.h +++ b/externals/dynarmic/tests/unicorn_emu/a64_unicorn.h @@ -16,8 +16,9 @@ # include #endif +#include + #include "../A64/testenv.h" -#include "dynarmic/common/common_types.h" class A64Unicorn final { public: