forked from etc/pineapple-src
early-access version 2612
This commit is contained in:
parent
3996303be5
commit
7770034e0c
8 changed files with 8 additions and 66 deletions
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@ -1,7 +1,7 @@
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yuzu emulator early access
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yuzu emulator early access
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=============
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=============
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This is the source code for early-access 2610.
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This is the source code for early-access 2612.
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## Legal Notice
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## Legal Notice
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@ -563,6 +563,9 @@ ResultCode KPageTable::UnmapProcessMemory(VAddr dst_addr, std::size_t size,
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block_manager->Update(dst_addr, num_pages, KMemoryState::Free, KMemoryPermission::None,
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block_manager->Update(dst_addr, num_pages, KMemoryState::Free, KMemoryPermission::None,
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KMemoryAttribute::None);
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KMemoryAttribute::None);
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// Invalidate CPU cache, as code may have been patched by the guest app.
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system.InvalidateCpuInstructionCaches();
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return ResultSuccess;
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return ResultSuccess;
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}
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}
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@ -322,7 +322,7 @@ struct Memory::Impl {
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}
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}
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if (Settings::IsFastmemEnabled()) {
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if (Settings::IsFastmemEnabled()) {
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const bool is_read_enable = !Settings::IsGPULevelExtreme() || !cached;
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const bool is_read_enable = Settings::IsGPULevelHigh() || !cached;
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system.DeviceMemory().buffer.Protect(vaddr, size, is_read_enable, !cached);
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system.DeviceMemory().buffer.Protect(vaddr, size, is_read_enable, !cached);
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}
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}
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@ -352,7 +352,7 @@ void RasterizerOpenGL::OnCPUWrite(VAddr addr, u64 size) {
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shader_cache.OnCPUWrite(addr, size);
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shader_cache.OnCPUWrite(addr, size);
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{
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{
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std::scoped_lock lock{texture_cache.mutex};
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std::scoped_lock lock{texture_cache.mutex};
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texture_cache.CachedWriteMemory(addr, size);
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texture_cache.WriteMemory(addr, size);
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}
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}
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{
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{
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std::scoped_lock lock{buffer_cache.mutex};
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std::scoped_lock lock{buffer_cache.mutex};
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@ -363,10 +363,6 @@ void RasterizerOpenGL::OnCPUWrite(VAddr addr, u64 size) {
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void RasterizerOpenGL::SyncGuestHost() {
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void RasterizerOpenGL::SyncGuestHost() {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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shader_cache.SyncGuestHost();
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shader_cache.SyncGuestHost();
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{
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std::scoped_lock lock{texture_cache.mutex};
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texture_cache.FlushCachedWrites();
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}
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{
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{
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std::scoped_lock lock{buffer_cache.mutex};
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std::scoped_lock lock{buffer_cache.mutex};
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buffer_cache.FlushCachedWrites();
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buffer_cache.FlushCachedWrites();
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@ -408,7 +408,7 @@ void RasterizerVulkan::OnCPUWrite(VAddr addr, u64 size) {
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pipeline_cache.OnCPUWrite(addr, size);
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pipeline_cache.OnCPUWrite(addr, size);
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{
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{
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std::scoped_lock lock{texture_cache.mutex};
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std::scoped_lock lock{texture_cache.mutex};
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texture_cache.CachedWriteMemory(addr, size);
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texture_cache.WriteMemory(addr, size);
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}
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}
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{
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{
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std::scoped_lock lock{buffer_cache.mutex};
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std::scoped_lock lock{buffer_cache.mutex};
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@ -418,10 +418,6 @@ void RasterizerVulkan::OnCPUWrite(VAddr addr, u64 size) {
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void RasterizerVulkan::SyncGuestHost() {
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void RasterizerVulkan::SyncGuestHost() {
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pipeline_cache.SyncGuestHost();
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pipeline_cache.SyncGuestHost();
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{
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std::scoped_lock lock{texture_cache.mutex};
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texture_cache.FlushCachedWrites();
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}
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{
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{
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std::scoped_lock lock{buffer_cache.mutex};
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std::scoped_lock lock{buffer_cache.mutex};
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buffer_cache.FlushCachedWrites();
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buffer_cache.FlushCachedWrites();
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@ -39,9 +39,6 @@ enum class ImageFlagBits : u32 {
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Rescaled = 1 << 13,
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Rescaled = 1 << 13,
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CheckingRescalable = 1 << 14,
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CheckingRescalable = 1 << 14,
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IsRescalable = 1 << 15,
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IsRescalable = 1 << 15,
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// Cached CPU
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CachedCpuModified = 1 << 16, ///< Contents have been modified from the CPU
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};
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};
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DECLARE_ENUM_FLAG_OPERATORS(ImageFlagBits)
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DECLARE_ENUM_FLAG_OPERATORS(ImageFlagBits)
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@ -437,23 +437,6 @@ void TextureCache<P>::WriteMemory(VAddr cpu_addr, size_t size) {
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});
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});
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}
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}
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template <class P>
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void TextureCache<P>::CachedWriteMemory(VAddr cpu_addr, size_t size) {
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const VAddr new_cpu_addr = Common::AlignDown(cpu_addr, CPU_PAGE_SIZE);
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const size_t new_size = Common::AlignUp(size + cpu_addr - new_cpu_addr, CPU_PAGE_SIZE);
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ForEachImageInRegion(new_cpu_addr, new_size, [this](ImageId image_id, Image& image) {
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if (True(image.flags & ImageFlagBits::CachedCpuModified)) {
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return;
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}
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image.flags |= ImageFlagBits::CachedCpuModified;
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cached_cpu_invalidate.insert(image_id);
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if (True(image.flags & ImageFlagBits::Tracked)) {
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UntrackImage(image, image_id);
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}
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});
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}
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template <class P>
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template <class P>
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void TextureCache<P>::DownloadMemory(VAddr cpu_addr, size_t size) {
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void TextureCache<P>::DownloadMemory(VAddr cpu_addr, size_t size) {
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std::vector<ImageId> images;
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std::vector<ImageId> images;
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}
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}
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}
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}
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template <class P>
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void TextureCache<P>::FlushCachedWrites() {
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for (ImageId image_id : cached_cpu_invalidate) {
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Image& image = slot_images[image_id];
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if (True(image.flags & ImageFlagBits::CachedCpuModified)) {
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image.flags &= ~ImageFlagBits::CachedCpuModified;
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image.flags |= ImageFlagBits::CpuModified;
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}
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}
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cached_cpu_invalidate.clear();
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}
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template <class P>
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template <class P>
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void TextureCache<P>::BlitImage(const Tegra::Engines::Fermi2D::Surface& dst,
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void TextureCache<P>::BlitImage(const Tegra::Engines::Fermi2D::Surface& dst,
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const Tegra::Engines::Fermi2D::Surface& src,
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const Tegra::Engines::Fermi2D::Surface& src,
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template <class P>
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template <class P>
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void TextureCache<P>::TrackImage(ImageBase& image, ImageId image_id) {
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void TextureCache<P>::TrackImage(ImageBase& image, ImageId image_id) {
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ASSERT(False(image.flags & ImageFlagBits::Tracked));
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ASSERT(False(image.flags & ImageFlagBits::Tracked));
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if (True(image.flags & ImageFlagBits::CachedCpuModified)) {
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return;
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}
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image.flags |= ImageFlagBits::Tracked;
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image.flags |= ImageFlagBits::Tracked;
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if (False(image.flags & ImageFlagBits::Sparse)) {
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if (False(image.flags & ImageFlagBits::Sparse)) {
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rasterizer.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, 1);
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rasterizer.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, 1);
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tentative_size = EstimatedDecompressedSize(tentative_size, image.info.format);
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tentative_size = EstimatedDecompressedSize(tentative_size, image.info.format);
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}
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}
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total_used_memory -= Common::AlignUp(tentative_size, 1024);
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total_used_memory -= Common::AlignUp(tentative_size, 1024);
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if (True(image.flags & ImageFlagBits::CachedCpuModified)) {
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cached_cpu_invalidate.erase(image_id);
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}
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const GPUVAddr gpu_addr = image.gpu_addr;
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const GPUVAddr gpu_addr = image.gpu_addr;
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const auto alloc_it = image_allocs_table.find(gpu_addr);
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const auto alloc_it = image_allocs_table.find(gpu_addr);
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if (alloc_it == image_allocs_table.end()) {
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if (alloc_it == image_allocs_table.end()) {
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void TextureCache<P>::PrepareImage(ImageId image_id, bool is_modification, bool invalidate) {
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void TextureCache<P>::PrepareImage(ImageId image_id, bool is_modification, bool invalidate) {
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Image& image = slot_images[image_id];
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Image& image = slot_images[image_id];
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if (invalidate) {
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if (invalidate) {
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if (True(image.flags & ImageFlagBits::CachedCpuModified)) {
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image.flags &= ~(ImageFlagBits::CpuModified | ImageFlagBits::GpuModified);
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cached_cpu_invalidate.erase(image_id);
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}
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image.flags &= ~(ImageFlagBits::CpuModified | ImageFlagBits::GpuModified |
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ImageFlagBits::CachedCpuModified);
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if (False(image.flags & ImageFlagBits::Tracked)) {
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if (False(image.flags & ImageFlagBits::Tracked)) {
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TrackImage(image, image_id);
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TrackImage(image, image_id);
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}
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}
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#include <span>
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#include <span>
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#include <type_traits>
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#include <type_traits>
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#include <unordered_map>
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#include <unordered_map>
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#include <unordered_set>
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#include <vector>
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#include <vector>
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#include <queue>
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#include <queue>
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/// Address shift for caching images into a hash table
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/// Address shift for caching images into a hash table
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static constexpr u64 PAGE_BITS = 20;
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static constexpr u64 PAGE_BITS = 20;
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static constexpr u64 CPU_PAGE_BITS = 12;
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static constexpr u64 CPU_PAGE_SIZE = 1ULL << CPU_PAGE_BITS;
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/// Enables debugging features to the texture cache
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/// Enables debugging features to the texture cache
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static constexpr bool ENABLE_VALIDATION = P::ENABLE_VALIDATION;
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static constexpr bool ENABLE_VALIDATION = P::ENABLE_VALIDATION;
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/// Implement blits as copies between framebuffers
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/// Implement blits as copies between framebuffers
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/// Mark images in a range as modified from the CPU
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/// Mark images in a range as modified from the CPU
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void WriteMemory(VAddr cpu_addr, size_t size);
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void WriteMemory(VAddr cpu_addr, size_t size);
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/// Mark images in a range as modified from the CPU
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void CachedWriteMemory(VAddr cpu_addr, size_t size);
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/// Download contents of host images to guest memory in a region
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/// Download contents of host images to guest memory in a region
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void DownloadMemory(VAddr cpu_addr, size_t size);
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void DownloadMemory(VAddr cpu_addr, size_t size);
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/// Remove images in a region
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/// Remove images in a region
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void UnmapGPUMemory(GPUVAddr gpu_addr, size_t size);
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void UnmapGPUMemory(GPUVAddr gpu_addr, size_t size);
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void FlushCachedWrites();
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/// Blit an image with the given parameters
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/// Blit an image with the given parameters
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void BlitImage(const Tegra::Engines::Fermi2D::Surface& dst,
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void BlitImage(const Tegra::Engines::Fermi2D::Surface& dst,
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const Tegra::Engines::Fermi2D::Surface& src,
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const Tegra::Engines::Fermi2D::Surface& src,
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std::unordered_map<ImageId, std::vector<ImageViewId>> sparse_views;
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std::unordered_map<ImageId, std::vector<ImageViewId>> sparse_views;
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std::unordered_set<ImageId> cached_cpu_invalidate;
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VAddr virtual_invalid_space{};
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VAddr virtual_invalid_space{};
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bool has_deleted_images = false;
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bool has_deleted_images = false;
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