forked from etc/pineapple-src
370 lines
10 KiB
NASM
370 lines
10 KiB
NASM
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; *****************************************************************************
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; * Provide SIMD optimizations for add_residual functions for HEVC decoding
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; * Copyright (c) 2014 Pierre-Edouard LEPERE
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; *
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; * This file is part of FFmpeg.
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; *
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; * FFmpeg is free software; you can redistribute it and/or
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; * modify it under the terms of the GNU Lesser General Public
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; * License as published by the Free Software Foundation; either
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; * version 2.1 of the License, or (at your option) any later version.
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; *
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; * FFmpeg is distributed in the hope that it will be useful,
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; * but WITHOUT ANY WARRANTY; without even the implied warranty of
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; * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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; * Lesser General Public License for more details.
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; *
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; * You should have received a copy of the GNU Lesser General Public
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; * License along with FFmpeg; if not, write to the Free Software
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; * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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; ******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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cextern pw_1023
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%define max_pixels_10 pw_1023
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; the add_res macros and functions were largely inspired by h264_idct.asm from the x264 project
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%macro ADD_RES_MMX_4_8 0
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mova m0, [r1]
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mova m2, [r1+8]
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movd m1, [r0]
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movd m3, [r0+r2]
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punpcklbw m1, m4
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punpcklbw m3, m4
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paddsw m0, m1
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paddsw m2, m3
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packuswb m0, m4
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packuswb m2, m4
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movd [r0], m0
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movd [r0+r2], m2
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%endmacro
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INIT_MMX mmxext
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; void ff_hevc_add_residual_4_8_mmxext(uint8_t *dst, int16_t *res, ptrdiff_t stride)
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cglobal hevc_add_residual_4_8, 3, 3, 6
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pxor m4, m4
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ADD_RES_MMX_4_8
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add r1, 16
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lea r0, [r0+r2*2]
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ADD_RES_MMX_4_8
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RET
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%macro ADD_RES_SSE_8_8 0
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movq m0, [r0]
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movq m1, [r0+r2]
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punpcklbw m0, m4
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punpcklbw m1, m4
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mova m2, [r1]
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mova m3, [r1+16]
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paddsw m0, m2
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paddsw m1, m3
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packuswb m0, m1
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movq m2, [r0+r2*2]
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movq m3, [r0+r3]
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punpcklbw m2, m4
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punpcklbw m3, m4
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mova m6, [r1+32]
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mova m7, [r1+48]
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paddsw m2, m6
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paddsw m3, m7
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packuswb m2, m3
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movq [r0], m0
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movhps [r0+r2], m0
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movq [r0+r2*2], m2
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movhps [r0+r3], m2
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%endmacro
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%macro ADD_RES_SSE_16_32_8 3
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mova m1, [%2]
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mova m2, m1
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punpcklbw m1, m0
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punpckhbw m2, m0
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mova xm5, [r1+%1]
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mova xm6, [r1+%1+16]
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%if cpuflag(avx2)
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vinserti128 m5, m5, [r1+%1+32], 1
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vinserti128 m6, m6, [r1+%1+48], 1
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%endif
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paddsw m1, m5
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paddsw m2, m6
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mova m3, [%3]
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mova m4, m3
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punpcklbw m3, m0
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punpckhbw m4, m0
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mova xm5, [r1+%1+mmsize*2]
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mova xm6, [r1+%1+mmsize*2+16]
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%if cpuflag(avx2)
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vinserti128 m5, m5, [r1+%1+96], 1
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vinserti128 m6, m6, [r1+%1+112], 1
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%endif
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paddsw m3, m5
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paddsw m4, m6
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packuswb m1, m2
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packuswb m3, m4
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mova [%2], m1
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mova [%3], m3
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%endmacro
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%macro TRANSFORM_ADD_8 0
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; void ff_hevc_add_residual_8_8_<opt>(uint8_t *dst, int16_t *res, ptrdiff_t stride)
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cglobal hevc_add_residual_8_8, 3, 4, 8
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pxor m4, m4
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lea r3, [r2*3]
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ADD_RES_SSE_8_8
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add r1, 64
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lea r0, [r0+r2*4]
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ADD_RES_SSE_8_8
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RET
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; void ff_hevc_add_residual_16_8_<opt>(uint8_t *dst, int16_t *res, ptrdiff_t stride)
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cglobal hevc_add_residual_16_8, 3, 5, 7
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pxor m0, m0
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lea r3, [r2*3]
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mov r4d, 4
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.loop:
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ADD_RES_SSE_16_32_8 0, r0, r0+r2
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ADD_RES_SSE_16_32_8 64, r0+r2*2, r0+r3
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add r1, 128
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lea r0, [r0+r2*4]
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dec r4d
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jg .loop
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RET
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; void ff_hevc_add_residual_32_8_<opt>(uint8_t *dst, int16_t *res, ptrdiff_t stride)
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cglobal hevc_add_residual_32_8, 3, 5, 7
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pxor m0, m0
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mov r4d, 16
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.loop:
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ADD_RES_SSE_16_32_8 0, r0, r0+16
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ADD_RES_SSE_16_32_8 64, r0+r2, r0+r2+16
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add r1, 128
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lea r0, [r0+r2*2]
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dec r4d
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jg .loop
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RET
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%endmacro
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INIT_XMM sse2
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TRANSFORM_ADD_8
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INIT_XMM avx
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TRANSFORM_ADD_8
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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; void ff_hevc_add_residual_32_8_avx2(uint8_t *dst, int16_t *res, ptrdiff_t stride)
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cglobal hevc_add_residual_32_8, 3, 5, 7
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pxor m0, m0
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lea r3, [r2*3]
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mov r4d, 8
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.loop:
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ADD_RES_SSE_16_32_8 0, r0, r0+r2
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ADD_RES_SSE_16_32_8 128, r0+r2*2, r0+r3
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add r1, 256
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lea r0, [r0+r2*4]
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dec r4d
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jg .loop
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RET
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%endif ;HAVE_AVX2_EXTERNAL
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%macro ADD_RES_SSE_8_10 4
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mova m0, [%4]
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mova m1, [%4+16]
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mova m2, [%4+32]
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mova m3, [%4+48]
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paddw m0, [%1+0]
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paddw m1, [%1+%2]
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paddw m2, [%1+%2*2]
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paddw m3, [%1+%3]
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CLIPW m0, m4, m5
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CLIPW m1, m4, m5
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CLIPW m2, m4, m5
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CLIPW m3, m4, m5
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mova [%1+0], m0
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mova [%1+%2], m1
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mova [%1+%2*2], m2
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mova [%1+%3], m3
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%endmacro
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%macro ADD_RES_MMX_4_10 3
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mova m0, [%1+0]
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mova m1, [%1+%2]
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paddw m0, [%3]
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paddw m1, [%3+8]
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CLIPW m0, m2, m3
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CLIPW m1, m2, m3
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mova [%1+0], m0
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mova [%1+%2], m1
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%endmacro
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%macro ADD_RES_SSE_16_10 3
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mova m0, [%3]
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mova m1, [%3+16]
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mova m2, [%3+32]
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mova m3, [%3+48]
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paddw m0, [%1]
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paddw m1, [%1+16]
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paddw m2, [%1+%2]
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paddw m3, [%1+%2+16]
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CLIPW m0, m4, m5
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CLIPW m1, m4, m5
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CLIPW m2, m4, m5
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CLIPW m3, m4, m5
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mova [%1], m0
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mova [%1+16], m1
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mova [%1+%2], m2
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mova [%1+%2+16], m3
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%endmacro
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%macro ADD_RES_SSE_32_10 2
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mova m0, [%2]
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mova m1, [%2+16]
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mova m2, [%2+32]
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mova m3, [%2+48]
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paddw m0, [%1]
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paddw m1, [%1+16]
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paddw m2, [%1+32]
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paddw m3, [%1+48]
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CLIPW m0, m4, m5
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CLIPW m1, m4, m5
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CLIPW m2, m4, m5
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CLIPW m3, m4, m5
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mova [%1], m0
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mova [%1+16], m1
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mova [%1+32], m2
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mova [%1+48], m3
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%endmacro
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%macro ADD_RES_AVX2_16_10 4
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mova m0, [%4]
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mova m1, [%4+32]
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mova m2, [%4+64]
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mova m3, [%4+96]
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paddw m0, [%1+0]
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paddw m1, [%1+%2]
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paddw m2, [%1+%2*2]
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paddw m3, [%1+%3]
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CLIPW m0, m4, m5
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CLIPW m1, m4, m5
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CLIPW m2, m4, m5
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CLIPW m3, m4, m5
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mova [%1+0], m0
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mova [%1+%2], m1
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mova [%1+%2*2], m2
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mova [%1+%3], m3
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%endmacro
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%macro ADD_RES_AVX2_32_10 3
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mova m0, [%3]
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mova m1, [%3+32]
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mova m2, [%3+64]
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mova m3, [%3+96]
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paddw m0, [%1]
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paddw m1, [%1+32]
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paddw m2, [%1+%2]
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paddw m3, [%1+%2+32]
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CLIPW m0, m4, m5
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CLIPW m1, m4, m5
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CLIPW m2, m4, m5
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CLIPW m3, m4, m5
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mova [%1], m0
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mova [%1+32], m1
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mova [%1+%2], m2
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mova [%1+%2+32], m3
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%endmacro
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; void ff_hevc_add_residual_<4|8|16|32>_10(pixel *dst, int16_t *block, ptrdiff_t stride)
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INIT_MMX mmxext
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cglobal hevc_add_residual_4_10, 3, 3, 6
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pxor m2, m2
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mova m3, [max_pixels_10]
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ADD_RES_MMX_4_10 r0, r2, r1
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add r1, 16
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lea r0, [r0+2*r2]
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ADD_RES_MMX_4_10 r0, r2, r1
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RET
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INIT_XMM sse2
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cglobal hevc_add_residual_8_10, 3, 4, 6
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pxor m4, m4
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mova m5, [max_pixels_10]
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lea r3, [r2*3]
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ADD_RES_SSE_8_10 r0, r2, r3, r1
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lea r0, [r0+r2*4]
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add r1, 64
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ADD_RES_SSE_8_10 r0, r2, r3, r1
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RET
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cglobal hevc_add_residual_16_10, 3, 5, 6
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pxor m4, m4
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mova m5, [max_pixels_10]
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mov r4d, 8
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.loop:
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ADD_RES_SSE_16_10 r0, r2, r1
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lea r0, [r0+r2*2]
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add r1, 64
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dec r4d
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jg .loop
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RET
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cglobal hevc_add_residual_32_10, 3, 5, 6
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pxor m4, m4
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mova m5, [max_pixels_10]
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mov r4d, 32
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.loop:
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ADD_RES_SSE_32_10 r0, r1
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lea r0, [r0+r2]
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add r1, 64
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dec r4d
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jg .loop
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RET
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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cglobal hevc_add_residual_16_10, 3, 5, 6
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pxor m4, m4
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mova m5, [max_pixels_10]
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lea r3, [r2*3]
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mov r4d, 4
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.loop:
|
||
|
|
ADD_RES_AVX2_16_10 r0, r2, r3, r1
|
||
|
|
lea r0, [r0+r2*4]
|
||
|
|
add r1, 128
|
||
|
|
dec r4d
|
||
|
|
jg .loop
|
||
|
|
RET
|
||
|
|
|
||
|
|
cglobal hevc_add_residual_32_10, 3, 5, 6
|
||
|
|
pxor m4, m4
|
||
|
|
mova m5, [max_pixels_10]
|
||
|
|
|
||
|
|
mov r4d, 16
|
||
|
|
.loop:
|
||
|
|
ADD_RES_AVX2_32_10 r0, r2, r1
|
||
|
|
lea r0, [r0+r2*2]
|
||
|
|
add r1, 128
|
||
|
|
dec r4d
|
||
|
|
jg .loop
|
||
|
|
RET
|
||
|
|
%endif ;HAVE_AVX2_EXTERNAL
|