- changed HW IO map to use virtual addresses
- added hooks to catch LCD IO read/writes
This commit is contained in:
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9e047e32d4
commit
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4 changed files with 64 additions and 42 deletions
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@ -12,49 +12,42 @@
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namespace HW {
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namespace HW {
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enum {
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enum {
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ADDRESS_CONFIG = 0x10000000,
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VADDR_HASH = 0x1EC01000,
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ADDRESS_IRQ = 0x10001000,
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VADDR_CSND = 0x1EC03000,
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ADDRESS_NDMA = 0x10002000,
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VADDR_DSP = 0x1EC40000,
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ADDRESS_TIMER = 0x10003000,
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VADDR_PDN = 0x1EC41000,
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ADDRESS_CTRCARD = 0x10004000,
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VADDR_CODEC = 0x1EC41000,
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ADDRESS_CTRCARD_2 = 0x10005000,
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VADDR_SPI = 0x1EC42000,
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ADDRESS_SDMC_NAND = 0x10006000,
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VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
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ADDRESS_SDMC_NAND_2 = 0x10007000, // Apparently not used on retail
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VADDR_I2C = 0x1EC44000,
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ADDRESS_PXI = 0x10008000,
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VADDR_CODEC_2 = 0x1EC45000,
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ADDRESS_AES = 0x10009000,
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VADDR_HID = 0x1EC46000,
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ADDRESS_SHA = 0x1000A000,
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VADDR_PAD = 0x1EC46000,
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ADDRESS_RSA = 0x1000B000,
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VADDR_PTM = 0x1EC46000,
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ADDRESS_XDMA = 0x1000C000,
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VADDR_GPIO = 0x1EC47000,
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ADDRESS_SPICARD = 0x1000D800,
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VADDR_I2C_2 = 0x1EC48000,
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ADDRESS_CONFIG_2 = 0x10010000,
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VADDR_SPI_3 = 0x1EC60000,
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ADDRESS_HASH = 0x10101000,
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VADDR_I2C_3 = 0x1EC61000,
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ADDRESS_CSND = 0x10103000,
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VADDR_MIC = 0x1EC62000,
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ADDRESS_DSP = 0x10140000,
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VADDR_PXI = 0x1EC63000, // 0xFFFD2000
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ADDRESS_PDN = 0x10141000,
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//VADDR_NTRCARD
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ADDRESS_CODEC = 0x10141000,
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VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
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ADDRESS_SPI = 0x10142000,
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VADDR_DSP_2 = 0x1ED03000,
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ADDRESS_SPI_2 = 0x10143000,
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VADDR_HASH_2 = 0x1EE01000,
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ADDRESS_I2C = 0x10144000,
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VADDR_LCD = 0x1EF00000,
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ADDRESS_CODEC_2 = 0x10145000,
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ADDRESS_HID = 0x10146000,
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ADDRESS_PAD = 0x10146000,
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ADDRESS_PTM = 0x10146000,
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ADDRESS_I2C_2 = 0x10148000,
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ADDRESS_SPI_3 = 0x10160000,
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ADDRESS_I2C_3 = 0x10161000,
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ADDRESS_MIC = 0x10162000,
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ADDRESS_PXI_2 = 0x10163000,
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ADDRESS_NTRCARD = 0x10164000,
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ADDRESS_DSP_2 = 0x10203000,
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ADDRESS_HASH_2 = 0x10301000,
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};
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};
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template <typename T>
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template <typename T>
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inline void Read(T &var, const u32 addr) {
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inline void Read(T &var, const u32 addr) {
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switch (addr & 0xFFFFF000) {
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switch (addr & 0xFFFFF000) {
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case ADDRESS_NDMA:
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// TODO(bunnei): What is the virtual address of NDMA?
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NDMA::Read(var, addr);
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// case VADDR_NDMA:
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// NDMA::Read(var, addr);
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// break;
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case VADDR_LCD:
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LCD::Read(var, addr);
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break;
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break;
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default:
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default:
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@ -66,8 +59,13 @@ template <typename T>
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inline void Write(u32 addr, const T data) {
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inline void Write(u32 addr, const T data) {
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switch (addr & 0xFFFFF000) {
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switch (addr & 0xFFFFF000) {
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case ADDRESS_NDMA:
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// TODO(bunnei): What is the virtual address of NDMA?
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NDMA::Write(addr, data);
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// case VADDR_NDMA
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// NDMA::Write(addr, data);
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// break;
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case VADDR_LCD:
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LCD::Write(addr, data);
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break;
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break;
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default:
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default:
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@ -18,12 +18,26 @@ u64 g_last_ticks = 0; ///< Last CPU ticks
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template <typename T>
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template <typename T>
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inline void Read(T &var, const u32 addr) {
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inline void Read(T &var, const u32 addr) {
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ERROR_LOG(LCD, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
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}
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}
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template <typename T>
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template <typename T>
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inline void Write(u32 addr, const T data) {
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inline void Write(u32 addr, const T data) {
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ERROR_LOG(LCD, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
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}
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}
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// Explicitly instantiate template functions because we aren't defining this in the header:
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template void Read<u64>(u64 &var, const u32 addr);
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template void Read<u32>(u32 &var, const u32 addr);
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template void Read<u16>(u16 &var, const u32 addr);
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template void Read<u8>(u8 &var, const u32 addr);
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template void Write<u64>(u32 addr, const u64 data);
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template void Write<u32>(u32 addr, const u32 data);
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template void Write<u16>(u32 addr, const u16 data);
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template void Write<u8>(u32 addr, const u8 data);
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/// Update hardware
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/// Update hardware
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void Update() {
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void Update() {
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u64 current_ticks = Core::g_app_core->GetTicks();
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u64 current_ticks = Core::g_app_core->GetTicks();
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@ -48,7 +48,9 @@ enum {
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FCRAM_VADDR = 0x08000000, ///< FCRAM virtual address
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FCRAM_VADDR = 0x08000000, ///< FCRAM virtual address
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FCRAM_VADDR_END = (FCRAM_VADDR + FCRAM_SIZE), ///< FCRAM end of virtual space
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FCRAM_VADDR_END = (FCRAM_VADDR + FCRAM_SIZE), ///< FCRAM end of virtual space
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HARDWARE_IO_VADDR = 0x1EC00000,
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HARDWARE_IO_PADDR = 0x10000000, ///< IO physical address start
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HARDWARE_IO_VADDR = 0x1EC00000, ///< IO virtual address start
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HARDWARE_IO_PADDR_END = (HARDWARE_IO_PADDR + HARDWARE_IO_SIZE),
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HARDWARE_IO_VADDR_END = (HARDWARE_IO_VADDR + HARDWARE_IO_SIZE),
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HARDWARE_IO_VADDR_END = (HARDWARE_IO_VADDR + HARDWARE_IO_SIZE),
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VRAM_VADDR = 0x1F000000,
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VRAM_VADDR = 0x1F000000,
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@ -21,8 +21,16 @@ u32 _AddressPhysicalToVirtual(const u32 addr) {
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// Our memory interface read/write functions assume virtual addresses. Put any physical address
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// Our memory interface read/write functions assume virtual addresses. Put any physical address
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// to virtual address translations here. This is obviously quite hacky... But we're not doing
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// to virtual address translations here. This is obviously quite hacky... But we're not doing
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// any MMU emulation yet or anything
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// any MMU emulation yet or anything
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if ((addr >= FCRAM_PADDR) && (addr < (FCRAM_PADDR_END))) {
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if ((addr >= FCRAM_PADDR) && (addr < FCRAM_PADDR_END)) {
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return (addr & FCRAM_MASK) | FCRAM_VADDR;
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return (addr & FCRAM_MASK) | FCRAM_VADDR;
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// Hardware IO
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// TODO(bunnei): FixMe
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// This isn't going to work... The physical address of HARDWARE_IO conflicts with the virtual
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// address of shared memory.
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//} else if ((addr >= HARDWARE_IO_PADDR) && (addr < HARDWARE_IO_PADDR_END)) {
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// return (addr + 0x0EB00000);
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}
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}
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return addr;
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return addr;
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}
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}
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@ -132,7 +140,7 @@ u8 *GetPointer(const u32 addr) {
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return g_vram + (vaddr & VRAM_MASK);
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return g_vram + (vaddr & VRAM_MASK);
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} else {
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} else {
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ERROR_LOG(MEMMAP, "Unknown GetPointer @ 0x%08x", vaddr);
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ERROR_LOG(MEMMAP, "unknown GetPointer @ 0x%08x", vaddr);
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return 0;
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return 0;
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}
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}
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}
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}
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