Merge pull request #8098 from merryhime/ic-ivau
dynarmic: Invalidate CPU cache on all cores
This commit is contained in:
commit
642913b0d1
2 changed files with 5 additions and 3 deletions
2
externals/dynarmic
vendored
2
externals/dynarmic
vendored
|
@ -1 +1 @@
|
|||
Subproject commit e1a266b9299be81cc0318c7e25b00388c342704f
|
||||
Subproject commit af2d50288fc537201014c4230bb55ab9018a7438
|
|
@ -93,17 +93,19 @@ public:
|
|||
static constexpr u64 ICACHE_LINE_SIZE = 64;
|
||||
|
||||
const u64 cache_line_start = value & ~(ICACHE_LINE_SIZE - 1);
|
||||
parent.InvalidateCacheRange(cache_line_start, ICACHE_LINE_SIZE);
|
||||
parent.system.InvalidateCpuInstructionCacheRange(cache_line_start, ICACHE_LINE_SIZE);
|
||||
break;
|
||||
}
|
||||
case Dynarmic::A64::InstructionCacheOperation::InvalidateAllToPoU:
|
||||
parent.ClearInstructionCache();
|
||||
parent.system.InvalidateCpuInstructionCaches();
|
||||
break;
|
||||
case Dynarmic::A64::InstructionCacheOperation::InvalidateAllToPoUInnerSharable:
|
||||
default:
|
||||
LOG_DEBUG(Core_ARM, "Unprocesseed instruction cache operation: {}", op);
|
||||
break;
|
||||
}
|
||||
|
||||
parent.jit->HaltExecution();
|
||||
}
|
||||
|
||||
void ExceptionRaised(u64 pc, Dynarmic::A64::Exception exception) override {
|
||||
|
|
Loading…
Reference in a new issue