Merge pull request #3981 from ReinUsesLisp/bar
shader/other: Implement BAR.SYNC 0x0
This commit is contained in:
commit
508242c267
5 changed files with 34 additions and 1 deletions
2
externals/sirit
vendored
2
externals/sirit
vendored
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@ -1 +1 @@
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Subproject commit 414fc4dbd28d8fe48f735a0c389db8a234f733c0
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Subproject commit a62c5bbc100a5e5a31ea0ccc4a78d8fa6a4167ce
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@ -2335,6 +2335,15 @@ private:
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return {fmt::format("readInvocationARB({}, {})", value, index), Type::Float};
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}
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Expression Barrier(Operation) {
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if (!ir.IsDecompiled()) {
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LOG_ERROR(Render_OpenGL, "barrier() used but shader is not decompiled");
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return {};
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}
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code.AddLine("barrier();");
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return {};
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}
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Expression MemoryBarrierGL(Operation) {
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code.AddLine("memoryBarrier();");
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return {};
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@ -2581,6 +2590,7 @@ private:
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&GLSLDecompiler::ThreadMask<Func::Lt>,
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&GLSLDecompiler::ShuffleIndexed,
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&GLSLDecompiler::Barrier,
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&GLSLDecompiler::MemoryBarrierGL,
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};
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static_assert(operation_decompilers.size() == static_cast<std::size_t>(OperationCode::Amount));
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@ -2199,6 +2199,22 @@ private:
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return {OpSubgroupReadInvocationKHR(t_float, value, index), Type::Float};
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}
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Expression Barrier(Operation) {
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if (!ir.IsDecompiled()) {
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LOG_ERROR(Render_Vulkan, "OpBarrier used by shader is not decompiled");
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return {};
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}
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const auto scope = spv::Scope::Workgroup;
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const auto memory = spv::Scope::Workgroup;
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const auto semantics =
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spv::MemorySemanticsMask::WorkgroupMemory | spv::MemorySemanticsMask::AcquireRelease;
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OpControlBarrier(Constant(t_uint, static_cast<u32>(scope)),
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Constant(t_uint, static_cast<u32>(memory)),
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Constant(t_uint, static_cast<u32>(semantics)));
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return {};
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}
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Expression MemoryBarrierGL(Operation) {
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const auto scope = spv::Scope::Device;
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const auto semantics =
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@ -2664,6 +2680,7 @@ private:
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&SPIRVDecompiler::ThreadMask<4>, // Lt
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&SPIRVDecompiler::ShuffleIndexed,
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&SPIRVDecompiler::Barrier,
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&SPIRVDecompiler::MemoryBarrierGL,
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};
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static_assert(operation_decompilers.size() == static_cast<std::size_t>(OperationCode::Amount));
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@ -293,6 +293,11 @@ u32 ShaderIR::DecodeOther(NodeBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, GetRegister(instr.gpr8));
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break;
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}
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case OpCode::Id::BAR: {
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UNIMPLEMENTED_IF_MSG(instr.value != 0xF0A81B8000070000ULL, "BAR is not BAR.SYNC 0x0");
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bb.push_back(Operation(OperationCode::Barrier));
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break;
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}
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case OpCode::Id::MEMBAR: {
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UNIMPLEMENTED_IF(instr.membar.type != Tegra::Shader::MembarType::GL);
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UNIMPLEMENTED_IF(instr.membar.unknown != Tegra::Shader::MembarUnknown::Default);
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@ -233,6 +233,7 @@ enum class OperationCode {
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ThreadLtMask, /// () -> uint
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ShuffleIndexed, /// (uint value, uint index) -> uint
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Barrier, /// () -> void
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MemoryBarrierGL, /// () -> void
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Amount,
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